Abstract: A plasma processing apparatus includes; a chamber, a lower electrode disposed within the chamber and including a lower surface and an opposing upper surface configured to seat a wafer, an RF rod disposed on the lower surface of the lower electrode and extending in a vertical direction. The RF plate includes a first portion contacting the lower surface of the lower electrode, a second portion protruding from the first portion towards the RF rod, and a third portion extending from the second portion to connect the RF rod. A grounding electrode is spaced apart from the RF plate and at least partially surrounds a side wall of the RF rod and a side wall of the second portion of the RF plate. The grounding electrode includes a first grounding electrode facing each of the side wall of the RF rod and the second portion of the RF plate, and a second grounding electrode at least partially surrounding the first grounding electrode, and configured to horizontally rotate.

Abstract: A method for programming a non-volatile memory device is provided. The method comprises applying a program word line voltage with a voltage level changed stepwise to a selected word line connected to a plurality of memory cells, and applying a program bit line voltage to a first bit line of a plurality of bit lines connected to a plurality of first memory cells, while the program word line voltage is applied to the selected word line. The program bit line voltage transitions from a first voltage level to one of a program inhibit voltage level, a program voltage level, and a second voltage level. The first and second voltage levels are between the program inhibit voltage level and program voltage level.

Abstract: A display device includes a first display area including a first pixel area; a second display area including a second pixel area and a transmissive area; a signal line, a common electrode, and a touch electrode that are disposed in the second display area. The common electrode includes an opening overlapping the transmissive area, and the common electrode is disposed between the signal line and the touch electrode to overlap the signal line.

Abstract: A semiconductor device, a test method, and a system including the same are disclosed, which may relate to a technology for testing open and short states of a pad of a semiconductor device.

Abstract: A semiconductor package includes a first package substrate, a first semiconductor chip on the first package substrate, a plurality of first chip connection units to connect the first package substrate to the first semiconductor chip, an interposer on the first semiconductor chip, the interposer having a width greater than a width of the first semiconductor chip in a direction parallel to an upper surface of the first package substrate, and an upper filling layer including a center portion and an outer portion, the center portion being between the first semiconductor chip and the interposer, and the outer portion surrounding the center portion and having a thickness greater than a thickness of the center portion in a direction perpendicular to the upper surface of the first package substrate.

Abstract: According to a method of controlling uniformity of plasma, a first RF driving pulse signal including first RF pulses is generated by pulsing a first RF signal having a first frequency, and a second RF driving pulse signal including second RF pulses is generated by pulsing a second RF signal having a second, lower frequency. The first and second RF driving signals are applied to a top electrode and/or a bottom electrode of a plasma chamber. A harmonic control signal including harmonic control pulses is generated based on timing of the first and second RF pulses. A harmonic component of the first and second RF driving pulse signals is reduced via intermittent activation and deactivation of a harmonic control circuit as controlled by the harmonic control signal. The uniformity of plasma is improved through the control based on timings of the RF driving pulses.

Abstract: A display device includes: a base layer including a display area including an emission area and a non-emission area adjacent to the emission area, and a non-display area around the display area; a light emitting element in the emission area on the base layer; a color filter layer located above the light emitting element; and a light blocking pattern on the light emitting element and including a first light blocking pattern in the non-emission area and a second light blocking pattern in the non-display area. The first light blocking pattern and the second light blocking pattern are different in thickness from each other.

Abstract: A display device includes: a first substrate; a plurality of metal layers on the first substrate and separated from each other; a buffer layer on the metal layer; a semiconductor layer on the buffer layer; a gate conductive layer on the semiconductor layer; a data conductive layer connected to the semiconductor layer; and a light-emitting element connected to the data conductive layer, wherein the metal layer includes a first portion partially overlapping the semiconductor layer in a third direction perpendicular to the surface of the first substrate, a second portion where the metal layer completely overlaps the semiconductor layer in the third direction, and a third portion where the metal layer does not overlap the semiconductor layer in the third direction.

Abstract: A tiled display device includes a first display device including a first pixel, and a second display device coupled to the first display device in a bonding area, including a second pixel, and overlapping the first display device in the bonding area in a plane view.

Abstract: A device for providing feedback based on an input according to the present disclosure includes a sensor for sensing an input signal corresponding to the input of a user, and a controller that determines the input of the user as at least one of a touch operation, a press operation, or a swipe operation based on the input signal, and provides feedback corresponding to the determination result. The device may provide feedback using a haptic or sound output scheme based on the input of the user, thereby allowing the user to intuitively recognize an input function.

Abstract: A semiconductor package includes a first package substrate, a first semiconductor chip on the first package substrate, a plurality of first chip connection units to connect the first package substrate to the first semiconductor chip, an interposer on the first semiconductor chip, the interposer having a width greater than a width of the first semiconductor chip in a direction parallel to an upper surface of the first package substrate, and an upper filling layer including a center portion and an outer portion, the center portion being between the first semiconductor chip and the interposer, and the outer portion surrounding the center portion and having a thickness greater than a thickness of the center portion in a direction perpendicular to the upper surface of the first package substrate.

Abstract: A data processing system may include: a host; and a memory system including a plurality of memory units and a controller coupled to the plurality of memory units. The controller may include a memory manager suitable for acquiring characteristic data from serial presence detect (SPD) components in the plurality of memory units when power is supplied, providing the characteristic data to the host, setting an operation mode of each of the plurality of memory units based on the characteristic data, and performing memory training, and the host may perform interface training with the controller.

Abstract: An inductively coupled plasma processing apparatus includes a lower chamber providing a space for a substrate, a high-frequency antenna configured to generate inductively coupled plasma in the lower chamber, dielectric windows disposed between the lower chamber and the high-frequency antenna, metal windows alternatingly disposed between the dielectric windows, and gas inlet pipes disposed in each of the metal windows, wherein each of the gas inlet pipes includes nozzles configured to introduce gases to the lower chamber.

Abstract: The present invention relates to a resin composition having a high flow property, low thermal expansion characteristics, and excellent mechanical properties, and a prepreg and a metal clad laminate formed from the same.

Abstract: A display device includes a first display area including a first pixel area; a second display area including a second pixel area and a transmissive area; a signal line, a common electrode, and a touch electrode that are disposed in the second display area. The common electrode includes an opening overlapping the transmissive area, and the common electrode is disposed between the signal line and the touch electrode to overlap the signal line.

Abstract: A non-volatile memory device comprises a memory cell region including a first metal pad, a peripheral circuit region including a second metal pad and vertically connected to the memory cell region by the first metal pad and the second metal pad, a memory cell array in the memory cell region including a plurality of memory cells, each of the memory cells being connected to a plurality of word lines in the memory cell region and a plurality of bit lines in the memory cell region, and a control logic circuit in the peripheral circuit region configured to control voltages to be applied to the plurality of word lines and the plurality of bit lines.

Abstract: A memory system suitable for counting the number of errors occurring in each memory location, and a host system suitable for detecting a defective memory location based on the number of the errors occurring in each memory location and controlling a repair operation for the defective memory location based on a current amount of data being processed between the host system and the memory system, wherein the memory system repairs the defective memory location using the redundant memory area.

Abstract: A semiconductor includes a lower structure, an upper structure on the lower structure, and a connection pattern between the lower structure and the upper structure. The connection pattern is configured to electrically connect the lower structure and the upper structure to each other. The lower structure includes a lower base and a first lower chip on the lower base. The first lower chip includes a chip bonding pad, a pad structure, and a heat sink structure. The connection pattern is connected to the upper structure and extends away from the upper structure to be connected to the pad structure. The pad structure has a thickness greater than a thickness of the chip bonding pad. At least a portion of the heat sink structure is at a same height level as at least a portion of the pad structure.