Abstract: A display device includes: a first substrate including a display area and a non-display area disposed; a first semiconductor disposed in the display area; a second semiconductor disposed in the non-display area; a first data conductor overlapping the first semiconductor; a second data conductor overlapping the second semiconductor; a first shielding part overlapping the first semiconductor and disposed on the first data conductor; a second shielding part overlapping the second semiconductor and disposed on the second data conductor; an insulating layer disposed on the first shielding part and the second shielding part, wherein a second thickness of the second shielding part is larger than a first thickness of the first shielding part, and a fourth thickness of a second part of the insulating layer corresponding to the second shielding part is smaller than a third thickness of a first part of the insulating layer corresponding to the first shielding part.

Abstract: A semiconductor package includes a first semiconductor chip, a second semiconductor chip attached to an upper surface of the first semiconductor chip, a silicon heat-dissipation body thermally connected to at least one of the first semiconductor chip and the second semiconductor chip, and a molding member configured to surround the first semiconductor chip and the second semiconductor chip and exposing an upper surface of the silicon heat-dissipation body.

Abstract: The present invention relates to a method for determining patient-specific blood vessel information. More specifically, the present invention relates to a method for determining patient-specific cardiovascular information by applying a simplified coronary circulation model thereto. Furthermore, the present invention relates to a method for determining a blood flow rate for branches of a blood vessel having originated from an artery of each patient.

Abstract: A method of operating a memory device includes performing a data read operation on at least one victim sub-block within a memory block containing a plurality of sub-blocks therein, in response to an erase command directed to a selected sub-block within the plurality of sub-blocks. Next, a soft program operation is performed on the at least one victim sub-block. This soft programming operation is then followed by an operation to erase the selected sub-block within the plurality of sub-blocks. This operation to erase the selected sub-block may include providing an erase voltage to a bulk region of a substrate on which the memory block extends, and the at least one victim sub-block may be disposed between the selected sub-block and the substrate.

Abstract: A plasma processing apparatus includes a substrate chuck having a first surface for supporting a substrate, a second surface opposite to the first surface, and a sidewall, a focus ring for surrounding a perimeter of the substrate, and an edge block for supporting the focus ring. The edge block includes a side electrode on the sidewall of the substrate chuck and a bottom electrode on the second surface of the substrate chuck.

Abstract: A semiconductor device includes: a non-volatile memory including a normal region, a self-repair region and a redundancy region, each having a plurality of cells; a first boot-up control block suitable for controlling a first boot-up operation to detect defective cells of the normal region and store a defective address in a first latch unit; a self-program control block suitable for controlling a self-program operation to program the defective address stored in the first latch unit into the self-repair region; and a second boot-up control block suitable for controlling a second boot-up operation to read out data of the normal region based on an input address while reading out data of the redundancy region instead of the data of the normal region when data of the self-repair region coincides with the input address.

Abstract: An exposure mask includes a first transmission portion, a second transmission portion, and a blocking portion. The first transmission portion is configured to, when illuminated with light, transmit the light at a first energy level. The first transmission portion is disposed in association with formation of a first contact hole in an underlying layer. The second transmission portion is configured to, when illuminated with the light, transmit the light at a second energy level. The second transmission portion is disposed in association with formation of a second contact hole in the underlying layer. The blocking portion is configured to block the light, and is disposed in association with a boundary region between a first region and a second region of the underlying layer. The second transmission portion is further configured to enable the second contact hole to be formed deeper into the underlying layer than the first contact hole.

Abstract: An input sensing unit including a plurality of capacitive sensing electrodes, and a conductive layer disposed on at least a portion of the sensing electrodes, in which the conductive layer overlaps at least a portion of the sensing electrodes in a plan view, and the conductive layer includes a plurality of conductive patterns spaced apart from each other.

Abstract: A three-dimensional (3D) memory device having a plurality of vertical channel structures includes a first memory block, a second memory block, and a bit line. The first memory block includes first vertical channel structures extending in a vertical direction with respect to a surface of a substrate. The second memory block includes second vertical channel structures on the first vertical channel structures in the vertical direction and first and second string selection lines extending in a first horizontal direction and offset in the vertical direction. The bit line extends in the first horizontal direction between the first and second memory blocks and is shared by the first and second memory blocks. The second memory block may include first and second string selection transistors which are each connected to the bit line and the first string selection line and have different threshold voltages from each other.

Abstract: A semiconductor package includes a first package substrate, a first semiconductor chip on the first package substrate, a plurality of first chip connection units to connect the first package substrate to the first semiconductor chip, an interposer on the first semiconductor chip, the interposer having a width greater than a width of the first semiconductor chip in a direction parallel to an upper surface of the first package substrate, and an upper filling layer including a center portion and an outer portion, the center portion being between the first semiconductor chip and the interposer, and the outer portion surrounding the center portion and having a thickness greater than a thickness of the center portion in a direction perpendicular to the upper surface of the first package substrate.

Abstract: A photosensitive resin composition includes: a) an acryl-based copolymer obtained by copolymerizing i) a hydroxyl group-containing unsaturated compound; ii) an unsaturated carboxylic acid, an unsaturated carboxylic anhydride, or a mixture thereof; iii) an epoxy group-containing unsaturated compound; and iv) an olefin-based unsaturated compound, b) a 1,2-quinonediazide 5-sulfonic ester compound having a phenol compound including a compound represented by the above Chemical Formula A as ballast, c) a silane coupling agent, and d) a solvent.

Abstract: The present invention relates to an antibody binding specifically to an N-terminal region of lysyl-tRNA synthetase which is exposed on the cell membrane and a use thereof.

Abstract: A semiconductor device may include a refresh control circuit which may generate test addresses that are counted based on a refresh signal and a detection clock signal and may senses logic levels of internal data corresponding to the test addresses to generate a sense signal. The semiconductor device may include a memory circuit may include a plurality of word lines which are selected by the test addresses and may output the internal data stored in memory cells connected to the word lines. The semiconductor device may include an address storage circuit may divide each of the test addresses into a main group and a sub-group to store the main groups and the sub-groups of the test addresses. The address storage circuit may store the sub-groups which are inputted at a point of time that the sense signal is generated, regarding the stored main groups having the same level combination.

Abstract: Provided are a pharmaceutical composition for preventing or treating sensorineural hearing loss or tinnitus including platelet-rich plasma, and a method of preventing or treating sensorineural hearing loss or tinnitus using the same.

Abstract: A light source device using a polarity of a material may include a transparent frame forming an inner space accommodating a nonpolarity material and a polarity material; a light source portion irradiating light through the nonpolarity material or the polar material accommodated in the transparent frame; and an electromagnet configured to switch respective positions of the nonpolarity material and the polar material by a magnetic force generated as a current is applied from outside of the light source device.

Abstract: A semiconductor device includes: a non-volatile memory including a normal region, a self-repair region and a redundancy region, each having a plurality of cells; a first boot-up control block suitable for controlling a first boot-up operation to detect defective cells of the normal region and store a defective address in a first latch unit; a self-program control block suitable for controlling a self-program operation to program the defective address stored in the first latch unit into the self-repair region; and a second boot-up control block suitable for controlling a second boot-up operation to read out data of the normal region based on an input address while reading out data of the redundancy region instead of the data of the normal region when data of the self-repair region coincides with the input address.

Abstract: A data processing system includes: a memory device suitable for performing an operation corresponding to a command and outputting a memory data; a data collecting device suitable for collecting big data by integrating the command and the memory data at a predetermined cycle or at every predetermined time, splitting the collected big data based on a predetermined unit, and transferring the split big data; and a data processing device suitable for storing the split big data received from the data collecting device in block-based files in a High-Availability Distributed Object-Oriented Platform (HADOOP) distributed file system (HDFS), classifying the block-based files based on a particular memory command, and processing the block-based files.

Abstract: A method of evaluating a movement tendency of ions in an electrolyte membrane includes counting inter-movement ions, counting intra-movement ions and calculating the ratio of the intra-movement ions and inter-movement of ions. The movement tendency of ions is predicted based on the ratio. In the case of evaluating a movement tendency of ions using the method, since the structure of the electrolyte membrane in which the ratios of intra-movement and inter-movement are maximized is predicted through measurement of the ratios of the intra-movement and inter-movement of ions, ohmic resistance that may occur in a membrane-electrode assembly (MEA) may be reduced. The electrolyte membrane having the optimal structure predicted by the method can be applied to a fuel cell to increase its performance.

Abstract: An etchant composition may include: a peroxosulfate; a cyclic amine compound; a first amphoteric compound including a carboxyl group; and a second amphoteric compound including a sulfone group, wherein the second amphoteric compound may be different from the first amphoteric compound.

Abstract: A display device includes a substrate corresponding to a display area in which an image is displayed, and a non-display area at at least one side of the display area, a touch sensing device at the display area, first outer lines electrically connected to the touch sensing device, and located at a first non-display area that is a first portion of the non-display area, second outer lines connecting the first outer lines and the touch sensing device, a plurality of pixels at the display area, a driving circuit at the first non-display area for driving the pixels, and a power supply line electrically connected to the pixels and located at a second non-display area that is a second portion of the non-display area.