Patents by Inventor In-Bo Shim

In-Bo Shim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor manufacturing device and method of operating the same
    Patent number: 10964511
    Abstract: A semiconductor manufacturing device includes a plasma chamber, a source power supply, and first and second bias power supplies. The source power supply applies a first source voltage to the plasma chamber at a first time and a second source voltage to the plasma chamber at a second time. The first bias power supply applies a first turn-on voltage to the plasma chamber at the first time and a first turn-off voltage to the plasma chamber at the second time. The second bias power supply applies a second turn-off voltage to the plasma chamber at the first time and a second turn-on voltage to the plasma chamber at the second time. The plasma chamber forms plasmas of different conditions from a gas mixture in the plasma chamber based on the source, turn-on, and turn-off voltages.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: March 30, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung Bo Shim, Myung Sun Choi, Nam Jun Kang, Doug Yong Sung, Sang Min Jeong, Peter Byung H Han
  • Etchant composition and method of manufacturing wiring substrate using the same
    Patent number: 10941342
    Abstract: An etchant composition may include: a peroxosulfate; a cyclic amine compound; a first amphoteric compound including a carboxyl group; and a second amphoteric compound including a sulfone group, wherein the second amphoteric compound may be different from the first amphoteric compound.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: March 9, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Bong Kyun Kim, Jin Suek Kim, Seung Bo Shim, Shin Hyuk Choi, Seung Hee Kim, Dong Hee Lee, In Seol Kuk, Beom Soo Kim, Sang Tae Kim, Young Chul Park, Young Jin Yoon, Dae Sung Lim
  • Resin composition for semiconductor package, and prepreg and metal clad laminate using the same
    Patent number: 10913849
    Abstract: A resin composition, optionally for a semiconductor package, and a prepreg and a metal clad laminate using the same are provided. The resin composition according to the present invention may exhibit excellent flowability although being packed with a high content of an inorganic filler, and may provide a prepreg and a metal clad laminate having excellent adhesive strength for a metal foil, and low relative permittivity and a low dissipation factor.
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: February 9, 2021
    Assignee: LG CHEM, LTD.
    Inventors: Chang Bo Shim, Hee Yong Shim, Hyun Sung Min, Hwa Yeon Moon, Seung Hyun Song, Yong Seon Hwang
  • HOST SYSTEM AND COMPUTING SYSTEM INCLUDING THE HOST SYSTEM
    Publication number: 20210034446
    Abstract: A memory system suitable for counting the number of errors occurring in each memory location, and a host system suitable for detecting a defective memory location based on the number of the errors occurring in each memory location and controlling a repair operation for the defective memory location based on a current amount of data being processed between the host system and the memory system, wherein the memory system repairs the defective memory location using the redundant memory area.
    Type: Application
    Filed: March 11, 2020
    Publication date: February 4, 2021
    Inventors: Eung-Bo SHIM, Sung-Ki CHOI
  • NON-VOLATILE MEMORY DEVICE
    Publication number: 20210027841
    Abstract: A non-volatile memory device comprises a memory cell region including a first metal pad, a peripheral circuit region including a second metal pad and vertically connected to the memory cell region by the first metal pad and the second metal pad, a memory cell array in the memory cell region including a plurality of memory cells, each of the memory cells being connected to a plurality of word lines in the memory cell region and a plurality of bit lines in the memory cell region, and a control logic circuit in the peripheral circuit region configured to control voltages to be applied to the plurality of word lines and the plurality of bit lines.
    Type: Application
    Filed: August 12, 2020
    Publication date: January 28, 2021
    Inventors: Sang-Won PARK, Sang-Wan NAM, Ji Yeon SHIN, Won Bo SHIM, Jung-Yun YUN, Ji Ho CHO, Sang Gi HONG
  • NON-VOLATILE MEMORY DEVICE AND METHOD FOR PROGRAMMING THE SAME
    Publication number: 20210027840
    Abstract: A method for programming a non-volatile memory device is provided. The method comprises applying a program word line voltage with a voltage level changed stepwise to a selected word line connected to a plurality of memory cells, and applying a program bit line voltage to a first bit line of a plurality of bit lines connected to a plurality of first memory cells, while the program word line voltage is applied to the selected word line. The program bit line voltage transitions from a first voltage level to one of a program inhibit voltage level, a program voltage level, and a second voltage level. The first and second voltage levels are between the program inhibit voltage level and program voltage level.
    Type: Application
    Filed: March 18, 2020
    Publication date: January 28, 2021
    Inventors: Sang-Won PARK, Sang-Wan NAM, Ji Yeon SHIN, Won Bo SHIM, Jung-Yun YUN, Ji Ho CHO, Sang Gi HONG
  • METHOD OF ERASING DATA IN NONVOLATILE MEMORY DEVICE, NONVOLATILE MEMORY DEVICE PERFORMING THE SAME AND MEMORY SYSTEM INCLUDING THE SAME
    Publication number: 20210012840
    Abstract: A nonvolatile memory device includes a memory cell region, a peripheral circuit region, a memory block in the memory cell region, a row decoder in the peripheral circuit region, and a control circuit in the peripheral circuit region. The memory cell region includes a first metal pad. The peripheral circuit region includes a second metal pad and is vertically connected to the memory cell region by the first metal pad and the second metal pad. The memory block includes memory cells stacked in a direction intersecting a substrate, and is divided into a plurality of sub-blocks configured to be erased independently. The row decoder selects the memory block by units of a sub-block.
    Type: Application
    Filed: September 29, 2020
    Publication date: January 14, 2021
    Inventors: Won-Bo Shim, Sang-Wan Nam, Ji-Ho Cho
  • Methods of testing cell arrays and semiconductor devices executing the same
    Patent number: 10847243
    Abstract: A semiconductor device includes a pattern data generation circuit generating pattern data, a data comparison circuit receiving read data which are outputted from cell arrays included in a core area by a read operation and comparing the read data with the pattern data to generate a fail code, and a fail flag generation circuit comparing the fail code with a set code to generate a fail flag.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: November 24, 2020
    Assignee: SK hynix Inc.
    Inventor: Young Bo Shim
  • Touch sensor and display device including the same
    Patent number: 10838527
    Abstract: A touch sensor includes: an active area including a first sub-active area and a second sub-active area; a plurality of first touch electrodes in the first sub-active area and the second sub-active area; and a plurality of second touch electrodes in the first sub-active area and the second sub-active area, and a length of a first border portion that is a separated area between adjacent first and second touch electrodes in the first sub-active area is different from a length of a second border portion that is a separated area between adjacent first and second touch electrodes in the second sub-active area.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: November 17, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jin Bo Shim, Jung-Moo Hong, In Seo Kee, Kyung Seop Kim, Hyun Jae Na, Sang Youn Han
  • Semiconductor device and operating method thereof
    Patent number: 10839932
    Abstract: A semiconductor device includes: a non-volatile memory including a normal region, a self-repair region and a redundancy region, each having a plurality of cells; a first boot-up control block suitable for controlling a first boot-up operation to detect defective cells of the normal region and store a defective address in a first latch unit; a self-program control block suitable for controlling a self-program operation to program the defective address stored in the first latch unit into the self-repair region; and a second boot-up control block suitable for controlling a second boot-up operation to read out data of the normal region based on an input address while reading out data of the redundancy region instead of the data of the normal region when data of the self-repair region coincides with the input address.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: November 17, 2020
    Assignee: SK hynix Inc.
    Inventor: Young-Bo Shim
  • Method and apparatus for evaluating movement tendency of ions in electrolyte membrane
    Patent number: 10840526
    Abstract: A method of evaluating a movement tendency of ions in an electrolyte membrane includes counting inter-movement ions, counting intra-movement ions and calculating the ratio of the intra-movement ions and inter-movement of ions. The movement tendency of ions is predicted based on the ratio. In the case of evaluating a movement tendency of ions using the method, since the structure of the electrolyte membrane in which the ratios of intra-movement and inter-movement are maximized is predicted through measurement of the ratios of the intra-movement and inter-movement of ions, ohmic resistance that may occur in a membrane-electrode assembly (MEA) may be reduced. The electrolyte membrane having the optimal structure predicted by the method can be applied to a fuel cell to increase its performance.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: November 17, 2020
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Jin Hyeok Cha, Suk Hwan Yun, Woong Pyo Hong, Sun Bo Shim
  • Method of erasing data in nonvolatile memory device, nonvolatile memory device performing the same and memory system including the same
    Patent number: 10825532
    Abstract: A method of operating a memory device includes performing a data read operation on at least one victim sub-block within a memory block containing a plurality of sub-blocks therein, in response to an erase command directed to a selected sub-block within the plurality of sub-blocks. Next, a soft program operation is performed on the at least one victim sub-block. This soft programming operation is then followed by an operation to erase the selected sub-block within the plurality of sub-blocks. This operation to erase the selected sub-block may include providing an erase voltage to a bulk region of a substrate on which the memory block extends, and the at least one victim sub-block may be disposed between the selected sub-block and the substrate.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: November 3, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Bo Shim, Sang-Wan Nam, Ji-Ho Cho
  • Wafer measurement apparatus, wafer measurement system, and method of manufacturing semiconductor device using the same
    Patent number: 10790200
    Abstract: A wafer measurement system for measuring a measurable characteristic of a first measurement target formed on a wafer includes: a memory and a processor. The memory is configured to store an image of the wafer, multiple templates each including at least one line, and a measurement program. The processor is accessible to the memory and is configured to execute multiple modules included in the measurement program. The modules include: a template selection module configured to receive the templates and select a measurement template corresponding to a shape of the first measurement target; a template matching module configured to match the measurement template to the first measurement target; and a measurement module configured to measure the measurable characteristic of the first measurement target based on position information of the measurement template.
    Type: Grant
    Filed: December 31, 2018
    Date of Patent: September 29, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Bo Shim, Je-Hyun Lee
  • LIDAR device and LIDAR system including the same
    Patent number: 10788574
    Abstract: The described technology relates to a light detection and ranging (LIDAR) device. The LIDAR device can include a transmission unit configured to emit a first signal, a first lens unit configured to convert the first signal into parallel light, a reflection unit configured to adjust a direction of the converted first signal and a second lens unit configured to enable the first signal to have the same focal plane even when a reflection angle of the reflection unit changes. The LIDAR device can also include a third lens unit configured to convert the first signal passing through the second lens unit into parallel light, a fourth lens unit configured to increase an angle of the first signal passing through the third lens unit and a reception unit configured to receive a second signal reflected by an object after passing through the fourth lens unit.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: September 29, 2020
    Assignee: KOREA ELECTRONICS TECHNOLOGY INSTITUTE
    Inventors: Young Bo Shim, Yeon Kug Moon
  • Plasma treatment apparatus and method of fabricating semiconductor device using the same
    Patent number: 10790168
    Abstract: Provided are a plasma treatment apparatus and a method of fabricating semiconductor device using the same. The plasma treatment apparatus includes a chamber which provides a plasma treatment space, a bottom electrode disposed in the chamber and supports a wafer, a top electrode disposed in the chamber facing the bottom electrode, a source power source which supplies a source power output of a first frequency to the bottom electrode, a bias power source which supplies a bias power output of a second frequency different from the first frequency to the bottom electrode, and a pulse power source which applies a pulse voltage to the bottom electrode, wherein the bias power output is a bias voltage which is pulse-modulated to a first voltage level in a first time section and pulse-modulated to a second voltage level in a second time section and is applied to the bottom electrode.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: September 29, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung Bo Shim, Hyuk Kim, Sun Taek Lim, Jae Myung Choe, Jeon Il Lee, Sung-Il Cho
  • NONVOLATILE MEMORY DEVICE AND ERASE METHOD THEREOF
    Publication number: 20200303011
    Abstract: A non-volatile memory device includes a memory cell array including a plurality of cell strings, each of the plurality of cell strings includes a gate-induced drain leakage (GIDL) transistor and a memory cell group, and a control logic to apply a voltage to each of the plurality of cell strings. The control logic performs a first erase operation of erasing the memory cell groups of each of the plurality of cell strings, a first verification operation of detecting erase results of the memory cell groups of each of the plurality of cell strings, and a program operation of programming the GIDL transistors of some of the plurality of cell strings.
    Type: Application
    Filed: November 25, 2019
    Publication date: September 24, 2020
    Inventors: Sang-Won PARK, Won Bo SHIM, Bong Soon LIM
  • SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF
    Publication number: 20200303031
    Abstract: A semiconductor device includes: a non-volatile memory including a normal region, a self-repair region and a redundancy region, each having a plurality of cells; a first boot-up control block suitable for controlling a first boot-up operation to detect defective cells of the normal region and store a defective address in a first latch unit; a self-program control block suitable for controlling a self-program operation to program the defective address stored in the first latch unit into the self-repair region; and a second boot-up control block suitable for controlling a second boot-up operation to read out data of the normal region based on an input address while reading out data of the redundancy region instead of the data of the normal region when data of the self-repair region coincides with the input address.
    Type: Application
    Filed: June 11, 2020
    Publication date: September 24, 2020
    Inventor: Young-Bo SHIM
  • LIDAR device and system comprising the same
    Patent number: 10775485
    Abstract: The described technology relates to a light detection and ranging (LIDAR) device. The LIDAR device can include a transmitter configured to emit an optical signal, a first lens section configured to convert the optical signal into collimated light, a reflector configured to adjust a direction of the converted optical signal, a second lens section configured to allow the adjusted optical signal to have the same focal plane even though a reflection angle of the reflector is varied and a third lens section configured to convert the optical signal passed through the second lens section into collimated light. The LIDAR device can also include a fourth lens section configured to allow the optical signal, and a receiver configured to receive the optical signal passed through the fourth lens section. The third lens section and the fourth lens section are positioned on the same line in a first direction.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: September 15, 2020
    Assignee: Korea Electronics Technology Institute
    Inventors: Young Bo Shim, Yeon Kug Moon
  • Touch screen and display device having the same
    Patent number: 10754458
    Abstract: A touch screen for a display device includes a base substrate having a sensing area, and a peripheral area disposed around the sensing area; an insulating layer including at least one contact hole; a sensor provided in the sensing area; and sensing lines connected to the sensor, the sensing lines comprising a first metal layer disposed in the periphery area, and a second metal layer electrically connected to the first metal layer through the contact hole. At least some of the sensing lines include a first portion adjacent to the contact hole, and a second portion spaced from the first portion, with the first portion and the second portion having different widths.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: August 25, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sun Haeng Cho, Jung Moo Hong, Kyu Young Kim, Jin Bo Shim
  • Substrate structures for image sensor modules and image sensor modules including the same
    Patent number: 10750112
    Abstract: A substrate structure for an image sensor module includes a module substrate including a sensor mounting hole, a reinforcing plate on a lower surface of the module substrate, an image sensor chip on the reinforcing plate within the sensor mounting hole, and a reinforcing pattern in the module substrate. The reinforcing plate covers the sensor mounting hole. An upper surface of the image sensor chip may be exposed by the module substrate. The reinforcing pattern is adjacent to the sensor mounting hole and extends in at least one direction.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: August 18, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji-Hwang Kim, Hyo-Eun Kim, Jong-Bo Shim, Cha-Jea Jo, Sang-Uk Han