Patents by Inventor Jenoe Tihanyi

Jenoe Tihanyi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020179925
    Abstract: The controllable semiconductor switching element blocks in both directions. The semiconductor switching element is formed with a first conduction region and a second conduction region of a first type of conductivity, a blocking region of a second type of conductivity which is disposed between the first and second conducting regions, and a control electrode which is arranged opposite the blocking region and insulated from it. A recombination region is configured in the blocking region and is comprised of a material that promotes a recombination of charge carriers of the first and second type of conductivity.
    Type: Application
    Filed: June 6, 2002
    Publication date: December 5, 2002
    Inventor: Jenoe Tihanyi
  • Publication number: 20020179942
    Abstract: A semiconductor component includes a semiconductor body having a substrate of a first conduction type and a first layer of a second conduction type that is located above the substrate. A channel zone of the first conduction type is formed in the first layer. A first terminal zone of the second conduction type is configured adjacent the channel zone. A second terminal zone of the first conduction type is formed in the first layer. Compensation zones of the first conduction type are formed in the first layer. A second layer of the second conduction type is configured between the substrate and the compensation zones.
    Type: Application
    Filed: October 22, 2001
    Publication date: December 5, 2002
    Inventor: Jenoe Tihanyi
  • Publication number: 20020167065
    Abstract: A semiconductor module includes a housing with at least one semiconductor component that is conductively connected to at least one output line. An integrated temperature sensor is also housed in the housing. This sensor is connected, via at least one of its load terminals, to a terminal for receiving a supply potential. The temperature sensor conducts a load current that heats-up the temperature sensor when a first temperature threshold is crossed and a supply potential is in being supplied. A housed interruption device is arranged in such a way that it interrupts the output lines carrying the load current when a second temperature threshold has been exceeded.
    Type: Application
    Filed: May 9, 2002
    Publication date: November 14, 2002
    Inventors: Alfons Graf, Jenoe Tihanyi, Wolfgang Troger
  • Patent number: 6479876
    Abstract: The invention relates to a vertical power MOSFET having additional column-like zones (11, 12) which are arranged in an inner zone (1) and have the same and the opposite conductivity type as/to the inner zone (1). The charge carrier life is reduced in the additional zones (12), which are of the same conductivity type as the inner zone (1), and the inner zone (1) is dimensioned such that the space charge zone does not reach the junction between the inner zone and a drain zone.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: November 12, 2002
    Inventors: Gerald Deboy, Jenoe Tihanyi
  • Patent number: 6459142
    Abstract: The power MOSFET has a semiconductor layer formed on a highly doped semiconductor substrate of a first conductivity type. The semiconductor layer is itself of the other conductivity type and a highly doped source zone of the other conductivity type and a highly doped drain zone of the other conductivity type are formed in the semiconductor layer. The power MOSFET also has a gate electrode. A metallically conductive connection runs between the source zone and the semiconductor substrate, so that the power MOSFET is in the form of a source-down MOSFET, and the heat can be dissipated via the semiconductor substrate or a cooling fin fitted there.
    Type: Grant
    Filed: July 14, 2000
    Date of Patent: October 1, 2002
    Assignee: Infineon Technologies AG
    Inventor: Jenoe Tihanyi
  • Patent number: 6445038
    Abstract: An SOI high-voltage switch with an FET structure, in which a drift zone of one conductivity type is provided between a gate electrode and a drain electrode in the drain region. Pillar-like trenches in the form of a grid are incorporated in the drift zone and are filled with semiconductor material of the other conductivity type.
    Type: Grant
    Filed: September 27, 2000
    Date of Patent: September 3, 2002
    Assignee: Infineon Technologies AG
    Inventor: Jenoe Tihanyi
  • Publication number: 20020106996
    Abstract: The system has at least two electronic units between which signals are transferred from a first electronic unit and a second electronic unit. The first electronic unit has a signal source. The second electronic unit has a signal sink. A signal to be transferred is converted into a line-independent electromagnetic wave with a transmitting unit and transmitted to a receiving unit. The line-independent electromagnetic wave is received with the receiving unit and converted into a reception signal.
    Type: Application
    Filed: January 30, 2002
    Publication date: August 8, 2002
    Inventors: Jens-Peer Stengl, Jenoe Tihanyi, Wolfgang Werner, Karim-Thomas Taghizadeh-Kaschani
  • Publication number: 20020096708
    Abstract: A semiconductor component includes first and second connection zones formed in a semiconductor body, a channel zone surrounding the second connection zone in the semiconductor body, and a drift path that is formed between the channel zone and the first connection zone and contains a compensation zone. The compensation zone has a complementary conduction type with respect to the drift zone and includes at least two segments. A distance between the two adjacent segments is chosen such that the punch-through voltage between these segments lies in a voltage range that corresponds to the voltage range assumed by the voltage drop across the drift path at currents situated between the rated current and twice the rated current.
    Type: Application
    Filed: December 11, 2001
    Publication date: July 25, 2002
    Inventors: Dirk Ahlers, Jens-Peer Stengl, Jenoe Tihanyi, Hans Weber, Gerald Deboy, Helmut Strack, Armin Willmeroth
  • Publication number: 20020096697
    Abstract: The junction insulated lateral MOSFET is suitable for high/low side switches. A p-conductive wall between an n-conductive source zone and an n-conductive drain zone, together with the source zone and drain zone, extend to an n-conductive substrate. The source zone and the drain zone are surrounded by a p-conductive area.
    Type: Application
    Filed: December 18, 2001
    Publication date: July 25, 2002
    Inventor: Jenoe Tihanyi
  • Publication number: 20020093049
    Abstract: The semiconductor component can be controlled by the field effect and it blocks in both directions. The component has a semiconductor body with a first connecting zone, a second connecting zone and a channel zone formed between the first and the second connecting zone. A control electrode is formed adjacent to the channel zone such that it is isolated from the semiconductor body. In order to avoid a reduction in the withstand voltage due to a parasitic bipolar transistor, a recombination zone, which is formed from a material that assists the recombination of charge carriers of the first and second conductivity types, is formed in the channel zone and the second connecting zone.
    Type: Application
    Filed: December 5, 2001
    Publication date: July 18, 2002
    Inventor: Jenoe Tihanyi
  • Publication number: 20020079535
    Abstract: A low impedance VDMOS semiconductor component having a planar gate structure is described. The VDMOS semiconductor component contains a semiconductor body of a first conductivity type having two main surfaces, including a first main surface and a second main surface disposed substantially opposite to one another. A highly doped first zone of the first conductivity type is disposed in an area of the first main surface. A second zone of a second conductivity type separates the first zone from the semiconductor body. The first zone and the second zone have a trench with a bottom formed therein reaching down to the semiconductor body. An insulating material fills the trench at least beyond an edge of the second zone facing the semiconductor body. A region of the second conductivity type surrounds an area of the bottom of the trench.
    Type: Application
    Filed: November 13, 2001
    Publication date: June 27, 2002
    Inventors: Jenoe Tihanyi, Wolfgang Werner
  • Patent number: 6411484
    Abstract: The VLSI circuit has one or more integrated semiconductor chips disposed in a housing and connected via connecting lines to contact terminals that are accessible from outside the housing. A temperature sensor chip is in thermal contact with the semiconductor chip in the housing. Connecting lines connect the temperature sensor chip to additional contact terminals of the housing.
    Type: Grant
    Filed: March 24, 1999
    Date of Patent: June 25, 2002
    Assignee: Infineon Technologies AG
    Inventors: Jenoe Tihanyi, Horst Schäfer
  • Patent number: 6399435
    Abstract: The present invention provides a method for fabricating a DRAM cell having a trench capacitor. In order to simplify the fabrication method for a DRAM cell, to ensure a high yield and to achieve a high packing density of the DRAM cells, the invention proposes that the storage capacitor (4) of the DRAM cell and the selection transistor (3) be fabricated independently of one another. This saves method steps which, in the prior art, have to be carried out in order to isolate capacitor (9) and gate (16) in the same trench.
    Type: Grant
    Filed: October 15, 2001
    Date of Patent: June 4, 2002
    Assignee: Infineon Technologies AG
    Inventor: Jenoe Tihanyi
  • Patent number: 6384456
    Abstract: A field-effect transistor has a semiconductor body with a main area, in which at least one source zone and one drain zone are introduced and which is provided with a gate electrode isolated from a channel region disposed between a source zone and a drain zone by an insulator layer. In the field-effect transistor, the source zone, the drain zone and the channel region are disposed in walls of a respective trench or recess formed in the semiconductor body.
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: May 7, 2002
    Assignee: Infineon Technologies AG
    Inventor: Jenoe Tihanyi
  • Patent number: 6376890
    Abstract: A high-voltage edge termination structure for planar structures. The planar structures have a semiconductor body of a first conductivity type whose edge area is provided with at least one field plate isolated from the semiconductor body by an insulator layer. The edge area of the semiconductor body is provided with floating regions of a second conductivity type. The floating regions are spaced at such a distance from one another that zones between the floating regions are depleted even at an applied voltage which is low in comparison with a breakdown voltage of the semiconductor body for the floating regions.
    Type: Grant
    Filed: December 8, 1999
    Date of Patent: April 23, 2002
    Assignee: Siemens Aktiengesellschaft
    Inventor: Jenoe Tihanyi
  • Patent number: 6365919
    Abstract: A lateral silicon carbide junction field effect transistor has p-conductive and n-conductive silicon carbide layers. The layers are provided in pairs in lateral direction in a silicon carbide body. Trenches for a source, a drain and a gate extend from a principal surface of the silicon carbide body and penetrate the layers. The source and drain trenches are filled with silicon carbide of one conductivity type, whereas the trench for the gate is filled with silicon carbide of a conductivity type that is different from the source and the drain.
    Type: Grant
    Filed: July 11, 2000
    Date of Patent: April 2, 2002
    Assignee: Infineon Technologies AG
    Inventors: Jenoe Tihanyi, Heinz Mitlehner, Wolfgang Bartsch
  • Patent number: 6362505
    Abstract: A MOS field-effect transistor is disclosed having a low on resistance Ron, in which auxiliary electrodes composed of polycrystalline silicon surrounded by an insulating layer are provided in the drift path between semiconductor regions of one conduction type. A MOSFET according to the invention may be fabricated in a simple manner compared to conventional MOSFETs using, for example, trench processing technology.
    Type: Grant
    Filed: July 27, 2000
    Date of Patent: March 26, 2002
    Assignee: Siemens Aktiengesellschaft
    Inventor: Jenoe Tihanyi
  • Publication number: 20020014640
    Abstract: A junction field-effect transistor containing a semiconductor region with an inner region is described. In addition, a first and a second connecting region, respectively, are disposed within the semiconductor region. The first connecting region has the same conductivity type as the inner region, but in a higher doping concentration. The second connecting region has the opposite conductivity type to that of the inner region. This reduces the forward resistance while at the same time maintaining a high reverse voltage strength.
    Type: Application
    Filed: June 22, 2001
    Publication date: February 7, 2002
    Inventors: Heinz Mitlehner, Dietrich Stephani, Jenoe Tihanyi
  • Publication number: 20020000566
    Abstract: The invention relates to an integrated semiconductor switching element, that includes a semiconductor body having a first connection zone of a first conduction type and a second connection zone of the first conduction type. A body zone of a second conduction type is located in the semiconductor body. The body zone is located between the first connection zone and the second connection zone. A control electrode is located alongside the body zone and is insulated from the semiconductor body. A Schottky barrier is located on the second connection zone. A first connection electrode is electrically conductively connected to the first connection zone and to the Schottky barrier. The invention also relates to a process for producing a semiconductor switching element.
    Type: Application
    Filed: May 30, 2001
    Publication date: January 3, 2002
    Inventor: Jenoe Tihanyi
  • Patent number: 6326656
    Abstract: A lateral high-voltage transistor has a semiconductor body made of a lightly doped semiconductor substrate of a first conductivity type and an epitaxial layer of a second conductivity type. The epitaxial layer is provided on the semiconductor substrate. The lateral high-voltage transistor has a drain electrode, a source electrode, a gate electrode and a semiconductor zone of the first conductivity type which is provided under the gate electrode and is embedded in the epitaxial layer. Between the source electrode and the drain electrode trenches are provided in lines and rows in the semiconductor layer. The walls of the trenches are highly doped with dopants of the first conductivity type.
    Type: Grant
    Filed: February 24, 2000
    Date of Patent: December 4, 2001
    Assignee: Siemens Aktiengesellschaft
    Inventor: Jenoe Tihanyi