Abstract: Present disclosure provide a capacitor includes: a semiconductor substrate; a laminated structure including n conductive layers and m dielectric layer(s), the i-th conductive layer being provided with at least one i-th isolation trench, the (i+1)-th conductive layer being provided above the i-th conductive layer and in the i-th isolation trench, isolation trenches in odd-numbered and even-numbered conductive layers having a first and a second overlap region in a vertical direction respectively, and the first overlap region not overlapping the second overlap region, where m, n, and i are positive integers, n?2, and 1?i?n?1; at least one first external electrode electrically connected to all odd-numbered conductive layer(s) through a first conductive via structure in the second overlap region; and at least one second external electrode electrically connected to all even-numbered conductive layer(s) through a second conductive via structure in the first overlap region.

Abstract: A capacitor and a method of fabricating the capacitor are provided. The capacitor includes a structure for forming a three-dimensional capacitor, the structure being a pillar structure or a trench structure; where when the structure is a pillar structure, the aspect ratio of the pillar structure is more than 10; when the structure is a trench structure, the capacitor further includes a substrate, the trench structure is formed by a material layer disposed on the surface of a base trench of the substrate, and the aspect ratio of the trench structure is more than 10. The aspect ratio of the pillar structure of the capacitor or the aspect ratio of the trench structure may be more than 10, so that the performance of the capacitor is better.

Abstract: Some embodiments provide a method that receives a request for information regarding a path between endpoints of a logical network. The method provides, for display, a visualization of the path including (i) a set of logical network components between the endpoints and (ii) a set of physical network components that implement the logical network components. The physical network components and the logical network components are aligned in the display. In some embodiments, the method receives data regarding a packet tracing operation between the endpoints. The method generates a display including (i) a visualization of the path between the endpoints of the logical network and (ii) a representation of the received data regarding the packet tracing operation, with the packet tracing operation data is visually linked to the components of the path.

Abstract: A capacitor includes a first electrode (1111) and a second electrode (1112); a laminated structure (160) including a first conductive layer, at least one dielectric layer (162, 164) and at least one second conductive layer (163, 165), where the first conductive layer includes at least one groove-shaped support (1611), the at least one dielectric layer and the at least one second conductive layer cover the at least one groove-shaped support, and the first conductive layer, the at least one dielectric layer and the at least one second conductive layer form a structure that a dielectric layer and a conductive layer are adjacent to each other; and an interconnection structure (190) configured to at least connect the first electrode and the second electrode to two adjacent conductive layers respectively.

Abstract: A capacitor includes at least one multi-wing structure; a laminated structure, where the laminated structure clads the at least one multi-wing structure and includes at least one dielectric layer and a plurality of conductive layers, and the at least one dielectric layer and the plurality of conductive layers form a structure that a conductive layer and a dielectric layer are adjacent to each other; at least one first external electrode, where the first external electrode is electrically connected to some conductive layer(s) in the plurality of conductive layers; at least one second external electrode, wherein the second external electrode is electrically connected to the other conductive layer(s) in the plurality of conductive layers, and a conductive layer in the laminated structure adjacent to each conductive layer in the some conductive layer(s) includes at least one conductive layer in the other conductive layer(s).

Abstract: The present application provides a thin film lithium ion battery, a preparation method thereof, and a terminal, where the thin film lithium ion battery includes: a base body which is provided with a groove and/or a protrusion; a thin film lithium ion battery cell which is provided on the base body, and covers the groove and/or the protrusion; and a first external electrode and a second external electrode which are configured to connect the thin film lithium ion battery cell to an external component. The thin film lithium ion battery in the present application uses the base body structured with the groove and/or the protrusion, which may increase the area of the thin film lithium ion battery, thus increasing the capacity of the thin film lithium ion battery.

Abstract: A capacitor includes: at least one multi-wing structure including N axes and M wings, where the N axes extend along a first direction, and the M wings are a convex structure formed by extending from side walls of the N axes toward a direction perpendicular to the first direction, a first wing of the M wings and the N axes are formed of a first conductive material, and other wings are formed of a second conductive material; a conductive structure cladding the multi-wing structure; a dielectric layer disposed between the multi-wing structure and the conductive structure to isolate the multi-wing structure from the conductive structure; a first external electrode electrically connected to some or all multi-wing structures; and a second external electrode electrically connected to the conductive structure.

Abstract: A capacitor includes: a semiconductor substrate including at least one substrate trench group; at least one laminated structure, each laminated structure includes n conductive layers and m dielectric layers, the first conductive layer in the n conductive layers is disposed above the semiconductor substrate and in the substrate trench group, the i-th conductive layer in the n conductive layers is provided with the i-th conductive layer trench group, and the (i+l)th conductive layer in the n conductive layers is disposed above the i-th conductive layer and in the i-th conductive layer trench group, where m, n, and i are positive integers, and n?2, 1?i?n?1; a first external electrode connected to some conductive layers; and a second external electrode connected to other conductive layers.

Abstract: Embodiments of the present application disclose a capacitor and a method for producing a capacitor. The capacitor includes: an electrode layer including a first electrode and a second electrode separated from each other; a laminated structure including n dielectric layer(s) and n+1 conductive layers, where the n dielectric layer(s) and the n+1 conductive layers form a structure that a conductive layer and a dielectric layer are adjacent to each other, and the laminated structure forms at least two columnar structures, and n is a positive integer; and an interconnection structure configured to electrically connect an odd-numbered conductive layer in the n+1 conductive layers to the first electrode and electrically connect an even-numbered conductive layer in the n+1 conductive layers to the second electrode. According to the technical solution of the embodiments of the present application, capacitance density of the capacitor could be improved.

Abstract: A capacitor includes: a substrate; a first trench entering the substrate downward from the upper surface of the substrate; a laminated structure provided in the first trench and including m dielectric layers and n conductive layers, the m dielectric layers and the n conductive layers forming a structure that a conductive layer and a dielectric layer are adjacent to each other, each dielectric layer of the m dielectric layers including at least one high-k insulating material with a relative dielectric constant k greater than a first threshold value, and each conductive layer of the n conductive layers including at least one high work function conductive material with a work function greater than a second threshold value, where m and n are positive integers; and a first electrode electrically connected to all odd-numbered conductive layers, and a second electrode electrically connected to all even-numbered conductive layers.

Abstract: A capacitor includes: a semiconductor substrate; at least one trench provided in the semiconductor substrate and formed downward from an upper surface of the semiconductor substrate; a first conductive layer provided above the semiconductor substrate and in the trench; a first insulating layer provided between the substrate and the first conductive layer to isolate the first conductive layer from the substrate; a second conductive layer provided above the r substrate and in the trench, the second conductive layer including a first and a second conductive region that are independent from each other, the first conductive region being electrically connected to the substrate, and the second conductive region being electrically connected to the first conductive layer; and a second insulating layer provided between the first and the second conductive layer to isolate the first conductive region from the first conductive layer and isolate the second conductive region from the substrate.

Abstract: The present disclosure provides a semiconductor structure and a production method thereof so that a non-linear trench structure can be produced, which can increase a surface area of the trench structure without increasing an aspect ratio and maintaining the same footprint. The semiconductor structure includes: a substrate including an upper surface and a lower surface disposed opposite to each other; and at least one trench structure disposed in the substrate and formed downward from the upper surface, where the trench structure is projected on the upper surface to form a first pattern in a curved or broken line shape, and the first pattern includes n second patterns adjacent to each other, and in the n second patterns, odd-numbered second patterns are the same, and even-numbered second patterns are the same, where n is a positive integer.

Abstract: A capacitor includes: a first electrode and a second electrode respectively configured to connect an external circuit; at least one support, the a support is a pillar-shaped or wall-shaped structure; a laminated structure including multiple conductive layers and multiple dielectric layers for insulating the conductive layers; and an interconnection structure electrically connects the first electrode and the second electrode to the first conductive layer and second conductive layer of the conductive layers respectively, the second conductive layer is adjacent to the first conductive layer, and the first conductive layer and second conductive layer are separated by a dielectric layer of the multiple dielectric layers. The capacitor is formed using a laminated structure, which could obtain a great capacitance value in a case of a small device size.

Abstract: A capacitor includes: a semiconductor substrate; a first insulating layer disposed under the substrate; a first trench group disposed in the substrate and the first insulating layer, the first trench group includes two first trenches which penetrate through the substrate downward from an upper surface of the substrate and enter the first insulating layer, and bottoms of the two first trenches are communicated to form a first cavity structure located in the first insulating layer; a laminated structure disposed above the substrate, in the first trench group, and in the first cavity structure, the laminated structure includes m insulating layers and n conductive layers forming a structure that each insulating layer electrically isolates each conductive layer from each other; a first electrode layer electrically connected to all odd-numbered conductive layers; and a second electrode layer electrically connected to all even-numbered conductive layers.

Abstract: Embodiments of the present disclosure provide a memcapacitor, a programming method for a memcapacitor and a capacitive random access memory. The memcapacitor includes: a source electrode made of a metal material; a first dielectric layer disposed at an outer side of the source electrode in a horizontal direction; a programming electrode disposed at an outer side of the first dielectric layer in the horizontal direction; a second dielectric layer disposed at an upper surface of the source electrode and an upper surface of the first dielectric layer; and a reading electrode disposed at an upper surface of the second dielectric layer, where the reading electrode, the second dielectric layer and the source electrode form a capacitor.

Abstract: A display device driving method is provided, which is applicable to a display device including pixel circuits coupled with a first node point, a source driving circuit for providing a data signal, and a reading circuit. The display device driving method includes operations: coupling the first node point with the source driving circuit or the reading circuit; supplying first control signals to the pixel circuits, where the first control signals sequentially provide a first impulse so that the pixel circuits sequentially receive the data signal from the first node point; supplying second control signals to optical sensing circuits, where the second control signals sequentially provide a second impulse so that the optical sensing circuits sequentially output a sensing signal to the first node point; amplifying the sensing signals and outputting the amplified sensing signals by the reading circuit, where durations of the first impulses the second impulses are not overlapped.

Abstract: The present disclosure provides an interactive method and apparatus based on user action information, and an electronic device. The method includes: judging whether a collected first image includes face information of N users authenticated by a terminal, where N is an integer greater than or equal to 2; recognizing action information of the N users in the first image, if the first image includes the face information of the N users authenticated by the terminal; determining, according to preset action information and the action information of the N users, a target user in the N users, where action information of the target user in the first image is the same as the preset action information; and displaying content bound with the target user according to the action information of the target user in the first image.

Abstract: The present disclosure relates to the technical field of cryogenic cooling. In particular, the present disclosure relates to a mechanical vibration-isolated, liquid helium consumption-free cryogenic cooling device. The system according to some embodiments of the present disclosure comprises: a closed-cycle cryogenic cooling system, a helium heat exchange gas cooling and vibration isolation interface system, a cryogenic throttle valve cooling system, and a temperature feedback control system. The closed-cycle cooling system includes a cold head, a compressor, and a helium pipeline. The cryogenic throttle valve cooling system is thermally coupled to a low-temperature end of the cooling and vibration isolation interface.

Abstract: A display device driving method, applicable to a display device including a pixel circuit coupled with a first node point, a source driving circuit for providing a data signal, and a reading circuit, including following operations: coupling the first node point with the source driving circuit or the reading circuit; supplying a first control signal to the pixel circuit, wherein the first control signal is for enabling the pixel circuit to receive the data signal from the first node point; supplying a second control signal to an optical sensing circuit, wherein the second control signal is for enabling the optical sensing circuit to output a sensing signal to the reading circuit through the first node point; utilizing the reading circuit to amplify the sensing signal and output the amplified sensing signal, wherein duration of the second impulse overlaps with duration of the first impulse.

Abstract: A fingerprint identification apparatus, a method for fabricating a cover and a terminal device are provided. A plurality of optical channels are arranged in the body of the cover, such that the light reflected by an object to be identified is as much as possible linearly transmitted to the photosensitive region in the image identification chip and the intensity of the light received by the image identification chip is maximized. This is favorable to form a clear image, and thus the precision of fingerprint identification of the fingerprint identification apparatus is improved. In addition, in the fingerprint identification apparatus, under the condition of satisfying the signal penetration rate, the cover may be as thick as possible, to further enhance the strength and reliability of the cover.