Abstract: A palm-type mechanical gripper with variable-position and rotatable fingers and a dual-drive crank-slider parallel mechanism is provided with a crank-slider mechanism on the left side, which is an active driving structure and is driven by two stepping motors to respectively generate angular displacement of cranks and to change lengths of connecting rods, and a crank-slider mechanism on the right side, which is a driven mechanism and is driven at a constant speed by a pair of gears. The mechanical gripper is provided with three plate spring fingers, wherein two fingers are respectively installed on the connecting rods on left and right sides, and under the cooperative effect of the two stepping motors, the eccentricities of the cranks, the positions and angles of the two fingers respectively on the two connecting rods and the position of the other fixed finger can be changed through manual adjustment.

Abstract: A palm-type mechanical gripper with variable-position and rotatable fingers and a crank-rocker-slider parallel mechanism adopts crank-rocker-slider mechanisms and three identical flexible plate spring fingers, wherein one finger is fixed, and the other two fingers can rotate and move to achieve translational motions and are respectively and symmetrically installed on connecting rods or rockers on left and right sides. The crank-rocker-slider mechanism on the left side is an active driving structure and is driven by two stepping motors to respectively generate angular displacement of cranks and linear movement of sliders. The crank-rocker-slider mechanism on the right side is a driven mechanism and is driven at a constant speed by a pair of gears. The eccentricities of the cranks, the positions and angles of the two fingers respectively on the two connecting rods or rockers and the position of the other fixed finger can be changed through manual adjustment.

Abstract: A supplier network device is provided and includes a supplier processor and memory that stores a credential package including information for a chip or a vehicle control module (VCM). The supplier processor: receives ID and signature public keys from the chip, where the ID and signature public keys correspond respectively to private keys stored in the chip; transmit the ID and signature public keys to a certificate authority processor of a vehicle manufacturer data center; and receive the credential package including signing certificates from the certificate authority processor prior to assembling the VCM. The supplier processor: reads the ID public key from the VCM subsequent to incorporating the chip in the VCM; identifies the credential package based on the ID public key; and based on the identifying of the credential package, programs the VCM with the signing certificates prior to installation of the vehicle control module in a vehicle.

Abstract: The present disclosure provides an image sensor including a substrate (400) and at least one pixel unit. The pixel unit comprises a photodetector (401) arranged in the substrate, a photosensitive surface of the photodetector facing a back surface of the substrate to generate a charge upon receiving an incident light from the back surface of the substrate, a spherical crown structure (406) arranged on the substrate and located on an opposite surface of the photosensitive surface, a conformal dielectric layer (420) arranged on the spherical crown structure and used to generate a dielectric-layer reflective light when the incident light reaches the conformal dielectric layer, and a reflective layer (430) arranged on the conformal dielectric layer and used to generate a reflective-layer reflective light when the incident light reaches the reflective layer. In this way, an absorption ratio for the incident light is increased, thereby improving signal quality of an image.

Abstract: An optical sensing circuit includes a first light sensor, a second light sensor, a third light sensor, a capacitor, and a sampling circuit. The first light sensor, the second light sensor, and the third light sensor are respectively covered by a first color filter, a second color filter, and a third color filter. The first light sensor is coupled to the capacitor, the sampling circuit, and the third light sensor. The second light sensor is coupled to the first light sensor and is configured to receive a first sensing signal. The third light sensor is coupled between the first light sensor and a voltage source.

Abstract: An optical sensor circuit is provided. In the optical sensor circuit, an output stage circuit transmits a voltage of first and second node to the output line according to a first driving signal. A first sensor is configured to generate a first photocurrent according to a first color light that senses an ambient light, and generate a second photocurrent according to a second color light. A second sensor is configured to generate a third photocurrent according to a third color light, and generate a fourth photocurrent according to the second color light. In a sensing phase, when the first sensor senses the first color light, and the second sensor senses the third color light, the first sensor adjusts a voltage level of the voltage according to the first photocurrent, and the second sensor adjusts the voltage level of the voltage according to the third photocurrent.

Abstract: Embodiments of the present disclosure provide a memcapacitor, a programming method for a memcapacitor and a capacitive random access memory. The memcapacitor includes: a source electrode made of a metal material; a first dielectric layer disposed at an outer side of the source electrode in a horizontal direction; a programming electrode disposed at an outer side of the first dielectric layer in the horizontal direction; a second dielectric layer disposed at an upper surface of the source electrode and an upper surface of the first dielectric layer; and a reading electrode disposed at an upper surface of the second dielectric layer, where the reading electrode, the second dielectric layer and the source electrode form a capacitor.

Abstract: An automatic power switching system includes a first power interface module coupled to a first power supply terminal for obtaining a first power signal, a second power interface module coupled to a second power supply terminal for obtaining a second power signal, a power input identification module for identifying whether the first power signal meets a requirement, a power output module for receiving the first power signal or the second power signal and for providing a corresponding power signal to a power consumption module, and a switch module for turning on the second power interface module and the power output module when confirming the first power signal not meeting the requirement.

Abstract: The present disclosure provides a calcium copper titanate film preparation method and a calcium copper titanate film, where the calcium copper titanate film has excellent step coverage, film thickness uniformity and film continuity, is particularly suitable for a high aspect ratio structure. The calcium copper titanate film preparation method includes: forming a layered deposition structure on a substrate, where the layered deposition structure includes at least one titanium dioxide layer, at least one copper oxide layer and at least one calcium oxide or calcium carbonate layer; and subjecting the layered deposition structure to high-temperature annealing treatment in an oxygen-containing atmosphere to obtain a calcium copper titanate film.

Abstract: A PUF device and a method of outputting a random sequence are disclosed. The PUF device includes: at least one processing unit and at least one PUF unit, and a first PUF unit of the at least one PUF unit includes a first MOS transistor and a second MOS transistor, two sources of the two MOS transistors are connected to a same input voltage; two gates of the two MOS transistors are floating; and two drains of the two MOS transistors are respectively connected with a first processing unit, and the first processing unit is configured to: output a first random value corresponding to the first PUF unit according to a difference between two results output by the two drains of the two MOS transistors, when the input voltage is greater than or equal to a preset voltage.

Abstract: Provided are an apparatus and a method of fingerprint identification and a terminal device, the fingerprint identification apparatus including: an optical sensor including a pixel array, the pixel array includes a plurality of first type of pixel points and at least one second type of pixel point, the plurality of first type of pixel points and the at least one second type of pixel point are configured to receive optical signals from an object; a color filter layer or a polarizer plate disposed above the at least one second type of pixel point; an intensity of an optical signal received by the at least one second type of pixel point and an intensity of an optical signal received by at least one first type of pixel point adjacent to the at least one second type of pixel point are used to determine whether the object is a real finger.

Abstract: A display device driving method, applicable to a display device including a pixel circuit coupled with a first node point, a source driving circuit for providing a data signal, and a reading circuit, including following operations: coupling the first node point with the source driving circuit or the reading circuit; supplying a first control signal to the pixel circuit, wherein the first control signal is for enabling the pixel circuit to receive the data signal from the first node point; supplying a second control signal to an optical sensing circuit, wherein the second control signal is for enabling the optical sensing circuit to output a sensing signal to the reading circuit through the first node point; utilizing the reading circuit to amplify the sensing signal and output the amplified sensing signal, wherein duration of the second impulse overlaps with duration of the first impulse.

Abstract: Embodiments of the present application provide a memristor electrode and a method for producing the same, an RRAM. The method includes: a. depositing a metal boride film on a substrate; b. performing annealing processing on the metal boride film; c. forming a photoresist layer on a surface of the metal boride film, and performing photolithography on the photoresist layer, to form a photolithographic pattern corresponding to a predetermined electrode pattern; and d. with the photolithographic pattern as a mask, etching the metal boride film by using an ion beam to form the metal boride film into the predetermined electrode pattern. According to the present disclosure, the memristor electrode produced using the metal boride is completely compatible with a CMOS producing process, and product performance of an RRAM including the memristor could be improved.

Abstract: A memory cell, a memory device and an operation method of a memory cell are provided. The memory cell includes: an anti-fuse transistor including a gate, a source and a drain, the anti-fuse transistor being formed by a Metal-Oxide-Semiconductor Field-Effect Transistor; and a gate tube, electrically connected to the gate of the anti-fuse transistor, where the gate and the source respectively forming two ends of a first anti-fuse capacitor, and the gate and the drain respectively form two ends of a second anti-fuse capacitor. Thus the area of the anti-fuse structure can be reduced, and the memory capacity of the memory cell can be improved.

Abstract: An e-fuse and a manufacturing method thereof, and a memory cell are provided. The method includes: providing a semiconductor substrate including a preset active region; forming an isolating region on the substrate, where the isolating region and the preset active region have a height difference and are connected by at least one side wall; forming a negative electrode and a positive electrode on the preset active region; and forming a fuse link on the side wall for connecting the negative electrode and the positive electrode. Accordingly, the line width of the fuse link is out of the limitation of the limit line width of the semiconductor process, the actual line width of the e-fuse may be smaller than the limit line width of the semiconductor process, and low fusing current is required for fusing.

Abstract: A capacitor and a method of fabricating the capacitor are provided. The capacitor includes a structure for forming a three-dimensional capacitor, the structure being a pillar structure or a trench structure; where when the structure is a pillar structure, the aspect ratio of the pillar structure is more than 10; when the structure is a trench structure, the capacitor further includes a substrate, the trench structure is formed by a material layer disposed on the surface of a base trench of the substrate, and the aspect ratio of the trench structure is more than 10. The aspect ratio of the pillar structure of the capacitor or the aspect ratio of the trench structure may be more than 10, so that the performance of the capacitor is better.

Abstract: Embodiments of the present application provide a memristor electrode material preparation method and apparatus, and a memristor electrode material. The preparation method includes: depositing a metal nitride on a substrate by a reactive sputtering process to obtain a metal nitride substrate; and subjecting the metal nitride substrate to laser annealing treatment in a nitrogen-containing atmosphere to nitride an unreacted metal on the metal nitride substrate, so as to obtain a memristor electrode material.

Abstract: A PUF device and a method of outputting a random sequence are disclosed. The PUF device includes: at least one processing unit and at least one PUF unit, and a first PUF unit of the at least one PUF unit includes a first MOS transistor and a second MOS transistor, two sources of the two MOS transistors are connected to a same input voltage; two gates of the two MOS transistors are floating; and two drains of the two MOS transistors are respectively connected with a first processing unit, and the first processing unit is configured to: output a first random value corresponding to the first PUF unit according to a difference between two results output by the two drains of the two MOS transistors, when the input voltage is greater than or equal to a preset voltage.

Abstract: A method for fabricating a double-sided capacitor is disclosed, which includes: etching trenches having depths not reaching an intermediate insulating layer and trench structures having depths exceeding the intermediate insulating layer on both sides of a silicon-on-insulator (SOI) substrate; and sequentially depositing an insulating dielectric film and a conductive material on surfaces of the trenches and the trenches, then removing insulating material at a bottom of the trenches and the trenches are filled with the conductive material to form conductive channels. The upper conductive channel of the SOI substrate is insulated from an upper layer and is electrically connected to a lower layer; and the lower conductive channel is insulated from the lower layer and is electrically connected to the upper layer.

Abstract: An embodiment of the present application relates to a trench capacitor and a method for manufacturing the same. The method for manufacturing the capacitor includes: fabricating a trench reaching a depth of a middle insulating layer on a semiconductor layer of an SOI substrate; and further growing an epitaxial layer of the semiconductor layer on a sidewall of the trench by selective epitaxial growth technology so as to further reduce a width of the trench; filling the trench with an electrically insulating material; and finally, fabricating two electrodes of the capacitor separately through a surface electrode. According to a trench capacitor and a method for manufacturing the same provided in an embodiment of the present application, a process flow is simple, and the capacitor manufactured has two advantages of high capacitance density and high breakdown voltage.