Abstract: An air permeable cap for a vehicle may include: a cover part formed in a cylindrical shape with a closed end part, and having a plurality of guide ribs radially formed on an inner circumferential surface thereof; a foam part inserted and installed in the cover part so as to be contacted with the guide ribs, and having a ventilation hole formed on one side thereof; a membrane part installed between the foam part and the cover part, and configured to block a flow of water through the ventilation hole and allow a flow of air through the ventilation hole; and an adhesion retention part coupled in a concave-convex shape to retain an adhesion force between the foam part and the cover part.

Abstract: Various embodiments include methods and devices for implementing automatic grammar augmentation for improving voice command recognition accuracy in systems with a small footprint acoustic model. Alternative expressions that may capture acoustic model decoding variations may be added to a grammar set. An acoustic model-specific statistical pronunciation dictionary may be derived by running the acoustic model through a large general speech dataset and constructing a command-specific candidate set containing potential grammar expressions. Greedy based and cross-entropy-method (CEM) based algorithms may be utilized to search the candidate set for augmentations with improved recognition accuracy.

Abstract: A printed circuit board includes a first insulating layer having a first modulus; a second insulating layer disposed on the first insulating layer and having a second modulus; and a cavity penetrating the second insulating layer, wherein the second modulus is greater than the first modulus, and wherein an edge portion of a bottom surface of the cavity is formed of an insulating material.

Abstract: There are provided a semiconductor memory device and a manufacturing method of the semiconductor memory device. A semiconductor memory device includes a lower stack structure on the substrate and including a plurality of lower layers stacked in a vertical direction, an intermediate stack structure on the lower stack structure and including a plurality of intermediate layers stacked in the vertical direction, a plurality of grooves in the contact region and penetrating the intermediate stack structure, the plurality of grooves exposing the lower stack structure at different depths, and a plurality of steps formed along sidewalls of the grooves.

Abstract: A semiconductor device including a plurality of active regions extending in a first direction on a substrate; a device isolation layer between the plurality of active regions such that upper portions of the plurality of active regions protrude from the device isolation layer; a first gate electrode and a second gate electrode extending in a second direction crossing the first direction and intersecting the plurality of active regions, respectively, on the substrate, the first gate electrode being spaced apart from the second gate electrode in the second direction; a first gate separation layer between the first gate electrode and the second gate electrode; and a second gate separation layer under the first gate separation layer and between the first gate electrode and the second gate electrode, the second gate separation layer extending into the device isolation layer in a third direction crossing the first direction and the second direction.

Abstract: A substrate having an electronic component embedded therein includes a core structure including a first insulating body and core wiring layers and having a cavity penetrating through a portion of the first insulating body, an electronic component disposed in the cavity, an insulating material covering at least a portion of each of the core structure and the electronic component and disposed in at least a portion of the cavity, a wiring layer disposed on the insulating material, and a build-up structure disposed on the insulating material and including a second insulating body and a build-up wiring layer. A material of the first insulating body has a coefficient of thermal expansion (CTE) less than a CTE of the second insulating body, and the insulating material has a CTE less than a CTE of a material of the second insulating body.

Abstract: Provided herein are a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes an etch stop pattern having a top surface and a sidewall disposed over a gate stack having interlayer insulating layers alternately stacked with conductive patterns. The semiconductor device also includes a plurality of channel structures passing through the etch stop pattern and the gate stack. The semiconductor device further includes an insulating layer extending to cover the top surface and the sidewall of the etch stop pattern, wherein a depression is included in a sidewall of the insulating layer. The semiconductor device additionally includes a contact plug passing through the insulating layer so that the contact plug is coupled to a channel structure of the plurality of channel structures.

Abstract: A printed circuit board includes: an insulating layer having one surface and the other surface; metal layers respectively disposed on the one surface and the other surface of the insulating layer; a through-hole penetrating through the insulating layer and the metal layers; a first plating layer disposed in a center portion of the through-hole in a thickness direction thereof; and a plug disposed in the through-hole.

Abstract: An antenna module includes a wiring structure including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers; an antenna disposed on an upper surface of the wiring structure; a heat dissipation structure disposed around the antenna on the upper surface of the wiring structure; and an encapsulant disposed on the upper surface of the wiring structure and covering at least a portion of each of the antenna and the heat dissipation structure.

Abstract: An antenna module includes a wiring structure including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers; an antenna disposed on an upper surface of the wiring structure; and an encapsulant disposed on the upper surface of the wiring structure and covering at least a portion of the antenna. An uppermost wiring layer of the plurality of wiring layers is connected to the antenna through a connection via of an uppermost via layer of the plurality of via layers. The connection via penetrates at least a portion of the encapsulant.

Abstract: A radio frequency package includes a first connection member having a first stack structure including at least one first insulating layer and at least one first wiring layer; a second connection member having a second stack structure including at least one second insulating layer and at least one second wiring layer; a core member including a core insulating layer and disposed between the first and second connection members; and a first chip antenna disposed to be surrounded by the core insulating layer. The first chip antenna includes a first dielectric layer disposed to be surrounded by the core insulating layer; a patch antenna pattern disposed on an upper surface of the first dielectric layer; and a feed via disposed to at least partially penetrate the first dielectric layer, providing a feed path of the patch antenna pattern and connected to the at least one first wiring layer.

Abstract: A printed circuit board includes a first insulating layer, a second insulating layer disposed on a lower surface of the first insulating layer, an electronic component embedded in the second insulating layer and at least partially in contact with the first insulating layer, a first wiring layer disposed on an upper surface of the first insulating layer, a second wiring layer disposed on a lower surface of the second insulating layer, and a first wiring via penetrating through the first and second insulating layers and connecting at least portions of the first and second wiring layers to each other.

Abstract: An interposer substrate includes a metal member; and a connection substrate disposed on at least portion of one side surface of the metal member. The connection substrate includes circuit patterns exposed from each of one surface of the connection substrate and the other surface of the connection substrate opposing the one surface, and one of a plurality of side surfaces of the connection substrate connecting one side and the other side of the connection substrate is attached to at least a portion of the one side surface of the metal member.

Abstract: A semiconductor device including a plurality of active regions extending in a first direction on a substrate; a device isolation layer between the plurality of active regions such that upper portions of the plurality of active regions protrude from the device isolation layer; a first gate electrode and a second gate electrode extending in a second direction crossing the first direction and intersecting the plurality of active regions, respectively, on the substrate, the first gate electrode being spaced apart from the second gate electrode in the second direction; a first gate separation layer between the first gate electrode and the second gate electrode; and a second gate separation layer under the first gate separation layer and between the first gate electrode and the second gate electrode, the second gate separation layer extending into the device isolation layer in a third direction crossing the first direction and the second direction.

Abstract: A semiconductor device includes a source structure penetrated by a first penetrating portion, a first stack structure disposed on the source structure and penetrated by a second penetrating portion overlapping the first penetrating portion.

Abstract: Some disclosed systems may include a microphone system having two or more microphones, an interface system and a control system. In some examples, the control system may be capable of receiving, via the interface system, audio data from two or more microphones of the microphone system, of determining a gesture location based, at least in part, on the audio data and of controlling one or more settings of the system based on the gesture location.

Abstract: There are provided a semiconductor memory device and a manufacturing method of the semiconductor memory device. A semiconductor memory device includes a lower stack structure on the substrate and including a plurality of lower layers stacked in a vertical direction, an intermediate stack structure on the lower stack structure and including a plurality of intermediate layers stacked in the vertical direction, a plurality of grooves in the contact region and penetrating the intermediate stack structure, the plurality of grooves exposing the lower stack structure at different depths, and a plurality of steps formed along sidewalls of the grooves.

Abstract: Provided herein are a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes an etch stop pattern having a top surface and a sidewall disposed over a gate stack having interlayer insulating layers alternately stacked with conductive patterns. The semiconductor device also includes a plurality of channel structures passing through the etch stop pattern and the gate stack. The semiconductor device further includes an insulating layer extending to cover the top surface and the sidewall of the etch stop pattern, wherein a depression is included in a sidewall of the insulating layer. The semiconductor device additionally includes a contact plug passing through the insulating layer so that the contact plug is coupled to a channel structure of the plurality of channel structures.

Abstract: Disclosed is a method of the apparatus for manufacturing a membrane-electrode assembly for a fuel cell. The method includes: (a) unwinding an electrolyte membrane sheet from an electrolyte membrane sheet roll, recovering a protect film attached on an electrolyte membrane, and supplying the electrolyte membrane along a set feed path; (b) unwinding a first electrode film sheet including a first electrode film continuously coated with an anode electrode layer and a second electrode film sheet including a second electrode film coated with a cathode electrode layer with a predetermined gap, and supplying the first electrode film sheet and the second electrode film sheet along the set feed path; (c) passing the electrolyte membrane and the first and second electrode film sheets through between a driving bonding roll and a driven bonding roll.

Abstract: A printed circuit board includes: a first insulating layer; and a heat radiating circuit pattern disposed on a first surface of the first insulating layer and having a pad and a via. The heat radiating circuit pattern includes: a first metal layer disposed on the first insulating layer; a graphite layer disposed on the first metal layer; and a second metal layer disposed on the graphite layer.