Patents by Inventor Kun Zhang

Kun Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230297642
    Abstract: The invention discloses a bearings-only target tracking method based on pseudo-linear maximum correlation entropy Kalman filtering, which introduces the correlation entropy function into pseudo-linear Kalman filtering to solve the problem of non-Gaussian noise. A bearings-only target tracking algorithm based on pseudo-linear maximum correlation entropy Kalman filtering is also proposed. The invention combines the maximum correlation entropy theory with pseudo-linear Kalman filtering, and the target tracking accuracy is higher and divergence can be avoided when working in a non-Gaussian environment.
    Type: Application
    Filed: December 26, 2022
    Publication date: September 21, 2023
    Inventors: BEI PENG, SHAN ZHONG, GANG WANG, HONGYU ZHANG, LINQIANG OUYANG, XINYUE YANG, XUDONG WEI, KUN ZHANG
  • Publication number: 20230282280
    Abstract: A method for forming a 3D memory device is provided. The method comprises forming an array wafer including a core array region, a staircase region, and a periphery region. Forming the array wafer includes forming an alternating dielectric stack on a first substrate, forming a plurality of channel structures in the alternating dielectric stack in the core array region, each channel structure including a functional layer and a channel layer, forming a staircase structure in the staircase region, and forming a plurality of dummy channel structures. The method further comprises bonding a CMOS wafer to the array wafer; and removing the first substrate; removing a portion of functional layer of each channel structure to expose channel layer, and doping the exposed portion of the channel layer.
    Type: Application
    Filed: May 4, 2022
    Publication date: September 7, 2023
    Applicant: Yangtze Memory Technologies Co., Ltd.
    Inventor: Kun ZHANG
  • Publication number: 20230282576
    Abstract: Embodiments of three-dimensional memory devices are disclosed. A disclosed memory structure can comprises a memory cell, a bit line contact coupled to the memory cell, a bit line coupled to the bit line contact, a source line contact coupled to the memory cell, and a source line coupled to the source line contact. The memory cell comprises a cylindrical body having a cylindrical shape, an insulating layer surrounding the cylindrical body, a word line contact surrounding a first portion of the insulating layer, the word line contact coupled to a word line, and a plurality of plate line contact segments surrounding a second portion of the insulating layer, the plurality of plate line contact segments coupled to a common plate line.
    Type: Application
    Filed: May 4, 2022
    Publication date: September 7, 2023
    Applicant: Yangtze Memory Technologies Co., Ltd.
    Inventors: Yuancheng Yang, DongXue Zhao, Tao Yang, Lei Liu, Di Wang, Kun Zhang, Wenxi Zhou, ZhiLiang Xia, ZongLiang Huo
  • Publication number: 20230281037
    Abstract: A cross-device task relay method, a cloud platform, and a non-transitory storage medium, which belong to the field of task relay. The present method coordinates and organizes in advance, by means of a cloud platform, target devices that may be used for cross-device task relay, such that relay execution of the same task in different devices may be implemented without a user's perception, thereby improving the efficiency of cross-device task relay and avoiding the interruption of task execution coherence caused by device replacement.
    Type: Application
    Filed: May 12, 2023
    Publication date: September 7, 2023
    Applicant: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventor: Kun ZHANG
  • Patent number: 11751394
    Abstract: Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a doped region of a substrate. The doped region includes dopants of a first type. The 3D memory device also includes a semiconductor layer on the doped region. The semiconductor layer includes dopants of a second type. The first type and the second type are different from each other. The 3D memory device also includes a memory stack having interleaved conductive layers and dielectric layers on the semiconductor layer. The 3D memory device further includes a channel structure extending vertically through the memory stack and the semiconductor layer into the doped region, a semiconductor plug extending vertically into the doped region, the semiconductor plug comprising dopants of the second type, and a source contact structure extending vertically through the memory stack to be in contact with the semiconductor plug.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: September 5, 2023
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Linchun Wu, Shan Li, Zhiliang Xia, Kun Zhang, Wenxi Zhou, Zongliang Huo
  • Patent number: 11724677
    Abstract: Described are devices, systems and methods for managing a supplemental brake control system in autonomous vehicles. In some aspects, a supplemental brake management system includes brake control hardware and software that operates with a sensing mechanism for determining the brake operational status and a control mechanism for activating the supplemental brake control in an autonomous vehicle, which can be implemented in addition to the vehicle's primary brake control system.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: August 15, 2023
    Assignee: TUSIMPLE, INC.
    Inventors: Xiaoling Han, Kun Zhang, Yu-Ju Hsu, Frederic Rocha, Zehua Huang, Charles A. Price
  • Publication number: 20230244925
    Abstract: Embodiments described herein provide a system and method for unsupervised anomaly detection. The system receives, via a communication interface, a dataset of instances that include anomalies. The system determines, via an inlier model, a set of noisy labels. The system trains a causality-based label-noise model based at least in part on the set of noisy labels and the set of high-confidence instances. The system determines an estimated proportion of anomalies in the dataset of instances. The system retrains the inlier model based on the estimated inlier samples. The system iteratively retrains the inlier model and the trained causality-based label-noise model based on the output from the corresponding retrained models not converging within the convergence threshold. The system extracts the anomaly detection model from the iteratively trained causality-based label-noise model.
    Type: Application
    Filed: January 31, 2022
    Publication date: August 3, 2023
    Inventors: Wenzhuo Yang, Chu Hong Hoi, Kun Zhang
  • Patent number: 11716853
    Abstract: Three-dimensional (3D) NAND memory devices and methods are provided. In one aspect, a fabrication method includes depositing a cover layer over a substrate, depositing a sacrificial layer over the cover layer, depositing a layer stack over the sacrificial layer, forming a channel layer extending through the layer stack and the sacrificial layer, performing a first epitaxial growth to deposit a first epitaxial layer on a side portion of the channel layer that is close to the substrate, removing the cover layer, and performing a second epitaxial growth to simultaneously thicken the first epitaxial layer and deposit a second epitaxial layer on the substrate. The layer stack includes first stack layers and second stack layers that are alternately stacked.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: August 1, 2023
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Linchun Wu, Kun Zhang, Wenxi Zhou, Zhiliang Xia
  • Patent number: 11708280
    Abstract: The present invention provides a method of preparing an MOF-coated monocrystal ternary positive electrode material. Firstly, a solution A of nickel, cobalt and manganese metal salts, an ammonia complexing agent solution and a caustic soda liquid are added to a reactor for reaction to obtain a precursor core; then, an organic carboxylate is dissolved in an amount of an organic solvent to obtain a solution B; the solution B and a manganese metal salt solution with a given concentration are added to the reactor and aged to obtain an MOF-coated core-shell structure precursor; the core-shell structure precursor is pre-sintered at a low temperature to obtain a nickel-cobalt-manganese oxide with monocrystal structure; the nickel-cobalt-manganese oxide with monocrystal structure is uniformly mixed with LiOH·H2O in a mortar and then calcined at a high temperature to obtain an MOF-coated monocrystal ternary positive electrode material.
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: July 25, 2023
    Assignees: GEM CO., LTD., JINGMEN GEM CO., LTD.
    Inventors: Kaihua Xu, Zhenkang Jiang, Kun Zhang, Xiaofei Xue, Cong Li, Haibo Sun, Kang Chen, Jun Li, Liangjiao Fan
  • Patent number: 11705437
    Abstract: An interconnection structure of a system on wafer and a PCB based on a TSV process and a method for manufacturing the same. The structure comprises a bottom structural part and a top structural part, the upper surface of the bottom structural part is provided with a plurality of positioning holes; the lower surface of the top structural part is provided with positioning pins; the upper surface of the bottom structural part is provided with a bottom groove, and a system on wafer is arranged in the bottom groove; the lower surface of the system on wafer is connected with the bottom groove; the lower surface of the top structural part is provided with a top groove, and a PCB preformed die is connected in the top groove, and the other end of the PCB preformed die is connected with the system on wafer by an elastic connector.
    Type: Grant
    Filed: January 19, 2023
    Date of Patent: July 18, 2023
    Assignee: ZHEJIANG LAB
    Inventors: Qingwen Deng, Kun Zhang, Shunbin Li, Ruyun Zhang
  • Publication number: 20230225124
    Abstract: A three-dimensional (3D) memory device includes a stack structure including interleaved first conductive layers and first dielectric layers, a channel structure extending through the stack structure along a first direction in contact with a first semiconductor layer at a bottom portion of the channel structure, and a slit structure extending through the stack structure along the first direction. The slit structure includes a slit core, and a second dielectric layer surrounding the slit core. A first width of the second dielectric layer near the first semiconductor layer is larger than a second width of the second dielectric layer away from the first semiconductor layer.
    Type: Application
    Filed: December 14, 2022
    Publication date: July 13, 2023
    Inventors: Linchun Wu, Kun Zhang, Wenxi Zhou, Shuangshuang Wu, Zhiliang Xia, Zongliang Huo
  • Publication number: 20230211788
    Abstract: Techniques are described for estimating road friction between a road and tires of a vehicle. A method includes receiving, from a temperature sensor on a vehicle, a temperature value that indicates a temperature of an environment in which a vehicle is operated, determining a first range of friction values that quantify a friction between a road and tires of a vehicle based on a function of the temperature value and an extent of precipitation in a region that indicate a hazardous driving condition, obtaining, from the first range of friction values, a value that quantifies the friction between the road and the tires of the vehicle, where the value is obtained based on a driving related behavior of the vehicle, and causing the vehicle to operate on the road based on the value obtained from the first range of friction values.
    Type: Application
    Filed: March 15, 2023
    Publication date: July 6, 2023
    Inventors: Kun ZHANG, Xiaoling HAN, Weina MAO, Zehua HUANG, Charles A. PRICE
  • Patent number: 11695170
    Abstract: Provided are a battery-level Ni—Co—Mn mixed solution and a preparation method for a battery-level Mn solution, the steps thereof comprising: acid dissolution (S1), alkalization to remove impurities (S2), synchronous precipitation of calcium, magnesium, and lithium (S3), deep ageing to remove impurities (S4), synergistic extraction (S5), and refining extraction (S6). The steps of deep ageing to remove impurities (S4) and synergistic extraction (S5) comprise: performing deep ageing on a filtrate obtained from the step of synchronous precipitation of calcium, magnesium, and lithium (S3), and after performing filtration to remove impurities, obtaining an aged filtrate; using P204 to extract the aged filtrate and obtain a loaded organic phase, and subjecting the loaded organic phase to staged back-extraction to obtain the battery-level Ni—Co—Mn mixed solution and a Mn-containing solution.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: July 4, 2023
    Assignees: JINGMEN GEM CO., LTD, GEM CO., LTD
    Inventors: Kaihua Xu, Zhenkang Jiang, Qinxiang Li, Kun Zhang, Wenjie Wang, Jun Wang, Shihong Wen
  • Patent number: 11695000
    Abstract: In certain aspects, a three-dimensional (3D) memory device includes a memory stack including interleaved conductive layers and dielectric layers, a plurality of channel structures each extending vertically through the memory stack, a conductive layer in contact with source ends of the plurality of channel structures, a first source contact electrically connected to the channel structures, and a second source contact electrically connected to the channel structures.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: July 4, 2023
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventor: Kun Zhang
  • Publication number: 20230209828
    Abstract: Embodiments of three-dimensional (3D) memory devices and methods for forming the same are disclosed. In an example, a method for forming a 3D memory device comprises forming a channel structure extending vertically through a memory stack into a semiconductor layer on a substrate. The memory stack comprises interleaved stack conductive layers and stack dielectric layers. The method further comprises forming an insulating structure in an opening extending vertically through the memory stack and at a distance away from the channel structure, and comprising a dielectric layer doped with at least one of hydrogen or an isotope of hydrogen.
    Type: Application
    Filed: March 6, 2023
    Publication date: June 29, 2023
    Inventors: Kun Zhang, Wenxi Zhou, Zhiliang Xia, Zongliang Huo
  • Publication number: 20230182742
    Abstract: A system includes an autonomous vehicle and a control device associated with the autonomous vehicle. The control device obtains a plurality of sensor data captured by sensors of the autonomous vehicle. The control device determines a plurality of rainfall levels based on the sensor data. Each rainfall level is captured by a different sensor. the control device determines an aggregated rainfall level in a particular time period by combining the plurality of rainfall levels determined during the particular time period. The control device selects a particular object detection algorithm for detecting objects by at least one sensor. The particular object detection algorithm is configured to filter at least a portion of interference caused by the aggregated rainfall level in the sensor data. The control device causes the particular object detection algorithm to be implemented for the at least one sensor.
    Type: Application
    Filed: December 13, 2022
    Publication date: June 15, 2023
    Inventors: Xiaoling Han, Zehua Huang, Kun Zhang
  • Publication number: 20230189516
    Abstract: The present disclosure is directed to a memory structure including a staircase structure. The staircase structure can include a bottom select gate, a plate line formed above the bottom select gate, and a word line formed above the plate line. The pillar can extend through the bottom select gate, the plate line, and the word line. The memory structure can also include a source structure formed under the pillar and a drain cap formed above the pillar. The memory structure can further include a bit line formed above the drain cap.
    Type: Application
    Filed: January 24, 2022
    Publication date: June 15, 2023
    Applicant: Yangtze Memory Technologies Co., Ltd.
    Inventors: Tao Yang, DongXue Zhao, Yuancheng Yang, Lei Liu, Kun Zhang, Di Wang, Wenxi Zhou, ZhiLiang Xia, ZongLiang Huo
  • Publication number: 20230180473
    Abstract: Aspects of the disclosure provide a semiconductor device and a method to manufacture the semiconductor device. A channel hole is formed in a stack including alternating first layers and second layers. The stack is formed over a substrate of the semiconductor device. A gate dielectric layer and a channel layer are sequentially formed in the channel hole. Laser annealing is performed on the channel layer using laser light. An incidence angle of the laser light on an upper surface of the channel layer causes a total internal reflection to occur at an interface between the channel layer and the gate dielectric layer and an interface between the channel layer and an insulating layer that is adjacent to the channel layer.
    Type: Application
    Filed: May 18, 2022
    Publication date: June 8, 2023
    Applicant: Yangtze Memory Technologies Co., Ltd.
    Inventors: Dongyu FAN, Yuancheng YANG, Kun ZHANG, Lei LIU, ZhiLiang XIA, ZongLiang HUO
  • Patent number: 11668637
    Abstract: A data processing method includes: collecting test data of a target rock sample in different gas adsorption experiments; the test data including pore sizes and pore volumes corresponding to the pore sizes and including at least two selected from the group consisting of the test data with pore sizes less than 3 nm in CO2 adsorption experiment, the test data with pore sizes in 1.5 nm to 250 nm in N2 adsorption experiment and the test data with pore sizes in 10 nm to 1000 ?m in high-pressure mercury adsorption experiment; and fitting the test data in overlapping ranges of the pore sizes using a least square method, and obtaining target pore volumes corresponding to the pore sizes respectively. The accuracy of joint characterization of shale pore structures can be improved by using mathematical methods to process the data in overlapping ranges of pore sizes among different characterization methods.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: June 6, 2023
    Assignees: SOUTHWEST PETROLEUM UNIVERSITY, CHINA UNIVERSITY OF GEOSCIENCES, WUHAN
    Inventors: Kun Zhang, Shu Jiang, Jun Peng, Xiaoming Zhao, Bin Li, Lei Chen, Pei Liu, Xuejiao Yuan, Fengli Han, Xueying Wang
  • Patent number: D999193
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: September 19, 2023
    Assignee: ONEPLUS TECHNOLOGY (SHENZHEN) CO., LTD.
    Inventors: Haoran Liu, Yizhong Fan, Kun Zhang