Patents by Inventor Man Han

Man Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • AIR CONDITIONING SYSTEM FOR MOTOR VEHICLES
    Publication number: 20130231036
    Abstract: An air conditioning system for motor vehicles includes an air conditioner case, a cold air path through which a cold air flows, a warm air path through which a warm air flows, a temperature control door arranged to swing between the cold air path and the warm air path so as to control an opening degree of the cold air path and an opening degree of the warm air path, a defrost vent arranged to discharge the cold air and the warm air toward an upper region of a vehicle room, a bypass duct arranged to bypass a part of the warm air toward the defrost vent, the bypass duct including an inlet aligned with the warm air path and an outlet aligned with the defrost vent, and a cold air introducing portion arranged in at least one of the inlet and the outlet of the bypass duct.
    Type: Application
    Filed: March 1, 2013
    Publication date: September 5, 2013
    Applicant: HALLA CLIMATE CONTROL CORP.
    Inventors: Doo Hoon Kim, Joong Man Han, Jun Kang Lee, Sang Kyu Park, Young Hum Han, Soo Byeong Nam
  • Programming memory devices
    Patent number: 8520436
    Abstract: A target memory cell of a memory device is programmed by applying a programming voltage to a word line that includes the target memory cell, determining whether the target memory cell is programmed, and increasing the programming voltage by a step voltage if it is determined that the target memory cell is not programmed. An initial programming voltage and the step voltage are each selectable after fabrication of the memory device.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: August 27, 2013
    Assignee: Round Rock Research, LLC
    Inventors: Dzung H. Nguyen, Benjamin Louie, Hagop A. Nazarian, Aaron Yip, Jin-Man Han
  • Temperature control method for chemical vapor deposition apparatus
    Patent number: 8481102
    Abstract: Provided is a method in which a difference between a surface temperature of a susceptor and a surface temperature of a substrate is accurately grasped without using a complicated high-priced equipment. A temperature control method for a chemical vapor deposition apparatus includes detecting a rotation state of a susceptor on which a substrate is accumulated on a top surface thereof, measuring a temperature of the top surface of the susceptor, calculating a temperature distribution of the top surface of the susceptor, based on the detected rotation state and the measured temperature, and controlling the temperature of the top surface of the susceptor, based on the calculated temperature distribution.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: July 9, 2013
    Assignee: LIGADP Co., Ltd.
    Inventors: Sung Jae Hong, Hong Won Lee, Seok Man Han, Joo Jin
  • CHIP RESISTOR AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20130154790
    Abstract: There is provided a chip resistor including a ceramic substrate; a first resistance layer formed on the ceramic substrate and including a first conductive metal and a first glass; and a second resistance layer formed on the first resistance layer, including a second conductive metal and a second glass, and having a smaller content of glass than the first resistance layer, thereby obtaining relatively low resistance and a relatively small temperature coefficient of resistance (TCR).
    Type: Application
    Filed: April 6, 2012
    Publication date: June 20, 2013
    Inventors: Jang Ho Park, Young Key Kim, Ki Won Suh, Jang Seok Yun, Jin Man Han, Sung Jun Kim
  • METHOD AND APPARATUS FOR SETTING UP GATEWAY FOR AUTOSAR-BASED VEHICLE NETWORK
    Publication number: 20130124703
    Abstract: The present invention provides a method and apparatus for setting up a gateway for an AUTOS AR-based vehicle network. The apparatus for setting up the gateway includes a candidate selection unit for selecting an Electronic Control Unit (ECU) connected to at least two communication clusters, from among a plurality of ECUs, as a gateway candidate, and a gateway generation unit for generating a gateway instance with reference to the ECU selected by the candidate selection unit, and generating a gateway meta-model including the gateway instance based on instance generation input values entered by a user.
    Type: Application
    Filed: July 31, 2012
    Publication date: May 16, 2013
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Joo-Chul LEE, Jeong-Hwan LEE, Hyun-Yong HWANG, Tae-Man HAN
  • APPARATUS AND METHOD FOR VERIFYING INTEROPERABILITY BETWEEN APPLICATION SOFTWARE AND AUTOSAR SERVICE
    Publication number: 20130103379
    Abstract: The present invention relates to an apparatus and method for verifying interoperability between application software and AUTOSAR services. The apparatus includes an AUTOSAR interoperability configuration unit configured to configure an interoperability relationship between AUTOSAR service components defined to provide the AUTOSAR services and the components of the application software for an Electronic Control Unit (ECU) performing functions requested by the application software and a simulation unit configured to perform simulations in order to verify whether the interoperated AUTOSAR service components and the components of the application software are normally driven or not based on scheduled task timing.
    Type: Application
    Filed: September 13, 2012
    Publication date: April 25, 2013
    Applicant: ELECTRONICS AND ELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hyun-Soon NAM, Ki-Soon SUNG, Tae-Man HAN
  • Ethernet-MOST gateway apparatus
    Patent number: 8391304
    Abstract: An Ethernet-MOST gateway apparatus for exchanging data between a MOST network transferring multimedia data within a vehicle and a packet network for a computer and Internet communications. The Ethernet-MOS gateway apparatus including: an Ethernet frame interface unit connected with a packet network to transmit and receive an Ethernet frame, and converting the Ethernet frame into a MOST frame; a MOST frame interface unit connected with a MOST network to transmit and receive the MOST frame, and converting the MOST frame into the Ethernet frame; and a switch fabric connecting the Ethernet frame interface unit and the MOST frame interface unit.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: March 5, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hyun Yong Hwang, Tae Man Han
  • Memory with interleaved read and redundant columns
    Patent number: 8379448
    Abstract: Apparatus and methods are disclosed, such as those involving a flash memory device. One such apparatus includes a memory block including a plurality of columns. Each of the columns includes a bit line and a plurality of memory cells on the bit line. The plurality of columns include a plurality of groups of regular columns and a plurality of groups of redundant columns. The apparatus also includes a plurality of data latches. Each of the data latches is configured to store data read from a respective one group of regular columns. The apparatus further includes a plurality of redundant data latches. Each of the redundant data latches is configured to store data read from a respective one group of redundant columns. The apparatus also includes a multiplexer configured to selectively output data from the plurality of data latches and the plurality of redundant data latches.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: February 19, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Jin-Man Han, Aaron Yip
  • ERASE OPERATION CONTROL SEQUENCING APPARATUS, SYSTEMS, AND METHODS
    Publication number: 20120320685
    Abstract: Apparatus, systems, and methods may operate to receive an external erase command at a control circuit coupled to an erasable memory array located on a substrate. A global select gate voltage may thereafter be enabled for application to wordline transistors coupled to the erasable memory array after a voltage applied to the substrate has reached a preselected initiation voltage level between about zero volts and an ultimate erase voltage.
    Type: Application
    Filed: August 30, 2012
    Publication date: December 20, 2012
    Inventors: Xiaojun Yu, Jin-man Han, Aaron Yip
  • METHOD OF STORING DATA ON A FLASH MEMORY DEVICE
    Publication number: 20120275230
    Abstract: Methods and apparatus are disclosed, such as those involving a flash memory device. One such method includes storing data on memory cells on a memory block including a plurality of word lines and a plurality of memory cells on the word lines. The word lines comprising one or more bottom edge word lines, one or more top edge word lines, and intermediate word lines between the bottom and top edge word lines. The data is stored first on memory cells on the intermediate word lines. Then, a remaining portion, if any, of the data is stored on memory cells on the bottom edge word lines and/or the top edge word lines. This method enhances the life of the flash memory by preventing a premature failure of memory cells on the bottom or top edge word lines, which can be more prone to failure.
    Type: Application
    Filed: July 11, 2012
    Publication date: November 1, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Jin-Man Han
  • Delayed activation of selected wordlines in memory
    Patent number: 8264886
    Abstract: Apparatus, systems, and methods may operate to receive an external read command at a control circuit coupled to a memory array. Individual wordline activation may be delayed according to a delay period determined by a read level voltage magnitude associated with a plurality of memory cells included in the array.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: September 11, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Xiaojun Yu, Jin-man Han
  • Erase operation control sequencing apparatus, systems, and methods
    Patent number: 8259508
    Abstract: Apparatus, systems, and methods may operate to receive an external erase command at a control circuit coupled to an erasable memory array located on a substrate. A global select gate voltage may thereafter be enabled for application to wordline transistors coupled to the erasable memory array after a voltage applied to the substrate has reached a preselected initiation voltage level between about zero volts and an ultimate erase voltage.
    Type: Grant
    Filed: July 30, 2010
    Date of Patent: September 4, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Xiaojun Yu, Jin-man Han, Aaron Yip
  • PROGRAMMING MEMORY DEVICES
    Publication number: 20120221779
    Abstract: A target memory cell of a memory device is programmed by applying a programming voltage to a word line that includes the target memory cell, determining whether the target memory cell is programmed, and increasing the programming voltage by a step voltage if it is determined that the target memory cell is not programmed. An initial programming voltage and the step voltage are each selectable after fabrication of the memory device.
    Type: Application
    Filed: May 4, 2012
    Publication date: August 30, 2012
    Applicant: ROUND ROCK RESEARCH, LLC
    Inventors: Dzung H. Nguyen, Benjamin Louie, Hagop A. Nazarian, Aaron Yip, Jin-Man Han
  • WORDLINE VOLTAGE TRANSFER APPARATUS, SYSTEMS, AND METHODS
    Publication number: 20120218825
    Abstract: The apparatus and systems described herein may comprise a plurality of memory cells coupled to a local wordline, and a wordline drive circuit that includes a regulator coupled to a plurality of pass transistors and a string driver. The regulator may comprise a regulator transistor having a threshold voltage that is substantially the same as the threshold voltage of the string driver during memory cell program operations. In some embodiments, the regulator may comprise a cascode-connected pair of transistors. Methods of manufacturing and operating the apparatus and systems are also described.
    Type: Application
    Filed: May 7, 2012
    Publication date: August 30, 2012
    Inventors: Xiaojun Yu, Jin-man Han
  • Method of programming nonvolatile memory device
    Patent number: 8238164
    Abstract: A method of programming a nonvolatile memory device comprises applying a gradually increasing program voltage to a memory cell, determining the number of verify voltages to be applied to the memory cell during a program loop based on the change of a threshold voltage from an initial state of the memory cell to a target state, and applying at least one of the determined verify voltages to the memory cell to verify whether the memory cell is programmed to the target state.
    Type: Grant
    Filed: November 1, 2010
    Date of Patent: August 7, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min Seok Kim, Jin Man Han, Ki Tae Park
  • Method of storing data on a flash memory device
    Patent number: 8230165
    Abstract: Methods and apparatus are disclosed, such as those involving a flash memory device. One such method includes storing data on memory cells on a memory block including a plurality of word lines and a plurality of memory cells on the word lines. The word lines comprising one or more bottom edge word lines, one or more top edge word lines, and intermediate word lines between the bottom and top edge word lines. The data is stored first on memory cells on the intermediate word lines. Then, a remaining portion, if any, of the data is stored on memory cells on the bottom edge word lines and/or the top edge word lines. This method enhances the life of the flash memory by preventing a premature failure of memory cells on the bottom or top edge word lines, which can be more prone to failure.
    Type: Grant
    Filed: May 9, 2011
    Date of Patent: July 24, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Jin-Man Han
  • APPARATUS AND METHOD FOR EVALUATING AUTOSAR META FILE-BASED BASIC SOFTWARE PROPERTIES
    Publication number: 20120167045
    Abstract: Disclosed herein is an apparatus for evaluating Automobile Open System Architecture (AUTOSAR) meta file-based basic software properties. The apparatus includes a meta file generation unit, a basic software configuration unit, and a basic software property evaluation unit. The meta file generation unit generates the meta file properties of an AUTOSAR meta file. The basic software configuration unit sets the basic software properties of a basic software configuration file. The basic software property evaluation unit evaluates basic software properties using the meta file properties in order to determine whether the basic software properties were set in conformity with an AUTOSAR standard.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 28, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Boo-Sun JEON, Hyun-Soon Nam, Ki-Soon Sung, Joo-Chul Lee, Tae-Man Han
  • APPARATUS AND METHOD FOR COLLECTING VEHICLE DIAGNOSTIC INFORMATION
    Publication number: 20120166040
    Abstract: Disclosed herein are an apparatus and method for collecting vehicle diagnostic information. The apparatus for collecting vehicle diagnostic information includes a conversion unit and an optical multiplexing unit. The conversion unit receives a plurality of frames complying with respective different protocols from a plurality of networks for vehicles, which collects vehicle diagnostic information, in electric signal form, and converts the plurality of frames into a plurality of optical signals having respective different wavelengths based on the wavelengths previously assigned to the respective protocols. The optical multiplexing unit generates a wavelength division multiplexed signal by performing wavelength division multiplexing (WDM) on the plurality of optical signals, and transmits the wavelength division multiplexed signal via an optical cable.
    Type: Application
    Filed: December 21, 2011
    Publication date: June 28, 2012
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Hyun-Yong HWANG, Tae-Man Han, Jee-Sook Eun, Chang-Gyu Lim, Chang-Min Shin, Seo-Hyun Jeon, Yang-Jae Jeong, Jeong-Hwan Kim, Mi-Ryong Park, Chul-Hong Kim
  • MENU PROVISION METHOD USING GESTURES AND MOBILE TERMINAL USING THE SAME
    Publication number: 20120166990
    Abstract: Disclosed herein is a menu provision method using gestures. In the menu provision method, a first gesture of a user which is performed on the specific area of the screen of a mobile terminal is recognized while the function of the mobile terminal is being performed. A menu start sign, which is used for displaying a menu ribbon, is displayed on the screen in response to the first gesture. Thereafter, the menu ribbon is displayed in response to a second gesture of the user which is performed on the menu start sign.
    Type: Application
    Filed: December 20, 2011
    Publication date: June 28, 2012
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Seo-Hyun JEON, Tae-Man Han
  • Non-volatile memory device with both single and multiple level cells
    Patent number: 8179721
    Abstract: A non-volatile memory array with both single level cells and multilevel cells. The single level and multilevel cells, in one embodiment, are alternated either along each bit line. An alternate embodiment alternates the single and multilevel cells along both the bit lines and the word lines so that no single level cell is adjacent to another single level cell in either the word line or the bit line directions.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: May 15, 2012
    Assignee: Round Rock Research, LLC
    Inventor: Jin-Man Han