Patents by Inventor Man Han

Man Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Programming memory devices
    Patent number: 8174889
    Abstract: A target memory cell of a memory device is programmed by applying a programming voltage to a word line that includes the target memory cell, determining whether the target memory cell is programmed, and increasing the programming voltage by a step voltage if it is determined that the target memory cell is not programmed. An initial programming voltage and the step voltage are each selectable after fabrication of the memory device.
    Type: Grant
    Filed: February 11, 2010
    Date of Patent: May 8, 2012
    Assignee: Round Rock Research, LLC
    Inventors: Dzung H. Nguyen, Benjamin Louie, Hagop A. Nazarian, Aaron Yip, Jin-Man Han
  • Wordline voltage transfer apparatus, systems, and methods
    Patent number: 8174900
    Abstract: The apparatus and systems described herein may comprise a plurality of memory cells coupled to a local wordline, and a wordline drive circuit that includes a regulator coupled to a plurality of pass transistors and a string driver. The regulator may comprise a regulator transistor having a threshold voltage that is substantially the same as the threshold voltage of the string driver during memory cell program operations. In some embodiments, the regulator may comprise a cascode-connected pair of transistors. Methods of manufacturing and operating the apparatus and systems are also described.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: May 8, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Xiaojun Yu, Jin-man Han
  • VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME
    Publication number: 20120098048
    Abstract: A vertical memory device includes a channel, a ground selection line (GSL), word lines and a string selection line (SSL). The channel extends in a first direction substantially perpendicular to a top surface of a substrate, and a thickness of the channel is different according to height. The GSL, the word lines and the SSL are sequentially formed on a sidewall of the channel in the first direction and spaced apart from each other.
    Type: Application
    Filed: August 30, 2011
    Publication date: April 26, 2012
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Byeong-In CHOE, Jae-Hoon JANG, Sun-Il SHIM, Han-Soo KIM, Jin-Man HAN
  • MEMORY WITH INTERLEAVED READ AND REDUNDANT COLUMNS
    Publication number: 20120069659
    Abstract: Apparatus and methods are disclosed, such as those involving a flash memory device. One such apparatus includes a memory block including a plurality of columns. Each of the columns includes a bit line and a plurality of memory cells on the bit line. The plurality of columns include a plurality of groups of regular columns and a plurality of groups of redundant columns. The apparatus also includes a plurality of data latches. Each of the data latches is configured to store data read from a respective one group of regular columns. The apparatus further includes a plurality of redundant data latches. Each of the redundant data latches is configured to store data read from a respective one group of redundant columns. The apparatus also includes a multiplexer configured to selectively output data from the plurality of data latches and the plurality of redundant data latches.
    Type: Application
    Filed: November 30, 2011
    Publication date: March 22, 2012
    Applicant: Micron Technology, Inc.
    Inventors: Jin-Man Han, Aaron Yip
  • Memory device with a decreasing dynamic pass voltage for reducing read-disturb effect
    Patent number: 8120952
    Abstract: The present disclosure includes methods, devices, modules, and systems for operating memory cells. One method embodiment includes applying sensing voltages to selected access lines for sensing selected memory cells. The method also includes applying a dynamic pass voltage to unselected access lines while the sensing voltages are applied.
    Type: Grant
    Filed: March 11, 2010
    Date of Patent: February 21, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Jin-Man Han
  • Flash memory device with redundant columns
    Patent number: 8081511
    Abstract: Apparatus and methods are disclosed, such as those involving a flash memory device. One such apparatus includes a memory block including a plurality of columns. Each of the columns includes a bit line and a plurality of memory cells on the bit line. The plurality of columns include a plurality of groups of regular columns and a plurality of groups of redundant columns. The apparatus also includes a plurality of data latches. Each of the data latches is configured to store data read from a respective one group of regular columns. The apparatus further includes a plurality of redundant data latches. Each of the redundant data latches is configured to store data read from a respective one group of redundant columns. The apparatus also includes a multiplexer configured to selectively output data from the plurality of data latches and the plurality of redundant data latches.
    Type: Grant
    Filed: October 5, 2010
    Date of Patent: December 20, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Jin-Man Han, Aaron Yip
  • Memory block reallocation in a flash memory device
    Patent number: 8072816
    Abstract: A non-volatile memory device has the pages of a certain memory block reallocated to other blocks in order to increase decrease disturb and increase reliability. Each of the reallocation blocks that contain the reallocated pages from the desired memory block are coupled to a wordline driver. These wordline drivers have a subset of the global wordlines as inputs. The desired wordline driver is selected by an appropriate select signal from a block decoder and an indication on an appropriate global wordline. This causes the wordline driver to generate a local wordline to the desired block with the reallocated page to be accessed.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: December 6, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Jin-Man Han, Aaron Yip
  • Method apparatus, and system providing adjustable memory page configuration
    Patent number: 8064258
    Abstract: A method, apparatus and system providing a memory device having an array of cells which may be selectively designated for either error correction code use or redundancy cell use.
    Type: Grant
    Filed: May 19, 2009
    Date of Patent: November 22, 2011
    Assignee: Micron Technology, Inc.
    Inventor: Jin-Man Han
  • DC power supply for varying output voltage according to load current variation
    Patent number: 8054653
    Abstract: A direct current (DC) power supply for varying an output voltage according to a load current variation is disclosed. The DC power supply includes an alternating current (AC)/DC conversion unit converting commercial AC power into DC power, a DC/DC conversion unit converting a voltage level of the DC power and outputting output power, and a control unit controlling conversion of the voltage level of the fed-back DC power according to a variation in a load current of the output power from the DC/DC conversion unit.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: November 8, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Byoung Woo Ryu, Chong Eun Kim, Dong Seong Oh, Jeong Man Han
  • METHOD OF STORING DATA ON A FLASH MEMORY DEVICE
    Publication number: 20110213918
    Abstract: Methods and apparatus are disclosed, such as those involving a flash memory device. One such method includes storing data on memory cells on a memory block including a plurality of word lines and a plurality of memory cells on the word lines. The word lines comprising one or more bottom edge word lines, one or more top edge word lines, and intermediate word lines between the bottom and top edge word lines. The data is stored first on memory cells on the intermediate word lines. Then, a remaining portion, if any, of the data is stored on memory cells on the bottom edge word lines and/or the top edge word lines. This method enhances the life of the flash memory by preventing a premature failure of memory cells on the bottom or top edge word lines, which can be more prone to failure.
    Type: Application
    Filed: May 9, 2011
    Publication date: September 1, 2011
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Jin-Man Han
  • Hybrid implicit token carrier sensing multiple access/collision avoidance protocol
    Patent number: 7974302
    Abstract: Provided is a distributed and asynchronous implicit token carrier sense multiple access/collision avoidance (CSMA/CA) protocol guaranteeing quality of service for both real time and non-real time traffic. The implicit token CSMA/CA protocol allocates a band in an entire bandwidth to voice traffic and allows the remaining bands to be used for data traffic. The implicit token CSMA/CA protocol includes applying a token passing protocol to transmit voice traffic in real time by having a band in an entire bandwidth allocated using a predetermined data frame and applying a CSMA/CA mechanism to transmit data traffic in non-real time by employing remaining bands not allocated to the voice traffic using another predetermined data frame.
    Type: Grant
    Filed: October 13, 2009
    Date of Patent: July 5, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Tae Man Han, You Hyeon Jeong, Heesung Chae, Dong Won Kim, Jun Hwa Lee
  • APPARATUS AND METHOD FOR CONTROLLING DUAL DISPLAY DEVICE USING RGB INTERFACE
    Publication number: 20110157106
    Abstract: Dual display control device and method using an RGB interface are provided. A dual display control device controlling a first display device and a second display device using an RGB interface includes: a synchronization signal output unit that outputs vertical and horizontal synchronization signals to the first display device and the second display device; and a data output unit that outputs first data to the first display device in a first section of a first pixel clock and outputs second data to the second display device in a second section of a second pixel clock, in accordance with the vertical and horizontal synchronization signal via a data line shared by and connected to the first display device and the second display device. Accordingly, it is possible to reduce the number of signal lines, thereby embodying an efficient hardware configuration.
    Type: Application
    Filed: October 12, 2010
    Publication date: June 30, 2011
    Inventors: Hyo-June Kim, Jeong-Man Han
  • ETHERNET-MOST GATEWAY APPARATUS
    Publication number: 20110149982
    Abstract: An Ethernet-MOST gateway apparatus for exchanging data between a MOST network transferring multimedia data within a vehicle and a packet network for a computer and Internet communications. The Ethernet-MOS gateway apparatus including: an Ethernet frame interface unit connected with a packet network to transmit and receive an Ethernet frame, and converting the Ethernet frame into a MOST frame; a MOST frame interface unit connected with a MOST network to transmit and receive the MOST frame, and converting the MOST frame into the Ethernet frame; and a switch fabric connecting the Ethernet frame interface unit and the MOST frame interface unit.
    Type: Application
    Filed: September 3, 2010
    Publication date: June 23, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hyun Yong HWANG, Tae Man HAN
  • TEMPERATURE CONTROL METHOD FOR CHEMICAL VAPOR DEPOSITION APPARATUS
    Publication number: 20110143016
    Abstract: Provided is a method in which a difference between a surface temperature of a susceptor and a surface temperature of a substrate is accurately grasped without using a complicated high-priced equipment. A temperature control method for a chemical vapor deposition apparatus includes detecting a rotation state of a susceptor on which a substrate is accumulated on a top surface thereof, measuring a temperature of the top surface of the susceptor, calculating a temperature distribution of the top surface of the susceptor, based on the detected rotation state and the measured temperature, and controlling the temperature of the top surface of the susceptor, based on the calculated temperature distribution.
    Type: Application
    Filed: September 14, 2010
    Publication date: June 16, 2011
    Applicant: LIGADP CO., LTD.
    Inventors: Sung Jae Hong, Hong Won Lee, Seok Man Han, Joo Jin
  • Method of storing data on a flash memory device
    Patent number: 7949821
    Abstract: Methods and apparatus are disclosed, such as those involving a flash memory device. One such method includes storing data on memory cells on a memory block including a plurality of word lines and a plurality of memory cells on the word lines. The word lines comprising one or more bottom edge word lines, one or more top edge word lines, and intermediate word lines between the bottom and top edge word lines. The data is stored first on memory cells on the intermediate word lines. Then, a remaining portion, if any, of the data is stored on memory cells on the bottom edge word lines and/or the top edge word lines. This method enhances the life of the flash memory by preventing a premature failure of memory cells on the bottom or top edge word lines, which can be more prone to failure.
    Type: Grant
    Filed: June 12, 2008
    Date of Patent: May 24, 2011
    Assignee: Micron Technology, Inc.
    Inventor: Jin-Man Han
  • METHOD OF PROGRAMMING NONVOLATILE MEMORY DEVICE
    Publication number: 20110110154
    Abstract: A method of programming a nonvolatile memory device comprises applying a gradually increasing program voltage to a memory cell, determining the number of verify voltages to be applied to the memory cell during a program loop based on the change of a threshold voltage from an initial state of the memory cell to a target state, and applying at least one of the determined verify voltages to the memory cell to verify whether the memory cell is programmed to the target state.
    Type: Application
    Filed: November 1, 2010
    Publication date: May 12, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min Seok KIM, Jin Man HAN, Ki Tae PARK
  • EMF MODEL SYNCHRONIZATION METHOD AND SYSTEM
    Publication number: 20110072410
    Abstract: Provided are an EMF model synchronization method and system. The system calculates a weight based on a hierarchy for an object identifier in a changed model, when the change of the model occurs in an EMF model which has an XML element path as an attribute. The system accumulates the calculated weight to a sum of weights. When the sum of weights becomes greater than the threshold value, the system simultaneously updates all models which are changed until the sum of weights becomes greater than the threshold value, thereby synchronizing change contents. As a hierarchy of an identifier changed on an XML path becomes higher, the weight is determined to have a larger value.
    Type: Application
    Filed: May 27, 2010
    Publication date: March 24, 2011
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Joo Chul Lee, Tae Man Han
  • FLASH MEMORY DEVICE WITH REDUNDANT COLUMNS
    Publication number: 20110019474
    Abstract: Apparatus and methods are disclosed, such as those involving a flash memory device. One such apparatus includes a memory block including a plurality of columns. Each of the columns includes a bit line and a plurality of memory cells on the bit line. The plurality of columns include a plurality of groups of regular columns and a plurality of groups of redundant columns. The apparatus also includes a plurality of data latches. Each of the data latches is configured to store data read from a respective one group of regular columns. The apparatus further includes a plurality of redundant data latches. Each of the redundant data latches is configured to store data read from a respective one group of redundant columns. The apparatus also includes a multiplexer configured to selectively output data from the plurality of data latches and the plurality of redundant data latches.
    Type: Application
    Filed: October 5, 2010
    Publication date: January 27, 2011
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Jin-Man Han, Aaron Yip
  • NON-VOLATILE MEMORY DEVICE WITH BOTH SINGLE AND MULTIPLE LEVEL CELLS
    Publication number: 20110013451
    Abstract: A non-volatile memory array with both single level cells and multilevel cells. The single level and multilevel cells, in one embodiment, are alternated either along each bit line. An alternate embodiment alternates the single and multilevel cells along both the bit lines and the word lines so that no single level cell is adjacent to another single level cell in either the word line or the bit line directions.
    Type: Application
    Filed: September 29, 2010
    Publication date: January 20, 2011
    Applicant: ROUND ROCK RESEARCH, LLC
    Inventor: Jin-Man Han
  • NAND system with a data write frequency greater than a command-and-address-load frequency
    Patent number: 7855927
    Abstract: The invention provides methods and apparatus. A NAND flash memory device receives command and address signals at a first frequency and a data signal at a second frequency that is greater than the first frequency.
    Type: Grant
    Filed: July 6, 2009
    Date of Patent: December 21, 2010
    Assignee: Micron Technology, Inc.
    Inventor: Jin-Man Han