Patents by Inventor Man Han

Man Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100296348
    Abstract: Apparatus, systems, and methods may operate to receive an external erase command at a control circuit coupled to an erasable memory array located on a substrate. A global select gate voltage may thereafter be enabled for application to wordline transistors coupled to the erasable memory array after a voltage applied to the substrate has reached a preselected initiation voltage level between about zero volts and an ultimate erase voltage.
    Type: Application
    Filed: July 30, 2010
    Publication date: November 25, 2010
    Inventors: Xiaojun Yu, Jin-man Han, Aaron Yip
  • Patent number: 7821830
    Abstract: Apparatus and methods are disclosed, such as those involving a flash memory device. One such apparatus includes a memory block including a plurality of columns. Each of the columns includes a bit line and a plurality of memory cells on the bit line. The plurality of columns include a plurality of groups of regular columns and a plurality of groups of redundant columns. The apparatus also includes a plurality of data latches. Each of the data latches is configured to store data read from a respective one group of regular columns. The apparatus further includes a plurality of redundant data latches. Each of the redundant data latches is configured to store data read from a respective one group of redundant columns. The apparatus also includes a multiplexer configured to selectively output data from the plurality of data latches and the plurality of redundant data latches.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: October 26, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Jin-Man Han, Aaron Yip
  • Patent number: 7808822
    Abstract: A non-volatile memory array with both single level cells and multilevel cells. The single level and multilevel cells, in one embodiment, are alternated either along each bit line. An alternate embodiment alternates the single and multilevel cells along both the bit lines and the word lines so that no single level cell is adjacent to another single level cell in either the word line or the bit line directions.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: October 5, 2010
    Assignee: Round Rock Research, LLC
    Inventor: Jin-Man Han
  • Publication number: 20100246491
    Abstract: An operating method and an apparatus according to data duplicate retransmission in a mobile communication system are provided. A method of a User Equipment (UE) according to data duplicate retransmission in a mobile communication system includes storing a Media Access Control Protocol Data Unit (MAC PDU) received from an Evolved Node B (ENB) in a soft buffer, decoding the MAC PDU, determining whether the decoding is a first successful decoding of data of the corresponding soft buffer, and determining whether to forward the decoded MAC PDU to an upper layer according to the determination result.
    Type: Application
    Filed: March 24, 2010
    Publication date: September 30, 2010
    Applicant: SAMSUNG ELECTRONICS CO. LTD.
    Inventors: Byoung-Jae BAE, Soeng-Hun KIM, Sung-Man HAN, Jun-Sung LEE, Gert-Jan Van LIESHOUT
  • Patent number: 7778086
    Abstract: Apparatus, systems, and methods may operate to receive an external erase command at a control circuit coupled to an erasable memory array located on a substrate. A global select gate voltage may thereafter be enabled for application to wordline transistors coupled to the erasable memory array after a voltage applied to the substrate has reached a preselected initiation voltage level between about zero volts and an ultimate erase voltage.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: August 17, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Xiaojun Yu, Jin-man Han, Aaron Yip
  • Publication number: 20100165741
    Abstract: The present disclosure includes methods, devices, modules, and systems for operating memory cells. One method embodiment includes applying sensing voltages to selected access lines for sensing selected memory cells. The method also includes applying a dynamic pass voltage to unselected access lines while the sensing voltages are applied.
    Type: Application
    Filed: March 11, 2010
    Publication date: July 1, 2010
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Jin-Man Han
  • Publication number: 20100158045
    Abstract: Provided is a method for transmitting/receiving data in a CAN protocol. First, it is determined whether the size of CAN message data to be transmitted exceeds the size of the data field. If the size of the CAN message data exceeds the size of the data field, the CAN message data are fragmented to generate data fragments smaller in size than the data field, A CAN data frame including a control field and a data field is generated with respect to each of the data fragments, and the generated CAN data frame is transmitted.
    Type: Application
    Filed: August 19, 2009
    Publication date: June 24, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chang Min Shin, Tae Man Han, Ho Sang Ham, Won Jun Lee
  • Publication number: 20100162203
    Abstract: Provided are a project management device and a method for an architecture modeling tool of AUTOSAR application software. The device includes an interface unit, a command execution unit, and a workspace management unit. The interface unit receives a processing command affecting project resources from a user, classifies the received command, and executes a corresponding call processing. The command execution unit analyzes a command inputted from the interface unit or delivered from a tool. If the command is a tool stop command, the device is stopped. If the command is an interface input command or is not the tool stop command, the command is classified into a description resource build command and a model update command to be executed. The workspace management unit creates, deletes, and updates contents of a workspace to reflect a processing result executed by the command execution unit on the workspace.
    Type: Application
    Filed: August 28, 2009
    Publication date: June 24, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jeong Si KIM, Tae Man Han
  • Publication number: 20100142280
    Abstract: A target memory cell of a memory device is programmed by applying a programming voltage to a word line that includes the target memory cell, determining whether the target memory cell is programmed, and increasing the programming voltage by a step voltage if it is determined that the target memory cell is not programmed. An initial programming voltage and the step voltage are each selectable after fabrication of the memory device.
    Type: Application
    Filed: February 11, 2010
    Publication date: June 10, 2010
    Inventors: Dzung H. Nguyen, Benjamin Louie, Hagop A. Nazarian, Aaron Yip, Jin-Man Han
  • Publication number: 20100135084
    Abstract: The apparatus and systems described herein may comprise a plurality of memory cells coupled to a local wordline, and a wordline drive circuit that includes a regulator coupled to a plurality of pass transistors and a string driver. The regulator may comprise a regulator transistor having a threshold voltage that is substantially the same as the threshold voltage of the string driver during memory cell program operations. In some embodiments, the regulator may comprise a cascode-connected pair of transistors. Methods of manufacturing and operating the apparatus and systems are also described.
    Type: Application
    Filed: February 2, 2010
    Publication date: June 3, 2010
    Inventors: Xiaojun Yu, Jin-man Han
  • Patent number: 7720603
    Abstract: Provided is a network global positioning system (GPS) terminal. The network GPS terminal includes: a GPS receiver receiving GPS data; a GPS processor processing the received GPS data to a predetermined form; a network communication part communicating with an external apparatus through a network in order to receive a request for the GPS data from the external apparatus, and transmit the processed GPS data to the external apparatus in response to the request; a security access controller authenticating the external apparatus; and a network management part managing connection information and security information of the external apparatus, the network communication part simultaneously communicating with at least one external apparatus using a TCP/IP protocol. A method of providing GPS data using a network is also provided.
    Type: Grant
    Filed: October 17, 2007
    Date of Patent: May 18, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Mi Ryong Park, Tae Man Han, Man Seok Yang, Dong Sun Lim
  • Patent number: 7719888
    Abstract: The present disclosure includes methods, devices, modules, and systems for operating memory cells. One method embodiment includes applying sensing voltages to selected access lines for sensing selected memory cells. The method also includes applying a dynamic pass voltage to unselected access lines while the sensing voltages are applied.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: May 18, 2010
    Assignee: Micron Technology, Inc.
    Inventor: Jin-Man Han
  • Publication number: 20100118611
    Abstract: Apparatus, systems, and methods may operate to receive an external read command at a control circuit coupled to a memory array. Individual wordline activation may be delayed according to a delay period determined by a read level voltage magnitude associated with a plurality of memory cells included in the array.
    Type: Application
    Filed: January 15, 2010
    Publication date: May 13, 2010
    Inventors: Xiaojun Yu, Jin-man Han
  • Patent number: 7707368
    Abstract: Methods and apparatus are provided. A memory device has a memory array, base trim circuitry adapted to store base control parameter values common to the memory array, and a reference trim circuit corresponding to a portion of the memory array. The reference trim circuit is adapted to store one or more reference control parameter values for respectively correcting one or more of the base control parameter values of the base trim circuitry for application to the portion of the memory array. The memory device may include an index circuit corresponding to the reference trim circuit. The index circuit is adapted to store one or more index parameter values for respectively selecting the one or more base control parameter values of the base trim circuitry for correction by the one or more reference control parameter values of the reference trim circuit.
    Type: Grant
    Filed: October 7, 2008
    Date of Patent: April 27, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Benjamin Louie, Aaron Yip, Jin-Man Han
  • Patent number: 7688630
    Abstract: A target memory cell of a memory device is programmed by applying a programming voltage to a word line that includes the target memory cell, determining whether the target memory cell is programmed, and increasing the programming voltage by a step voltage if it is determined that the target memory cell is not programmed. An initial programming voltage and the step voltage are each selectable after fabrication of the memory device.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: March 30, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Dzung H. Nguyen, Benjamin Louie, Hagop A. Nazarian, Aaron Yip, Jin-Man Han
  • Publication number: 20100027558
    Abstract: Provided is a distributed and asynchronous implicit token carrier sense multiple access/collision avoidance (CSMA/CA) protocol guaranteeing quality of service for both real time and non-real time traffic. The implicit token CSMA/CA protocol allocates a band in an entire bandwidth to voice traffic and allows the remaining bands to be used for data traffic. The implicit token CSMA/CA protocol includes applying a token passing protocol to transmit voice traffic in real time by having a band in an entire bandwidth allocated using a predetermined data frame and applying a CSMA/CA mechanism to transmit data traffic in non-real time by employing remaining bands not allocated to the voice traffic using another predetermined data frame.
    Type: Application
    Filed: October 13, 2009
    Publication date: February 4, 2010
    Inventors: Tae Man HAN, You Hyeon JEONG, Heesung CHAE, Dong Won KIM, Jun Hwa LEE
  • Patent number: 7656740
    Abstract: The apparatus and systems comprise a plurality of memory cells coupled to a local wordline, and a wordline drive circuit that includes a regulator coupled to a plurality of pass transistors and a string driver. The regulator may comprise a regulator transistor having a threshold voltage that is substantially the same as the threshold voltage of the string driver during memory cell program operations. The regulator may comprise a cascode-connected pair of transistors. Methods of manufacturing and operating the apparatus and systems are also described.
    Type: Grant
    Filed: February 5, 2007
    Date of Patent: February 2, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Xiaojun Yu, Jin-man Han
  • Publication number: 20100020609
    Abstract: Apparatus and methods are disclosed, such as those involving a flash memory device. One such apparatus includes a memory block including a plurality of columns. Each of the columns includes a bit line and a plurality of memory cells on the bit line. The plurality of columns include a plurality of groups of regular columns and a plurality of groups of redundant columns. The apparatus also includes a plurality of data latches. Each of the data latches is configured to store data read from a respective one group of regular columns. The apparatus further includes a plurality of redundant data latches. Each of the redundant data latches is configured to store data read from a respective one group of redundant columns. The apparatus also includes a multiplexer configured to selectively output data from the plurality of data latches and the plurality of redundant data latches.
    Type: Application
    Filed: July 23, 2008
    Publication date: January 28, 2010
    Applicant: Micron Technology, Inc.
    Inventors: Jin-Man Han, Aaron Yip
  • Patent number: 7649783
    Abstract: Apparatus, systems, and methods may operate to receive an external read command at a control circuit coupled to a memory array. Individual wordline activation may be delayed according to a delay period determined by a read level voltage magnitude associated with a plurality of memory cells included in the array.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: January 19, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Xiaojun Yu, Jin-man Han
  • Patent number: 7643509
    Abstract: Provided is a distributed and asynchronous implicit token carrier sense multiple access/collision avoidance (CSMA/CA) protocol guaranteeing quality of service for both real time and non-real time traffic. The implicit token CSMA/CA protocol allocates a band in an entire bandwidth to voice traffic and allows the remaining bands to be used for data traffic. The implicit token CSMA/CA protocol includes applying a token passing protocol to transmit voice traffic in real time by having a band in an entire bandwidth allocated using a predetermined data frame and applying a CSMA/CA mechanism to transmit data traffic in non-real time by employing remaining bands not allocated to the voice traffic using another predetermined data frame.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: January 5, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Tae Man Han, You Hyeon Jeong, Heesung Chae, Dong Won Kim, Jun Hwa Lee