Patents by Inventor Mark Doczy

Mark Doczy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Forming field effect transistors from conductors
    Publication number: 20060157747
    Abstract: A nanotube transistor, such as a carbon nanotube transistor, may be formed with a top gate electrode and a spaced source and drain. Conduction along the transistor from source to drain is controlled by the gate electrode. Underlying the gate electrode are at least two nanotubes. In some embodiments, the substrate may act as a back gate.
    Type: Application
    Filed: January 18, 2005
    Publication date: July 20, 2006
    Inventors: Amlan Majumdar, Justin Brask, Marko Radosavljevic, Suman Datta, Brian Doyle, Mark Doczy, Jack Kavalieros, Matthew Metz, Robert Chau, Uday Shah, James Blackwell
  • Quantum well transistor using high dielectric constant dielectric layer
    Publication number: 20060148182
    Abstract: A quantum well transistor or high electron mobility transistor may be formed using a replacement metal gate process. A dummy gate electrode may be used to define sidewall spacers and source drain contact metallizations. The dummy gate electrode may be removed and the remaining structure used as a mask to etch a doped layer to form sources and drains self-aligned to said opening. A high dielectric constant material may coat the sides of said opening and then a metal gate electrode may be deposited. As a result, the sources and drains are self-aligned to the metal gate electrode. In addition, the metal gate electrode is isolated from an underlying barrier layer by the high dielectric constant material.
    Type: Application
    Filed: January 3, 2005
    Publication date: July 6, 2006
    Inventors: Suman Datta, Justin Brask, Jack Kavalieros, Matthew Metz, Mark Doczy, Robert Chau
  • Tailoring channel dopant profiles
    Publication number: 20060148150
    Abstract: Higher mobility transistors may be achieved by removing a dummy metal gate electrode as part of a replacement metal gate process and doping the exposed channel region after source and drains have already been formed. As a result, a retrograde doping profile may be achieved in some embodiments in the channel region which is not adversely affected by subsequent high temperature processing. For example, after already forming the source and drains and thereafter doping the channel, temperature regimes greater than 900° C. may be avoided.
    Type: Application
    Filed: January 3, 2005
    Publication date: July 6, 2006
    Inventors: Jack Kavalieros, Peter Vandervoorn, Kelin Kuhn, Justin Brask, Mark Doczy, Matthew Metz, Suman Datta, Robert Chau
  • Nonplanar transistors with metal gate electrodes
    Publication number: 20060138552
    Abstract: A semiconductor device comprising a semiconductor body having a top surface and a first and second laterally opposite sidewalls as formed on an insulating substrate is claimed. A gate dielectric is formed on the top surface of the semiconductor body and on the first and second laterally opposite sidewalls of the semiconductor body. A gate electrode is then formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the first and second laterally opposite sidewalls of the semiconductor body. The gate electrode comprises a metal film formed directly adjacent to the gate dielectric layer. A pair of source and drain regions are then formed in the semiconductor body on opposite sides of the gate electrode.
    Type: Application
    Filed: February 22, 2006
    Publication date: June 29, 2006
    Inventors: Justin Brask, Brian Doyle, Jack Kavalieros, Mark Doczy, Uday Shah, Robert Chau
  • Nonplanar transistors with metal gate electrodes
    Publication number: 20060138553
    Abstract: A semiconductor device comprising a semiconductor body having a top surface and a first and second laterally opposite sidewalls as formed on an insulating substrate is claimed. A gate dielectric is formed on the top surface of the semiconductor body and on the first and second laterally opposite sidewalls of the semiconductor body. A gate electrode is then formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the first and second laterally opposite sidewalls of the semiconductor body. The gate electrode comprises a metal film formed directly adjacent to the gate dielectric layer. A pair of source and drain regions are then formed in the semiconductor body on opposite sides of the gate electrode.
    Type: Application
    Filed: February 24, 2006
    Publication date: June 29, 2006
    Inventors: Justin Brask, Brian Doyle, Jack Kavalleros, Mark Doczy, Uday Shah, Robert Chau
  • Method for making a semiconductor device with a high-k gate dielectric and a metal gate electrode
    Publication number: 20060121678
    Abstract: A method for making a semiconductor device is described. That method comprises adding nitrogen to a silicon dioxide layer to form a nitrided silicon dioxide layer on a substrate. After forming a sacrificial layer on the nitrided silicon dioxide layer, the sacrificial layer is removed to generate a trench. A high-k gate dielectric layer is formed on the nitrided silicon dioxide layer within the trench, and a metal gate electrode is formed on the high-k gate dielectric layer.
    Type: Application
    Filed: December 7, 2004
    Publication date: June 8, 2006
    Inventors: Justin Brask, Sangwoo Pae, Jack Kavalieros, Matthew Metz, Mark Doczy, Suman Datta, Robert Chau, Jose Maiz
  • Method for making a semiconductor device having a high-K gate dielectric and a titanium carbide gate electrode
    Publication number: 20060121668
    Abstract: A method for making a titanium carbide layer is described. That method comprises alternately introducing a carbon containing precursor and a titanium containing precursor into a chemical vapor deposition reactor, while a substrate is maintained at a selected temperature. The reactor is operated for a sufficient time, and pulse times are selected for the carbon containing precursor and the titanium containing precursor, to form a titanium carbide layer of a desired thickness and workfunction on the substrate.
    Type: Application
    Filed: October 19, 2005
    Publication date: June 8, 2006
    Inventors: Matthew Metz, Suman Datta, Mark Doczy, Jack Kavalieros, Justin Brask, Robert Chau
  • METHOD FOR MAKING A SEMICONDUCTOR DEVICE HAVING A HIGH-K GATE DIELECTRIC AND A TITANIUM CARBIDE GATE ELECTRODE
    Publication number: 20060121727
    Abstract: A method for making a titanium carbide layer is described. That method comprises alternately introducing a carbon containing precursor and a titanium containing precursor into a chemical vapor deposition reactor, while a substrate is maintained at a selected temperature. The reactor is operated for a sufficient time, and pulse times are selected for the carbon containing precursor and the titanium containing precursor, to form a titanium carbide layer of a desired thickness and workfunction on the substrate.
    Type: Application
    Filed: December 7, 2004
    Publication date: June 8, 2006
    Inventors: Matthew Metz, Suman Datta, Mark Doczy, Jack Kavalieros, Justin Brask, Robert Chau
  • Method for making a semiconductor device having a high-k gate dielectric
    Publication number: 20060121742
    Abstract: A method for making a semiconductor device is described. That method comprises applying an atomic layer chemical vapor deposition process to form a high-k gate dielectric layer directly on a hydrophobic surface of a substrate. The atomic layer chemical vapor deposition process initiates growth of the high-k gate dielectric layer in less than about twenty growth cycles.
    Type: Application
    Filed: December 7, 2004
    Publication date: June 8, 2006
    Inventors: Matthew Metz, Suman Datta, Jack Kavalieros, Mark Doczy, Justin Brask, Robert Chau
  • Method for making a semiconductor device with a high-k gate dielectric layer and a silicide gate electrode
    Publication number: 20060094180
    Abstract: A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate, forming a barrier layer on the high-k gate dielectric layer, and forming a fully silicided gate electrode on the barrier layer.
    Type: Application
    Filed: November 2, 2004
    Publication date: May 4, 2006
    Inventors: Mark Doczy, Justin Brask, Jack Kavalieros, Matthew Metz, Suman Datta, Robert Chau
  • Method for making a semiconductor device with a high-k gate dielectric layer and a silicide gate electrode
    Publication number: 20060091483
    Abstract: A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate, forming a barrier layer on the high-k gate dielectric layer, and forming a fully silicided gate electrode on the barrier layer.
    Type: Application
    Filed: October 3, 2005
    Publication date: May 4, 2006
    Inventors: Mark Doczy, Justin Brask, Jack Kavalieros, Matthew Metz, Suman Datta, Robert Chau
  • Semiconductor channel on insulator structure
    Publication number: 20060081932
    Abstract: A method including forming a via dielectric layer on a semiconductor device substrate; forming a trench dielectric layer on the via dielectric layer; forming a trench through the trench dielectric layer to expose the via dielectric layer; forming a via in the via dielectric layer through the trench to expose the substrate; and forming a semiconductor material in the via and in the trench. An apparatus including a device substrate; a dielectric layer formed on a surface of the device substrate; and a device base formed on the dielectric layer including a crystalline structure derived from the device substrate.
    Type: Application
    Filed: December 1, 2005
    Publication date: April 20, 2006
    Inventors: Been-Yih Jin, Brian Doyle, Scott Hareland, Mark Doczy, Matthew Metz, Boyan Boyanov, Suman Datta, Jack Kavalieros, Robert Chau
  • Transition metal alloys for use as a gate electrode and devices incorporating these alloys
    Patent number: 7030430
    Abstract: Embodiments of a transition metal alloy having an n-type or p-type work function that does not significantly shift at elevated temperature. The disclosed transition metal alloys may be used as, or form a part of, the gate electrode in a transistor. Methods of forming a gate electrode using these transition metal alloys are also disclosed.
    Type: Grant
    Filed: August 15, 2003
    Date of Patent: April 18, 2006
    Assignee: Intel Corporation
    Inventors: Mark Doczy, Nathan Baxter, Robert S. Chau, Kari Harkonen, Teemu Lang
  • Method for making a semiconductor device having a high-k gate dielectric
    Publication number: 20060079005
    Abstract: A method for making a semiconductor device is described. That method comprises converting a hydrophobic surface of a substrate into a hydrophilic surface, and forming a high-k gate dielectric layer on the hydrophilic surface.
    Type: Application
    Filed: October 12, 2004
    Publication date: April 13, 2006
    Inventors: Justin Brask, Jack Kavalieros, Mark Doczy, Matthew Metz, Suman Datta, Robert Chau
  • Nonplanar transistors with metal gate electrodes
    Publication number: 20060071275
    Abstract: A semiconductor device comprising a semiconductor body having a top surface and a first and second laterally opposite sidewalls as formed on an insulating substrate is claimed. A gate dielectric is formed on the top surface of the semiconductor body and on the first and second laterally opposite sidewalls of the semiconductor body. A gate electrode is then formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the first and second laterally opposite sidewalls of the semiconductor body. The gate electrode comprises a metal film formed directly adjacent to the gate dielectric layer. A pair of source and drain regions are then formed in the semiconductor body on opposite sides of the gate electrode.
    Type: Application
    Filed: September 30, 2004
    Publication date: April 6, 2006
    Inventors: Justin Brask, Brian Doyle, Jack Kavalieros, Mark Doczy, Uday Shah, Robert Chau
  • Inducing strain in the channels of metal gate transistors
    Publication number: 20060071285
    Abstract: In a metal gate replacement process, strain may be selectively induced in the channels of NMOS and PMOS transistors. For example, a material having a higher coefficient of thermal expansion than the substrate may be used to form the gate electrodes of PMOS transistors. A material with a lower coefficient of thermal expansion than that of the substrate may be used to form the gate electrodes of NMOS transistors.
    Type: Application
    Filed: September 29, 2004
    Publication date: April 6, 2006
    Inventors: Suman Datta, Jack Kavalieros, Mark Doczy, Matthew Metz, Justin Brask, Robert Chau, Brian Doyle
  • Metal gate electrode semiconductor device
    Publication number: 20060065939
    Abstract: A complementary metal oxide semiconductor integrated circuit may be formed with NMOS and PMOS transistors that have high dielectric constant gate dielectric material over a semiconductor substrate. A metal barrier layer may be formed over the gate dielectric. A workfunction setting metal layer is formed over the metal barrier layer and a cap metal layer is formed over the workfunction setting metal layer.
    Type: Application
    Filed: September 27, 2004
    Publication date: March 30, 2006
    Inventors: Mark Doczy, Justin Brask, Jack Kavalieros, Chris Barns, Matthew Metz, Suman Datta, Robert Chau
  • Reducing ambipolar conduction in carbon nanotube transistors
    Publication number: 20060063318
    Abstract: Ambipolar conduction can be reduced in carbon nanotube transistors by forming a gate electrode of a metal. Metal sidewall spacers having different workfunctions than the gate electrode may be formed to bracket the metal gate electrode.
    Type: Application
    Filed: September 10, 2004
    Publication date: March 23, 2006
    Inventors: Suman Datta, Jack Kavalieros, Mark Doczy, Matthew Metz, Marko Radosavljevic, Amlan Majumdar, Justin Brask, Robert Chau
  • Atomic layer deposition of high dielectric constant gate dielectrics
    Publication number: 20060060930
    Abstract: Gate dielectrics formed of silicates of hafnium or zirconium dioxide may be formed by atomic layer deposition. The precursors for the atomic layer deposition may include an oxidant, a silicate precursor, and a zirconium or hafnium precursor.
    Type: Application
    Filed: September 17, 2004
    Publication date: March 23, 2006
    Inventors: Matthew Metz, Clifford Boyd, Markus Kuhn, Suman Datta, Jack Kavalieros, Mark Doczy, Justin Brask, Robert Chau
  • Reducing oxidation under a high K gate dielectric
    Publication number: 20060057808
    Abstract: A metal layer is formed on a dielectric layer, which is formed on a substrate. After forming a masking layer on the metal layer, the exposed sides of the dielectric layer are covered with a polymer diffusion barrier.
    Type: Application
    Filed: September 10, 2004
    Publication date: March 16, 2006
    Inventors: Robert Turkot, Justin Brask, Jack Kavalieros, Mark Doczy, Matthew Metz, Uday Shah, Suman Datta, Robert Chau