Abstract: A scraping-wheel drill bit with a bit body configured at its upper extend for connection into a drillstring, comprising: a bit body (1) with at least one bit leg (3), and at least one scraping-wheel (2) set with a cutter-row (4). The scraping-wheel (2) is mounted for rotation on the corresponding bit leg (3) with a large angular deflection ? which lies in the range of 20°?|?|?90°. The cutters on the scraping-wheel break rocks by means of successive scraping, forming a spiral-like tracks on the bottomhole, thus achieving high rock-breaking efficiency, even wear, high cooling performance, and a longer service life for the cutters, bearings and the drill bit.

Abstract: An light apparatus used in forming a solar cell includes a housing separate from other processing in a deposition processing system, a transport mechanism for carrying a solar cell into the housing after deposition of a front contact layer in the deposition processing system, and one or more light source elements arranged to apply light on the solar cell after deposition of the front contact layer. A method of making a solar cell includes forming a back contact layer on a glass substrate, forming an absorber layer on the back contact layer, forming a buffer layer on the absorber layer, and forming a front contact layer above the buffer layer, the glass substrate, back contact layer, absorber layer, buffer layer, and front contact layer forming a first module. The method includes applying a light source to the first module after forming the front contact layer separate from other processing.

Abstract: A master-slave type battery management system for accurate capacity gauge of battery packs is disclosed. It includes several battery management units linked to each other via a communication line. Each battery management unit is linked to a specified rechargeable battery set to manage the specified rechargeable battery set, detect a physical measurement data from the specified rechargeable battery set and calculates battery set capacity related value based on the physical measurement data. Each battery management unit has a unique battery ID. By assigning a battery management unit having a specified battery ID as a master battery management unit, the rest battery management units become slave battery management units. Each slave battery management unit sends the physical measurement data and battery set capacity related value to the master battery management unit via the communication line. The master battery management unit is in charge of calculating related values and transmitting them.

Abstract: A magnetic element (100) includes a board unit (2) including a paddle board (21) having a row of first conductive vias (251) and a row of second conductive vias (252) for insertion of terminals (3), a number of embedded magnetic components (22), and a number of SMDs (surface mount devices) (23) mounted on the paddle board by SMT (surface mount technology). Each embedded magnetic component includes a magnetic core (221) embedded in the paddle board, and a number of PCB (printed circuit board) layout traces (222) disposed in the paddle board. Each PCB layout trace includes a first PCB layout trace (222a) encircling around the magnetic core and connecting with the first conductive via, and a second PCB layout trace (222b) encircling around the magnetic core and connecting with the SMD.

Abstract: The present disclosure involves lighting apparatus. The lighting apparatus includes a light-emitting device. The light-emitting device includes a first doped semiconductor layer. A light-emitting layer is disposed over the first doped semiconductor layer. A second doped semiconductor layer is disposed over the light-emitting layer. The second doped semiconductor layer has a different type of conductivity than the first doped semiconductor layer. A photo-conversion layer is coated around the light-emitting device. A lens houses the light-emitting device and the photo-conversion layer within. The lens includes a first sub-layer and a second sub-layer. The first and second sub-layers have different characteristics.

Abstract: In a flexible LED pad for use in phototherapy treatment of humans or animals, the PCBs in the pad are securely linked together with electrical connectors and ribbon cables to prevent the connections from being broken as the flexible pad is bent or otherwise deformed during the treatment. In one embodiment, low-profile socket connectors are mounted to the PCBs and mate with plug connectors at the ends of the ribbon cables. For similar reasons, the LED pad may be connected to an LED control unit by means of an electrical connector (e.g. a USB socket) mounted to a PCB in the LED pad. The PCBs, on which the LEDs are mounted, are fitted into a downset in the flexible pad to prevent the LEDs from becoming misaligned with openings in the flexible pad.

Abstract: A semiconductor device includes a gate structure on a substrate; a raised source/drain region adjacent to the gate structure; and an interconnect plug on the doped region. The raised source/drain region includes a top surface being elevated from a surface of the substrate; and a doped region exposed on the top surface. The doped region includes a dopant concentration greater than any other portions of the raised source/drain region. A bottommost portion of the interconnect plug includes a width approximate to a width of the doped region.

Abstract: The present disclosure involves a method of packaging light-emitting diodes (LEDs). According to the method, a plurality of LEDs is provided over an adhesive tape. The adhesive tape is disposed on a substrate. In some embodiments, the substrate may be a glass substrate, a silicon substrate, a ceramic substrate, and a gallium nitride substrate. A phosphor layer is coated over the plurality of LEDs. The phosphor layer is then cured. The tape and the substrate are removed after the curing of the phosphor layer. A replacement tape is then attached to the plurality of LEDs. A dicing process is then performed to the plurality of LEDs after the substrate has been removed. The removed substrate may then be reused for a future LED packaging process.

Abstract: An electronic assembly includes a transparent adhesive layer, a transparent cover, a display module and a frame. The transparent adhesive layer has a first adhesive surface and a second adhesive surface opposite to the first adhesive surface, the second adhesive surface having a central region and a peripheral region around the central region. The transparent cover is adhered to the first adhesive surface of the transparent adhesive layer. The display module is adhered to the central region of the transparent adhesive layer. The frame has a border carrying part which is adhered to the peripheral region of the transparent adhesive layer.

Abstract: A molding package assembly is provided, which includes a substrate and first and second molding packages stacked on the substrate. Each of the first and second molding packages has a semiconductor element, an anti-warping structure disposed around a periphery of the semiconductor element, a molding material encapsulating the semiconductor element and the anti-warping structure, and a protection layer formed on the semiconductor element, the molding material and the anti-warping structure. The anti-warping structure facilitates to prevent warping of the molding package assembly during a molding process.

Abstract: A memory system, a fully parallel encoding method, and a fully parallel decoding method are disclosed. The encoding method utilizes a plurality of minimal polynomials that constitute a generator polynomial to derive a plurality of roots from the minimal polynomials. A first encoding matrix derived according to the roots of the minimal polynomials is subsequently decomposed to derive a second encoding matrix, in which partial elements of the second encoding matrix are common in those of a parity check matrix of the decoder, such that the encoder and the decoder can efficiently share the same hardware. In addition, the decoding method defines a new error locator polynomial and utilizes a cubic matrix operation to respectively combine the equations, which reduces the hardware required by the fully parallel architecture.

Abstract: The disclosure provides a manufacturing method for a circuit board having a via and including a substrate, a ground conductor, a floated conductor and a signal conductor. The substrate includes a second sheet layer, a second ground layer, a core layer, a first ground layer and a first sheet layer that are stacked in sequence from bottom to top. The ground conductor penetrates through the core layer and is electrically coupled to the first ground layer and the second ground layer. The floated conductor penetrates through the core layer and is electrically insulated from the first ground layer, the second ground layer and the ground conductor. The signal conductor penetrates through the substrate, being located between the ground conductor and the floated conductor, and insulated from the first ground layer, the second ground layer, the ground conductor and the floated conductor.

Abstract: A semiconductor device includes a device substrate and a conductive capping substrate. The device substrate includes at least one micro-electro mechanical system (MEMS) device. The conductive capping substrate is bonded to the device substrate and includes a cap portion covering the MEMS device, and a conductor portion in electrical contact with the device substrate.

Abstract: A decoupling circuit for enhancing isolation of two monopole antennas is disclosed. The two monopole antennas substantially symmetrically stand on a bottom, and a gap is formed between the two monopole antennas. The decoupling circuit includes a grounding element located on the bottom and electrically connected to a ground, a connection bar substantially perpendicular to the bottom, including a first terminal electrically connected to the grounding element, a second terminal extending to the gap, a first branch extending from the second terminal of the connection bar to a first monopole antenna of the two monopole antennas, and a second branch extending from the second terminal of the connection bar to a second monopole antenna of the two monopole antennas.

Abstract: An operating circuit applied to a backlight is provided, where the backlight includes a plurality of lighting elements, and the operating circuit includes a plurality of current control circuits, a plurality of switches, a minimum voltage selector, a supply voltage generating circuit and a control unit. The current control circuits are coupled to the lighting elements via a plurality of nodes, respectively. The switches are coupled to the nodes, respectively. The minimum voltage selector is utilized for receiving at least a portion of voltages of the plurality of nodes, and selecting a minimum voltage among the received voltages. The supply voltage generating circuit is utilized for generating a supply voltage of the lighting elements according to the minimum voltage. For each of the switches, the control unit determines an on/off state of the switch by determining whether the corresponding lighting element is an open circuit or not.

Abstract: A multifunctional case is configured for receiving or supporting a portable electronic device. The case includes a first layer and a second layer. The second layer is connected to the first layer by the edges. A receiving space is formed between the first and second layers for receiving the portable electronic device. The second layer is provided with a base portion, a main supporting portion, two side supporting portions and two remaining portions are formed on the second layer. The two side supporting portions and the remaining portions are symmetrically positioned at two sides of the main supporting portion. When the case is folded up as a support, the main supporting portion is angled with the base portion. The remaining portions are stacked on the base portion. The side supporting portions are perpendicular to the remaining portions and the main supporting portion.

Abstract: A semiconductor structure is located in a recess of a substrate. The semiconductor structure includes a liner, a silicon rich layer and a filling material. The liner is located on the surface of the recess. The silicon rich layer is located on the liner. The filling material is located on the silicon rich layer and fills the recess. Furthermore, a semiconductor process forming said semiconductor structure is also provided.

Abstract: A method for forming an interlevel dielectric (ILD) layer includes the following steps. A MOS transistor on a substrate is provided. A first undoped oxide layer is deposited to cover the substrate and the MOS transistor. The first undoped oxide layer is planarized. A phosphorus containing oxide layer is deposited on the first undoped oxide layer. A second undoped oxide layer is deposited on the phosphorus containing oxide layer.

Abstract: The present disclosure involves a method of packaging a light-emitting diode (LED). According to the method, a group of metal pads and a group of LEDs are provided. The group of LEDs is attached to the group of metal pads, for example through a bonding process. After the LEDs are attached to the metal pads, each LED is spaced apart from adjacent LEDs. Also according to the method, a phosphor film is coated around the group of LEDs collectively. The phosphor film is coated on top and side surfaces of each LED and between adjacent LEDs. A dicing process is then performed to slice through portions of the phosphor film located between adjacent LEDs. The dicing process divides the group of LEDs into a plurality of individual phosphor-coated LEDs.