Patents by Inventor Ming Yeh

Ming Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190125836
    Abstract: Disclosed are methods and compositions useful in preventing or treating a disease related to muscle wasting by using acidic fibroblast growth factor (aFGF).
    Type: Application
    Filed: October 30, 2018
    Publication date: May 2, 2019
    Applicant: Eusol Biotech Co., Ltd.
    Inventors: Hung-Kai CHEN, Jing-Yi HUANG, Huey-Wen HSIAO, Che-Ming YEH
  • Patent number: 10274320
    Abstract: Method and device for providing safe zone information. The method includes receiving a map of an incident area sensor information from at least one sensor at the incident area. The method also includes determining a multi-dimensional model of the incident area based on the map of the incident area and the sensor information and determining a first threat location based on the sensor information, the map of the incident area, and the multi-dimensional model of the incident area. The method further includes determining a plurality of safe zone shadow areas based on the first threat location. The method also includes updating the multi-dimensional model of the incident area to include the plurality of safe zone shadow areas and to generate a safe zone shadow representation of the incident area and transmitting the safe zone shadow representation to at least one user device in the incident area.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: April 30, 2019
    Assignee: MOTOROLA SOLUTIONS, INC.
    Inventors: Eugene Chin, Tih Huang Yeoh, Alfy Merican Ahmad Hambaly, Prebesh Pavithran, Kuan Heng Lee, Mern Keat Lee, Ming Yeh Koh, Guo Dong Gan, Bing Qin Lim
  • Publication number: 20190057916
    Abstract: A device includes a substrate with a die over the substrate. A molding compound surrounds the die and includes a structural interface formed along a peripheral region of the molding compound.
    Type: Application
    Filed: October 22, 2018
    Publication date: February 21, 2019
    Inventors: Shu-Shen Yeh, Po-Yao Lin, Shyue-Ter Leu, Shin-Puu Jeng, Chih-Kung Huang, Tsung-Ming Yeh
  • Patent number: 10211335
    Abstract: A power transistor is provided with at least one transistor finger that lies within a semiconductor material. The gate oxide is segmented into a set of segments with thick field oxide between each segment in order to reduce gate capacitance and thereby improve a resistance times gate charge figure of merit.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: February 19, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sameer Pendharkar, Ming-yeh Chuang
  • Publication number: 20190041216
    Abstract: Method and device for providing safe zone information. The method includes receiving a map of an incident area sensor information from at least one sensor at the incident area. The method also includes determining a multi-dimensional model of the incident area based on the map of the incident area and the sensor information and determining a first threat location based on the sensor information, the map of the incident area, and the multi-dimensional model of the incident area. The method further includes determining a plurality of safe zone shadow areas based on the first threat location. The method also includes updating the multi-dimensional model of the incident area to include the plurality of safe zone shadow areas and to generate a safe zone shadow representation of the incident area and transmitting the safe zone shadow representation to at least one user device in the incident area.
    Type: Application
    Filed: August 4, 2017
    Publication date: February 7, 2019
    Inventors: Eugene Chin, Tih Huang Yeoh, Alfy Merican Ahmad Hambaly, Prebesh Pavithran, Kuan Heng Lee, Mern Keat Lee, Ming Yeh Koh, Guo Dong Gan, Bing Qin Lim
  • Publication number: 20190035092
    Abstract: A computing device is able to detect one or more motion events based on two consecutive images, such as a first image and a second image. In the detection process, the computing device assigns identifiers to difference blocks retrieved from a plurality of first blocks of the first image, then defines a scanning window and moves the scanning window on a preset route over the first image. A new identical identifier is assigned for difference blocks within a current image subarea which falls into the scanning window. After a scanning period is completed, the computing device determines the happening of a motion event according to sufficient pixel similarities found in one of new identifiers.
    Type: Application
    Filed: July 27, 2017
    Publication date: January 31, 2019
    Inventors: CHIA-MING YEH, RUI-TANG HUANG
  • Patent number: 10192319
    Abstract: A computing device is able to detect one or more motion events based on two consecutive images, such as a first image and a second image. In the detection process, the computing device assigns identifiers to difference blocks retrieved from a plurality of first blocks of the first image, then defines a scanning window and moves the scanning window on a preset route over the first image. A new identical identifier is assigned for difference blocks within a current image subarea which falls into the scanning window. After a scanning period is completed, the computing device determines the happening of a motion event according to sufficient pixel similarities found in one of new identifiers.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: January 29, 2019
    Assignee: NANNING FUGUI PRECISION INDUSTRIAL CO., LTD.
    Inventors: Chia-Ming Yeh, Rui-Tang Huang
  • Publication number: 20180308745
    Abstract: An electronic device includes an isolated region surrounded by an isolation ring over a semiconductor substrate. A well of a first conductivity type is located within the isolated region. A source region and a drain region of a second conductivity type are located over the well. A local-oxidation-of-silicon (LOCOS) layer is located on the well between the source and the drain, between the source and the isolation ring, and between the drain and the isolation ring. A gate electrode located between the source and the drain on said LOCOS layer.
    Type: Application
    Filed: June 18, 2018
    Publication date: October 25, 2018
    Inventor: Ming-Yeh CHUANG
  • Patent number: 10111139
    Abstract: The present invention relates to an offline-operable wireless network system and the method for operating the same. When a wireless base station is not connected to the evolved packet core (EPC) server, the wireless base station will emulate the EPC server. Thereby, the electronic device connected with the wireless base station can be connected to the emulated EPC server, so that the wireless network functions still can be applied in the offline state and a wireless local area network can be further built.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: October 23, 2018
    Assignee: Gemtek Technology Co., Ltd.
    Inventors: Ching-Sung Hsu, Shih-Chiang Yang, Pao-Ching Tseng, Fu-Ming Yeh
  • Patent number: 10111081
    Abstract: The present invention relates to a local communication wireless network system and the method thereof. When the wireless base station is not connected with the evolved packet core (EPC) server, the wireless base station can emulate the EPC server. The electronic devices connected to the wireless base station can connect to the emulated EPC server. The client unit of the wireless base station can collect the identification information of the electronic devices connected to the wireless base station, build an identification list, and send the identification list to the electronic devices connected to the wireless base station. Thereby, the electronic devices can send messages or perform digital voice or video calls to other electronic devices according to the identification list.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: October 23, 2018
    Assignee: Gemtek Technology Co., Ltd.
    Inventors: Ching-Sung Hsu, Shih-Chiang Yang, Pao-Ching Tseng, Fu-Ming Yeh
  • Patent number: 10109547
    Abstract: A device includes a substrate with a die over the substrate. A molding compound surrounds the die and includes a structural interface formed along a peripheral region of the molding compound.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: October 23, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, LLC
    Inventors: Shu-Shen Yeh, Po-Yao Lin, Shyue-Ter Leu, Shin-Puu Jeng, Chih-Kung Huang, Tsung-Ming Yeh
  • Publication number: 20180207608
    Abstract: A polymer synthesis system has a polymerization reactor and a deliquifying-quench extruder downstream of and in fluid communication with the polymerization reactor. The polymerization reactor has an inlet and an outlet with a rotatable shaft positioned axially within the reactor. The deliquifying-quench extruder has an inlet and an outlet, with a shaft assembly positioned axially within the extruder. The shaft assembly includes multiple helical flight configurations and multiple processing zones defined by the multiple flight configurations. The processing zones include an extraction-compaction zone, a sealing zone downstream of the extraction-compaction zone, a vent-cooling zone downstream of the sealing zone, a quenching zone downstream of the vent-cooling zone, and a conveying zone downstream of the quenching zone.
    Type: Application
    Filed: July 8, 2016
    Publication date: July 26, 2018
    Inventors: Richard Cheng-Ming Yeh, Richard D. Hembree, Joseph A. Maier, Michael F. McDonald
  • Patent number: 10014206
    Abstract: An integrated circuit (IC) including at least one transistor having a metal-oxide-semiconductor (MOS) gate includes a substrate having a semiconductor surface. The transistor includes at least one trench isolation region in the semiconductor surface. Local oxidation of silicon (LOCOS) regions extend from within the semiconductor surface inside the trench isolation region defining a first LOCOS-free region and at least a second LOCOS-free region. A gate electrode is between the first LOCOS-free region and second LOCOS-free region including over a flat portion of a first of the LOCOS regions as its gate dielectric (LOCOS gate oxide). A first doped region is in the first LOCOS-free region and a second doped region is in the second LOCOS-free region on respective sides of the gate electrode both doped a first dopant type. A recessed channel region for the transistor is between the first and second doped regions under the LOCOS gate oxide.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: July 3, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Ming-Yeh Chuang
  • Publication number: 20180174887
    Abstract: An integrated circuit (IC) including at least one transistor having a metal-oxide-semiconductor (MOS) gate includes a substrate having a semiconductor surface. The transistor includes at least one trench isolation region in the semiconductor surface. Local oxidation of silicon (LOCOS) regions extend from within the semiconductor surface inside the trench isolation region defining a first LOCOS-free region and at least a second LOCOS-free region. A gate electrode is between the first LOCOS-free region and second LOCOS-free region including over a flat portion of a first of the LOCOS regions as its gate dielectric (LOCOS gate oxide). A first doped region is in the first LOCOS-free region and a second doped region is in the second LOCOS-free region on respective sides of the gate electrode both doped a first dopant type. A recessed channel region for the transistor is between the first and second doped regions under the LOCOS gate oxide.
    Type: Application
    Filed: December 15, 2016
    Publication date: June 21, 2018
    Inventor: MING-YEH CHUANG
  • Publication number: 20180175191
    Abstract: A power transistor is provided with at least one transistor finger that lies within a semiconductor material. The gate oxide is segmented into a set of segments with thick field oxide between each segment in order to reduce gate capacitance and thereby improve a resistance times gate charge figure of merit.
    Type: Application
    Filed: December 4, 2017
    Publication date: June 21, 2018
    Inventors: Sameer Pendharkar, Ming-yeh Chuang
  • Publication number: 20180114871
    Abstract: A solar cell is provided. The solar cell includes a Si substrate having a first surface and a second surface opposite to each other, an emitter, a first electrode, a doped region, a passivation layer, a doped polysilicon layer, a semiconductor layer, and a second electrode. The emitter is disposed on the first surface. The first electrode is disposed on the emitter. The doped region is disposed in the second surface. The passivation layer is disposed on the second surface. The doped polysilicon layer is disposed on the passivation layer, wherein a plurality of holes penetrates the doped polysilicon layer and the passivation layer and exposes a portion of the second surface. The semiconductor layer is disposed on the doped polysilicon layer and in the holes. The band gap of the semiconductor layer is greater than that of the Si substrate. The second electrode is disposed on the semiconductor layer.
    Type: Application
    Filed: November 15, 2016
    Publication date: April 26, 2018
    Applicant: Industrial Technology Research Institute
    Inventors: Chao-Cheng Lin, Chien-Kai Peng, Chen-Cheng Lin, Chen-Hsun Du, Chorng-Jye Huang, Chun-Ming Yeh
  • Patent number: 9908213
    Abstract: A method of using a chemical mechanical polishing (CMP)apparatus that includes a apparatus is provided. The method includes providing a conditioning disc for conditioning the polishing pad, where the conditioning disc includes a plurality of portions of subsystem discs. The portions may be regions of the disc that are concentric. Each portion of the disc is operable to rotate at a different angular velocity. In some embodiments, a different applied loading is provided to each of the portions of the disc in addition to or in lieu of the different angular velocities.
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: March 6, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiu-Ming Yeh, Feng-Inn Wu
  • Patent number: 9865729
    Abstract: A power transistor is provided with at least one transistor finger that lies within a semiconductor material. The gate oxide is segmented into a set of segments with thick field oxide between each segment in order to reduce gate capacitance and thereby improve a resistance times gate charge figure of merit.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: January 9, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sameer Pendharkar, Ming-yeh Chuang
  • Patent number: 9862665
    Abstract: Membranes are provided for energy efficient purification of alcohol by pervaporation. Such membranes include a nanofibrous scaffold in combination with a barrier layer. The membranes also include zeolites in the barrier layer. The membranes may, in embodiments, also include a substrate.
    Type: Grant
    Filed: December 1, 2014
    Date of Patent: January 9, 2018
    Assignee: The Research Foundation for the State University of New York
    Inventors: Benjamin Chu, Benjamin S. Hsiao, Devinder Mahajan, Tsung-Ming Yeh
  • Patent number: 9836093
    Abstract: An electronic apparatus includes a host, a touch control screen, a pivot unit, a retaining unit, and a control unit. The retaining unit includes a driving member electrically operable to drive a retaining member to move between a retaining position and a non-retaining position. The control unit controls, according to an operation signal corresponding to a status of the touch control screen, the driving member to drive the retaining member to either move to the retaining position for resisting rotation of the touch control screen relative to the host, or move to the non-retaining position for not resisting rotation of the touch control screen relative to the host.
    Type: Grant
    Filed: January 8, 2015
    Date of Patent: December 5, 2017
    Assignee: WISTRON CORPORATION
    Inventors: Yen-Chi Chen, Hsiu-Ming Yeh