Patents by Inventor Ming Yeh

Ming Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170342763
    Abstract: A secure container includes a housing and a hinged door, the housing including an inner shell, an external shell, and a plurality of fastening brackets. The external shell surrounds the inner shell. The fastening brackets are inserted and fixed between the receiving space defined between the inner shell and the external shell. Each fastening bracket defines a plurality of first through holes through which a filler can be introduced, the fastening brackets lending strength and a particular placement to the filler.
    Type: Application
    Filed: August 3, 2016
    Publication date: November 30, 2017
    Inventors: TUNG-MING YEH, CHEN-LU FAN, CHIH-KUN SHIH
  • Publication number: 20170303112
    Abstract: The present invention relates to a local communication wireless network system and the method thereof. When the wireless base station is not connected with the evolved packet core (EPC) server, the wireless base station can emulate the EPC server. The electronic devices connected to the wireless base station can connect to the emulated EPC server. The client unit of the wireless base station can collect the identification information of the electronic devices connected to the wireless base station, build an identification list, and send the identification list to the electronic devices connected to the wireless base station. Thereby, the electronic devices can send messages or perform digital voice or video calls to other electronic devices according to the identification list.
    Type: Application
    Filed: June 24, 2016
    Publication date: October 19, 2017
    Inventors: CHING-SUNG HSU, SHIH-CHIANG YANG, PAO-CHING TSENG, FU-MING YEH
  • Patent number: 9793174
    Abstract: A fin field effect transistor (FinFET) on a silicon-on-insulator and method of forming the same are provided in the present invention. The FinFET includes first fin structure, second fin structure and an insulating layer. The first fin structure and the second fin structure are disposed on a substrate. The insulating layer covers the first fin structure and the second fin structure and exposes a first portion of the first fin structure and a second portion of the second fin structure. The first fin structure has a first height and the second fin structure has a second height different from the first height, and a top surface of the first fin structure and a top surface of the second fin structure are at different levels.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: October 17, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ping-Wei Huang, Yu-Ren Wang, Keng-Jen Lin, Shu-Ming Yeh
  • Publication number: 20170265123
    Abstract: The present invention relates to an offline-operable wireless network system and. the method for operating the same. When a wireless base station is not connected to the evolved packet core (EPC) server, the wireless base station will emulate the EPC server. Thereby, the electronic device connected with the wireless base station can be connected to the emulated EPC server, so that the wireless network functions still can be applied in the offline state and a wireless local area network can be further built.
    Type: Application
    Filed: May 13, 2016
    Publication date: September 14, 2017
    Inventors: CHING-SUNG HSU, SHIH-CHIANG YANG, PAO-CHING TSENG, FU-MING YEH
  • Publication number: 20170221788
    Abstract: A device includes a substrate with a die over the substrate. A molding compound surrounds the die and includes a structural interface formed along a peripheral region of the molding compound.
    Type: Application
    Filed: March 17, 2016
    Publication date: August 3, 2017
    Inventors: Shu-Shen Yeh, Po-Yao Lin, Shyue-Ter Leu, Shin-Puu Jeng, Chih-Kung Huang, Tsung-Ming Yeh
  • Publication number: 20170144084
    Abstract: Provided is a vacuum devolatilizer for use in a polymer manufacturing or processing plant. The devolatilizer comprises a vacuum chamber having an inlet for a polymer melt, an outlet for a polymer melt, a vacuum port through which volatiles may be removed and a stirrer shaft port for the entry of a stirrer shaft. The stirrer shaft passes through the at least one stirrer shaft port and extends into the vacuum chamber and carries an agitation means. The stirrer shaft seal is associated with each stirrer shaft port for sealing against the stirrer shaft and each stirrer shaft seal has an external portion outside the vacuum chamber. The devolatilizer is provided with a motor located outside of the vacuum chamber for rotating shaft and comprises means for blanketing the external portion of the stirrer shaft seal with a low oxygen content gas or vapor, e.g., nitrogen, helium, steam, or carbon dioxide.
    Type: Application
    Filed: December 17, 2010
    Publication date: May 25, 2017
    Inventors: Richard Cheng-Ming Yeh, Vetkav R. Eswaran
  • Patent number: 9656791
    Abstract: A packaging cushioning material includes a connecting section, and a first assembly section and a second assembly section integrally extended from the connecting section. The first assembly section includes at least one first groove, at least one first assembly portion and a first clamping portion connected to the first assembly portion. The second assembly section includes at least one second groove, at least one second assembly portion disposed along an extension line of the first assembly portion, and a second clamping portion connected to the second assembly portion. By locking and fastening a fastening member at an assembly region, or by bending the first assembly section and the second assembly section towards the connecting section, the first clamping portion and the second clamping portion form a locking and fastening means to allow the packaging cushioning material to form a multilayer structure providing reduced transportation and storage complications.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: May 23, 2017
    Assignee: Li Tai Green Packaging Co., Ltd.
    Inventor: Ya-Ming Yeh
  • Publication number: 20170017284
    Abstract: A power supply circuit for a solid state disk includes a processor, a flash, a golden finger can be coupled to a direct current (DC) voltage, a boost converter coupled to the golden finger and configured to convert the DC voltage to a power voltage, a super-capacitor charger coupled to the boost converter, a super-capacitor coupled to the super-capacitor charger and configured to be charged by the super-capacitor charger and output a charge voltage, a control unit coupled to the super-capacitor and the boost converter, and a detection unit configured to compare the power voltage with a preset voltage. When the power voltage is less than the preset voltage, the control unit outputs the charge voltage to the processor and the flash; and when the power voltage is no less than the preset voltage, the control unit outputs the power voltage to the processor and the flash.
    Type: Application
    Filed: July 17, 2015
    Publication date: January 19, 2017
    Inventors: CHUN-PO CHEN, CHUN-AN LAI, CHIA-MING YEH
  • Patent number: 9548925
    Abstract: A system of evaluating the reliability of deterioration-effect multi-state flow network and method thereof are disclosed in present invention. The system can evaluate the probability that d units of data of flow can be transmitted from a source node to a sink node. In practical application, the flow in a deterioration-effect multi-state flow network may undergo a loss due to deterioration. For example, electrical power will decrease if the transmission distance is too great. Therefore, how to evaluate the reliability of deterioration-effect multi-state flow network becomes an important issue.
    Type: Grant
    Filed: March 3, 2014
    Date of Patent: January 17, 2017
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Wei-Chang Yeh, Yuan-Ming Yeh
  • Patent number: 9547383
    Abstract: A touch panel including a substrate, plural first electrode strings, plural second electrode strings, plural insulating patterns, and plural first optical matching patterns is provided. The substrate has plural bridge areas and a non-bridge area connected to the bridge areas. The first electrode strings and the second electrode strings are disposed on the substrate and staggered in the bridge areas. The insulating patterns are located in the bridge areas, and each of the insulating patterns is located between one of the first electrode strings and a corresponding second electrode string respectively. Each of the first optical matching patterns is located in one of the bridge areas respectively and located between a corresponding first electrode string and a corresponding second electrode string. Each of the insulating patterns is respectively disposed on a surface of one of the first optical matching patterns facing away from the substrate.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: January 17, 2017
    Assignee: CANDO CORPORATION
    Inventors: Wen-Chen Lee, Chia-Ming Yeh, Wan-Chun Hsu
  • Publication number: 20160378216
    Abstract: A touch panel including a substrate, plural first electrode strings, plural second electrode strings, plural insulating patterns, and plural first optical matching patterns is provided. The substrate has plural bridge areas and a non-bridge area connected to the bridge areas. The first electrode strings and the second electrode strings are disposed on the substrate and staggered in the bridge areas. The insulating patterns are located in the bridge areas, and each of the insulating patterns is located between one of the first electrode strings and a corresponding second electrode string respectively. Each of the first optical matching patterns is located in one of the bridge areas respectively and located between a corresponding first electrode string and a corresponding second electrode string. Each of the insulating patterns is respectively disposed on a surface of one of the first optical matching patterns facing away from the substrate.
    Type: Application
    Filed: September 18, 2015
    Publication date: December 29, 2016
    Inventors: Wen-Chen Lee, Chia-Ming Yeh, Wan-Chun Hsu
  • Patent number: 9521740
    Abstract: An electronic device includes a substrate, a first device, a second device, and a shielding wall. The first device and the second device are disposed on the substrate respectively. The shielding wall is disposed independently between the first device and the second device. The shielding wall is configured for suppressing the electromagnetic interference from the second device to the first device.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: December 13, 2016
    Assignee: AVERMEDIA TECHNOLOGIES, INC.
    Inventors: Chien-Ming Yeh, Kuo-Ying Su, Hong-Wei Liu, Jeng-Hau Lin
  • Patent number: 9503052
    Abstract: A frequency selective circuit includes a first transistor, an impedance element, a first capacitive element, a second capacitive element, a second capacitive and a second transistor. The first transistor includes a first terminal, a second terminal and a control terminal. The impedance element is coupled between the first terminal and the control terminal of the first transistor. The first capacitive element is coupled to the first terminal of the first transistor. The second capacitive element is coupled to the control terminal of the first transistor. The second transistor includes a first terminal, a second terminal and a control terminal, wherein the control terminal of the second transistor is coupled to the control terminal of the first transistor.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: November 22, 2016
    Assignee: MEDIATEK INC.
    Inventors: Yuan-Hung Chung, Ming-Yeh Hsu
  • Publication number: 20160322957
    Abstract: A frequency selective circuit includes a first transistor, an impedance element, a first capacitive element, a second capacitive element, a second capacitive and a second transistor. The first transistor includes a first terminal, a second terminal and a control terminal. The impedance element is coupled between the first terminal and the control terminal of the first transistor. The first capacitive element is coupled to the first terminal of the first transistor. The second capacitive element is coupled to the control terminal of the first transistor. The second transistor includes a first terminal, a second terminal and a control terminal, wherein the control terminal of the second transistor is coupled to the control terminal of the first transistor.
    Type: Application
    Filed: August 10, 2015
    Publication date: November 3, 2016
    Inventors: Yuan-Hung Chung, Ming-Yeh Hsu
  • Patent number: 9436358
    Abstract: Various embodiments are disclosed for editing a video sequence. One embodiment, among others, is a method for editing a video in a video editing system. The method comprises obtaining a video sequence and identifying objects in the video sequence with corresponding depth information, displaying the video sequence in a display panel in a user interface, and facilitating insertion of an object into the video sequence by displaying in the user interface, a timeline and a control panel including a graphical representation for each of the identified objects with corresponding depth information. The graphical representations are arranged relative to the timeline and based on the corresponding depth information. The method further comprises obtaining input from a user positioning the object into the video sequence relative to the identified objects with corresponding depth information.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: September 6, 2016
    Assignee: CYBERLINK CORP.
    Inventors: Chia-Che Yang, Chun Ming Yeh
  • Patent number: 9431869
    Abstract: A hydraulic energy conversion device includes a main body being an annular member having a central hole, an output shaft mounted in the central hole of the main body with a centerline extended perpendicular to the central hole; a fixing plate located at an end of the main body and provided with a plurality of passage holes; an outer cover located at another end of the main body opposite to the fixing plate and having a central opening for the output shaft to outwardly extended through the outer cover; and a plurality of vanes circumferentially spaced on the output shaft to locate in a space defined between the main body, the fixing plate and the outer cover. The hydraulic energy conversion device is mounted in a hydraulic shock absorber to convert hydraulic energy into mechanical energy and output the same without hindering the hydraulic shock absorber from normal operation.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: August 30, 2016
    Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Chuen-An Chen, Che-Pin Chen, Chieh Tung, Te-Ming Yeh, Min-Hua Shih
  • Patent number: 9418853
    Abstract: The present invention provides a method for forming a stacked layer structure, including: first, a recess is provided, next, an oxide layer is formed in the recess, where the oxide layer has a thickness T1, a high-k layer is formed on the oxide layer, a barrier layer is formed on the high-k layer, a silicon layer is then formed on the barrier layer, afterwards, an annealing process is performed on the silicon layer, so as to form an oxygen-containing layer between the silicon layer and the barrier layer, where the oxide layer has a thickness T2 after the annealing process is performed, and satisfies the relationship: (T2?T1)/T1?0.05, and the silicon layer and the oxygen-containing layer are removed.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: August 16, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shao-Wei Wang, Keng-Jen Lin, Yu-Tung Hsiao, Shu-Ming Yeh
  • Publication number: 20160222537
    Abstract: An apparatus and a method for plating a substrate are provided. The apparatus includes: an electroplating cell for containing an electroplating solution; a substrate holder for holding a substrate in the electroplating solution; a rotation driver coupled to the substrate holder and configured to rotate the substrate holder; a power distribution assembly coupled to the rotation driver; an anode disposed within the electroplating cell; a power supply unit electrically coupled between the anode and the power distribution assembly, thereby forming an electric loop; and a current regulating member for providing a predetermined impedance value for the electric loop, wherein a voltage provided by the power supply unit causes an electric current to flow through the electric loop, and the predetermined impedance is such selected that the variation of the electric current is kept within a smaller range compared to that measured in the absence of the current regulating member.
    Type: Application
    Filed: January 30, 2015
    Publication date: August 4, 2016
    Inventors: YUNG DI SHEN, CHEN-HSIN FU, CHIH-MING YEH, YI-HU LO, JUI-MU CHO, YEN-YU CHEN, WEI ZHANG
  • Publication number: 20160225872
    Abstract: A semiconductor structure with a multilayer gate oxide is provided. The structure includes a substrate. A multilayer gate oxide is disposed on the substrate, wherein the multilayer gate oxide includes a first gate oxide and a second gate oxide. The first gate oxide contacts the substrate and the second gate oxide is disposed on and contacts the first gate oxide. The second gate oxide is hydrophilic. The first gate oxide is formed by a thermal oxidation process. The second gate oxide is formed by a chemical treatment.
    Type: Application
    Filed: January 30, 2015
    Publication date: August 4, 2016
    Inventors: Shao-Wei Wang, Shu-Ming Yeh, Yu-Tung Hsiao
  • Patent number: 9406772
    Abstract: A semiconductor structure with a multilayer gate oxide is provided. The structure includes a substrate. A multilayer gate oxide is disposed on the substrate, wherein the multilayer gate oxide includes a first gate oxide and a second gate oxide. The first gate oxide contacts the substrate and the second gate oxide is disposed on and contacts the first gate oxide. The second gate oxide is hydrophilic. The first gate oxide is formed by a thermal oxidation process. The second gate oxide is formed by a chemical treatment.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: August 2, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shao-Wei Wang, Shu-Ming Yeh, Yu-Tung Hsiao