Abstract: An integrated circuit (IC) including at least one transistor having a metal-oxide-semiconductor (MOS) gate includes a substrate having a semiconductor surface. The transistor includes at least one trench isolation region in the semiconductor surface. Local oxidation of silicon (LOCOS) regions extend from within the semiconductor surface inside the trench isolation region defining a first LOCOS-free region and at least a second LOCOS-free region. A gate electrode is between the first LOCOS-free region and second LOCOS-free region including over a flat portion of a first of the LOCOS regions as its gate dielectric (LOCOS gate oxide). A first doped region is in the first LOCOS-free region and a second doped region is in the second LOCOS-free region on respective sides of the gate electrode both doped a first dopant type. A recessed channel region for the transistor is between the first and second doped regions under the LOCOS gate oxide.

Abstract: An integrated circuit (IC) including at least one transistor having a metal-oxide-semiconductor (MOS) gate includes a substrate having a semiconductor surface. The transistor includes at least one trench isolation region in the semiconductor surface. Local oxidation of silicon (LOCOS) regions extend from within the semiconductor surface inside the trench isolation region defining a first LOCOS-free region and at least a second LOCOS-free region. A gate electrode is between the first LOCOS-free region and second LOCOS-free region including over a flat portion of a first of the LOCOS regions as its gate dielectric (LOCOS gate oxide). A first doped region is in the first LOCOS-free region and a second doped region is in the second LOCOS-free region on respective sides of the gate electrode both doped a first dopant type. A recessed channel region for the transistor is between the first and second doped regions under the LOCOS gate oxide.

Abstract: A power transistor is provided with at least one transistor finger that lies within a semiconductor material. The gate oxide is segmented into a set of segments with thick field oxide between each segment in order to reduce gate capacitance and thereby improve a resistance times gate charge figure of merit.

Abstract: A solar cell is provided. The solar cell includes a Si substrate having a first surface and a second surface opposite to each other, an emitter, a first electrode, a doped region, a passivation layer, a doped polysilicon layer, a semiconductor layer, and a second electrode. The emitter is disposed on the first surface. The first electrode is disposed on the emitter. The doped region is disposed in the second surface. The passivation layer is disposed on the second surface. The doped polysilicon layer is disposed on the passivation layer, wherein a plurality of holes penetrates the doped polysilicon layer and the passivation layer and exposes a portion of the second surface. The semiconductor layer is disposed on the doped polysilicon layer and in the holes. The band gap of the semiconductor layer is greater than that of the Si substrate. The second electrode is disposed on the semiconductor layer.

Abstract: A method of using a chemical mechanical polishing (CMP)apparatus that includes a apparatus is provided. The method includes providing a conditioning disc for conditioning the polishing pad, where the conditioning disc includes a plurality of portions of subsystem discs. The portions may be regions of the disc that are concentric. Each portion of the disc is operable to rotate at a different angular velocity. In some embodiments, a different applied loading is provided to each of the portions of the disc in addition to or in lieu of the different angular velocities.

Abstract: A power transistor is provided with at least one transistor finger that lies within a semiconductor material. The gate oxide is segmented into a set of segments with thick field oxide between each segment in order to reduce gate capacitance and thereby improve a resistance times gate charge figure of merit.

Abstract: Membranes are provided for energy efficient purification of alcohol by pervaporation. Such membranes include a nanofibrous scaffold in combination with a barrier layer. The membranes also include zeolites in the barrier layer. The membranes may, in embodiments, also include a substrate.

Abstract: An electronic apparatus includes a host, a touch control screen, a pivot unit, a retaining unit, and a control unit. The retaining unit includes a driving member electrically operable to drive a retaining member to move between a retaining position and a non-retaining position. The control unit controls, according to an operation signal corresponding to a status of the touch control screen, the driving member to drive the retaining member to either move to the retaining position for resisting rotation of the touch control screen relative to the host, or move to the non-retaining position for not resisting rotation of the touch control screen relative to the host.

Abstract: A secure container includes a housing and a hinged door, the housing including an inner shell, an external shell, and a plurality of fastening brackets. The external shell surrounds the inner shell. The fastening brackets are inserted and fixed between the receiving space defined between the inner shell and the external shell. Each fastening bracket defines a plurality of first through holes through which a filler can be introduced, the fastening brackets lending strength and a particular placement to the filler.

Abstract: The present invention relates to a local communication wireless network system and the method thereof. When the wireless base station is not connected with the evolved packet core (EPC) server, the wireless base station can emulate the EPC server. The electronic devices connected to the wireless base station can connect to the emulated EPC server. The client unit of the wireless base station can collect the identification information of the electronic devices connected to the wireless base station, build an identification list, and send the identification list to the electronic devices connected to the wireless base station. Thereby, the electronic devices can send messages or perform digital voice or video calls to other electronic devices according to the identification list.

Abstract: A fin field effect transistor (FinFET) on a silicon-on-insulator and method of forming the same are provided in the present invention. The FinFET includes first fin structure, second fin structure and an insulating layer. The first fin structure and the second fin structure are disposed on a substrate. The insulating layer covers the first fin structure and the second fin structure and exposes a first portion of the first fin structure and a second portion of the second fin structure. The first fin structure has a first height and the second fin structure has a second height different from the first height, and a top surface of the first fin structure and a top surface of the second fin structure are at different levels.

Abstract: The present invention relates to an offline-operable wireless network system and. the method for operating the same. When a wireless base station is not connected to the evolved packet core (EPC) server, the wireless base station will emulate the EPC server. Thereby, the electronic device connected with the wireless base station can be connected to the emulated EPC server, so that the wireless network functions still can be applied in the offline state and a wireless local area network can be further built.

Abstract: A device includes a substrate with a die over the substrate. A molding compound surrounds the die and includes a structural interface formed along a peripheral region of the molding compound.

Abstract: Provided is a vacuum devolatilizer for use in a polymer manufacturing or processing plant. The devolatilizer comprises a vacuum chamber having an inlet for a polymer melt, an outlet for a polymer melt, a vacuum port through which volatiles may be removed and a stirrer shaft port for the entry of a stirrer shaft. The stirrer shaft passes through the at least one stirrer shaft port and extends into the vacuum chamber and carries an agitation means. The stirrer shaft seal is associated with each stirrer shaft port for sealing against the stirrer shaft and each stirrer shaft seal has an external portion outside the vacuum chamber. The devolatilizer is provided with a motor located outside of the vacuum chamber for rotating shaft and comprises means for blanketing the external portion of the stirrer shaft seal with a low oxygen content gas or vapor, e.g., nitrogen, helium, steam, or carbon dioxide.

Abstract: A packaging cushioning material includes a connecting section, and a first assembly section and a second assembly section integrally extended from the connecting section. The first assembly section includes at least one first groove, at least one first assembly portion and a first clamping portion connected to the first assembly portion. The second assembly section includes at least one second groove, at least one second assembly portion disposed along an extension line of the first assembly portion, and a second clamping portion connected to the second assembly portion. By locking and fastening a fastening member at an assembly region, or by bending the first assembly section and the second assembly section towards the connecting section, the first clamping portion and the second clamping portion form a locking and fastening means to allow the packaging cushioning material to form a multilayer structure providing reduced transportation and storage complications.

Abstract: A power supply circuit for a solid state disk includes a processor, a flash, a golden finger can be coupled to a direct current (DC) voltage, a boost converter coupled to the golden finger and configured to convert the DC voltage to a power voltage, a super-capacitor charger coupled to the boost converter, a super-capacitor coupled to the super-capacitor charger and configured to be charged by the super-capacitor charger and output a charge voltage, a control unit coupled to the super-capacitor and the boost converter, and a detection unit configured to compare the power voltage with a preset voltage. When the power voltage is less than the preset voltage, the control unit outputs the charge voltage to the processor and the flash; and when the power voltage is no less than the preset voltage, the control unit outputs the power voltage to the processor and the flash.

Abstract: A system of evaluating the reliability of deterioration-effect multi-state flow network and method thereof are disclosed in present invention. The system can evaluate the probability that d units of data of flow can be transmitted from a source node to a sink node. In practical application, the flow in a deterioration-effect multi-state flow network may undergo a loss due to deterioration. For example, electrical power will decrease if the transmission distance is too great. Therefore, how to evaluate the reliability of deterioration-effect multi-state flow network becomes an important issue.

Abstract: A touch panel including a substrate, plural first electrode strings, plural second electrode strings, plural insulating patterns, and plural first optical matching patterns is provided. The substrate has plural bridge areas and a non-bridge area connected to the bridge areas. The first electrode strings and the second electrode strings are disposed on the substrate and staggered in the bridge areas. The insulating patterns are located in the bridge areas, and each of the insulating patterns is located between one of the first electrode strings and a corresponding second electrode string respectively. Each of the first optical matching patterns is located in one of the bridge areas respectively and located between a corresponding first electrode string and a corresponding second electrode string. Each of the insulating patterns is respectively disposed on a surface of one of the first optical matching patterns facing away from the substrate.

Abstract: A touch panel including a substrate, plural first electrode strings, plural second electrode strings, plural insulating patterns, and plural first optical matching patterns is provided. The substrate has plural bridge areas and a non-bridge area connected to the bridge areas. The first electrode strings and the second electrode strings are disposed on the substrate and staggered in the bridge areas. The insulating patterns are located in the bridge areas, and each of the insulating patterns is located between one of the first electrode strings and a corresponding second electrode string respectively. Each of the first optical matching patterns is located in one of the bridge areas respectively and located between a corresponding first electrode string and a corresponding second electrode string. Each of the insulating patterns is respectively disposed on a surface of one of the first optical matching patterns facing away from the substrate.

Abstract: An electronic device includes a substrate, a first device, a second device, and a shielding wall. The first device and the second device are disposed on the substrate respectively. The shielding wall is disposed independently between the first device and the second device. The shielding wall is configured for suppressing the electromagnetic interference from the second device to the first device.