Abstract: This disclosure is directed to devices, systems, and techniques for enforcing access to resources within a computer network. In some examples, a system includes a network managed by a service provider and configured to provide a plurality of microservices to a plurality of tenants each having one or more users and a controller having access to the network. The controller is configured to output, to a user interface, data indicative of a plurality of capabilities for presentation by the user interface and receive, from the user interface, data indicative of a user selection of a set of capabilities and a user selection of a new role identifier. The controller is further configured to create, based on the set of capabilities and the role identifier, a role which enables access to a set of actions within a computer network, the set of actions corresponding to the set of capabilities.

Abstract: A device detecting system is provided. The device detecting system includes a bar code scanner, a plurality of device accommodating spaces, a screen, and a server. The server obtains bar code information via the bar code scanner and opens one of the device accommodating spaces based on the bar code information to accommodate an electronic device. The server performs a test procedure on the electronic device to generate a test result, and displays the test result and operation information corresponding to the test result on the screen.

Abstract: A semiconductor device includes a plurality of semiconductor fins, at least one gate stack, a refill isolation, and an air gap. Each of the semiconductor fins extends in an X direction. Two adjacent ones of the semiconductor fins are spaced apart from each other in a Y direction transverse to the X direction. The at least one gate stack has two stack sections spaced apart from each other in the Y direction. The stack sections are disposed over two adjacent ones of the semiconductor fins, respectively. The refill isolation and the air gap are disposed between the stack sections.

Abstract: In an embodiment, a device includes: a first fin; a gate structure over the first fin; a first source/drain region adjacent the gate structure; an etch stop layer over the first source/drain region; a conductive line over the etch stop layer, the conductive line isolated from the first source/drain region by the etch stop layer, a top surface of the conductive line being coplanar with a top surface of the gate structure; and a power rail contact extending through the first fin, the power rail contact connected to the first source/drain region.

Abstract: A semiconductor device and method of manufacture which utilize isolation structures between semiconductor regions is provided. In embodiments different isolation structures are formed between different fins in different regions with different spacings. Some of the isolation structures are formed using flowable processes. The use of such isolation structures helps to prevent damage while also allowing for a reduction in spacing between different fins of the devices.

Abstract: A method of treating or remediating contaminated material, such as water or soil, comprises contacting such material with asphaltenes. The asphaltenes are preferably produced as a by-product of petroleum refining and, in particular, a by-product of vacuum residua. An adsorbent material comprising such asphaltenes is also provided.

Abstract: Embodiments of the present disclosure provide a method for forming backside metal contacts with reduced Cgd and increased speed. Particularly, source/drain features on the drain side, or source/drain features without backside metal contact, are recessed from the backside to the level of the inner spacer to reduce Cgd. Some embodiments of the present disclosure use a sacrificial liner to protect backside alignment feature during backside processing, thus, preventing shape erosion of metal conducts and improving device performance.

Abstract: A semiconductor device according to the present disclosure includes a vertical stack of channel members, a gate structure over and around the vertical stack of channel members, and a first source/drain feature and a second source/drain feature. Each of the vertical stack of channel members extends along a first direction between the first source/drain feature and the second source/drain feature. Each of the vertical stack of channel members is spaced apart from the first source/drain feature by a silicide feature.

Abstract: A method for environment-specific training of a machine learning model, comprises receiving, for a local environment, a data stream including a plurality of sequential data snippets. Programmed labels are generated for each data snippet using a student version of a machine learning model. A portion of data snippets and associated programmed labels are selected and uploaded to a server-side computing device for evaluation by a teacher version of the machine learning model. An environment-specific training update is received from the server-side computing device. This training update is based on a comparison of the selected programmed labels and pseudolabels generated for the selected portion of data snippets by the teacher version. The environment-specific training update is applied to the student version to generate an updated student version. The updated student version of the machine learning model is then used to generate programmed labels for newly received data snippets.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a source region, a drain region, and a gate electrode layer disposed between the source region and the drain region. The gate electrode layer includes a first surface facing the source region, and the first surface includes an edge portion having a first height. The gate electrode layer further includes a second surface opposite the first surface and facing the drain region. The second surface includes an edge portion having a second height. The second height is different from the first height.

Abstract: A semiconductor device includes a first fin, a second fin, a first gate electrode having a first portion that at least partially wraps around an upper portion of the first fin and a second portion that at least partially wraps around an upper portion of the second fin, a second gate electrode having a portion that at least partially wraps around the upper portion of the first fin, and a gate-cut feature having a first portion in the first gate electrode between the first and second portions of the first gate electrode. The gate-cut feature is at least partially filled with one or more dielectric materials. In a direction of a longitudinal axis of the first fin, the gate-cut feature has a second portion extending to a sidewall of the second gate electrode.

Abstract: A plasma processing apparatus for semiconductor processing includes an injector holder configured to removably mate with a structure defining an interior chamber of a plasma processing apparatus. The injector holder defines a first opening. A sleeve is configured to be received within the first opening, and the sleeve defines a second opening. A gas injector is configured to be received within the second opening of the sleeve.

Abstract: A method of treating or remediating contaminated material, such as water or soil, comprises contacting such material with asphaltenes. The asphaltenes are preferably produced as a by-product of petroleum refining and, in particular, a by-product of vacuum residua. An adsorbent material comprising such asphaltenes is also provided.

Abstract: An IC structure includes a source epitaxial structure, a drain epitaxial structure, a first silicide region, a second silicide region, a source contact, a backside via rail, a drain contact, and a front-side interconnection structure. The first silicide region is on a front-side surface and a first sidewall of the source epitaxial structure. The second silicide region is on a front-side surface of the drain epitaxial structure. The source contact is in contact with the first silicide region and has a protrusion extending past a backside surface of the source epitaxial structure. The backside via rail is in contact with the protrusion of the source contact. The drain contact is in contact with the second silicide region. The front-side interconnection structure is on a front-side surface of the source contact and a front-side surface of the drain contact.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a plurality of semiconductor layers and a first source/drain epitaxial feature in contact with the plurality of semiconductor layers. The first source/drain epitaxial feature includes a bottom portion having substantially straight sidewalls. The structure further includes a spacer having a gate spacer portion and one or more source/drain spacer portions. Each source/drain spacer portion has a first height, and a source/drain spacer portion of the one or more source/drain spacer portions is in contact with one of the substantially straight sidewalls of the first source/drain epitaxial feature. The structure further includes a dielectric feature disposed adjacent one source/drain spacer portion of the one or more source/drain spacer portion. The dielectric has a second height substantially greater than the first height.

Abstract: A device includes a first semiconductor strip protruding from a substrate, a second semiconductor strip protruding from the substrate, an isolation material surrounding the first semiconductor strip and the second semiconductor strip, a nanosheet structure over the first semiconductor strip, wherein the nanosheet structure is separated from the first semiconductor strip by a first gate structure including a gate electrode material, wherein the first gate structure partially surrounds the nanosheet structure, and a first semiconductor channel region and a semiconductor second channel region over the second semiconductor strip, wherein the first semiconductor channel region is separated from the second semiconductor channel region by a second gate structure including the gate electrode material, wherein the second gate structure extends on a top surface of the second semiconductor strip.

Abstract: A semiconductor device according to the present disclosure includes a vertical stack of channel members, a gate structure over and around the vertical stack of channel members, and a first source/drain feature and a second source/drain feature. Each of the vertical stack of channel members extends along a first direction between the first source/drain feature and the second source/drain feature. Each of the vertical stack of channel members is spaced apart from the first source/drain feature by a silicide feature.

Abstract: In an embodiment, a device includes: a first nanostructure over a substrate, the first nanostructure including a channel region and a first lightly doped source/drain (LDD) region, the first LDD region adjacent the channel region; a first epitaxial source/drain region wrapped around four sides of the first LDD region; an interlayer dielectric (ILD) layer over the first epitaxial source/drain region; a source/drain contact extending through the ILD layer, the source/drain contact wrapped around four sides of the first epitaxial source/drain region; and a gate stack adjacent the source/drain contact and the first epitaxial source/drain region, the gate stack wrapped around four sides of the channel region.

Abstract: A method for drying a wafer at room temperature includes a cleaning step, a reacting step and a pressure releasing step. The cleaning step includes putting a processing workpiece into a cleaning solvent. The reacting step includes putting the processing workpiece along with the cleaning solvent into a reaction chamber, implanting a supercritical fluid into the reaction chamber, and increasing a pressure of the reaction chamber to dissolve the cleaning solvent in the supercritical fluid. A critical temperature of the supercritical fluid is below room temperature. The pressure releasing step includes releasing the pressure of the reaction chamber and discharging the supercritical fluid together with the cleaning solvent out of the reaction chamber, after completely dissolving the cleaning solvent in the supercritical fluid.

Abstract: A portable bioreactor is provided for driving displacement of at least one stirring sleeve relative to at least one tube cassette in a first direction and includes a machine frame unit and a first elevator. The first elevator includes a first linear movement module, a first transmission module, and a first turning module. The first linear movement module includes a first slider which is slidable on the first guide rail in the first direction between a first top position and a first bottom position. The first turning module is coupled to the first slider through the first transmission module so as to permit turning of the first turning module to be translated by the first transmission module into linear sliding movement of the first slider at a varying speed.