Patents by Inventor Ping Chen

Ping Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11647394
    Abstract: A wireless communication system using wireless LAN channels for wireless communication is disclosed, comprising: master access point, slave access points, and computing unit. First, the master access point creates a collision record table and a usage time record table. After that, the master access point updates the collision record table and usage time record table based on the usage information, and transmits the collision record table and usage time record table to the slave access points. The computing unit generates the channel collision probability through the number of collisions, and calculates the usage weight of the dynamic frequency selection channel through the channel collision probability. Finally, the wireless communication system automatically selects the wireless LAN channels of the master access point and the slave access points according to the usage weight and usage time record table. As such, the wireless communication system has high efficiency and low delay.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: May 9, 2023
    Assignee: ARCADYAN TECHNOLOGY CORPORATION
    Inventors: Kuo Shu Huang, Kenchih Chen, Chun-Ping Chen, Tsung-Hsien Hsieh
  • Patent number: 11646353
    Abstract: A semiconductor device structure includes a substrate, a first gate structure, a second gate structure, a first well region, and a first structure. The substrate has a first surface and a second surface opposite to the first surface. The first gate structure is disposed on the first surface. The second gate structure is disposed on the first surface. The first well region is in the substrate and between the first gate structure and the second gate structure. The first structure is disposed in the first well region. A shape of the first structure has an acute angle.
    Type: Grant
    Filed: December 27, 2021
    Date of Patent: May 9, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Yu-Ping Chen, Chun-Shun Huang
  • Publication number: 20230133331
    Abstract: The present disclosure provides a chemical mechanical polishing system having a unitary platen. The platen includes one or more recesses within the platen to house various components for the polishing/planarization process. In one embodiment, the platen includes a first recess and a second recess. The first recess is located under the second recess. An end point detector is placed in the first recess and a detector cover may be placed in the second recess. A sealing mean is provided in a space between the end point detector and the detector cover to prevent any external or foreign materials from coming in contact with the end point detector. A fastener used for fastening the detector cover to the platen also provides addition protection to prevent foreign materials from coming in contact with components received in the recesses.
    Type: Application
    Filed: January 3, 2023
    Publication date: May 4, 2023
    Inventors: Tsung-Lung Lai, Cheng-Ping Chen, Shih-Chung Chen, Sheng-Tai Peng, Rong-Long Hung
  • Patent number: 11640924
    Abstract: The present disclosure provides a method of forming an integrated circuit structure. The method includes depositing a first metal layer on a semiconductor substrate; forming a hard mask on the first metal layer; patterning the first metal layer to form first metal features using the hard mask as an etch mask; depositing a dielectric layer of a first dielectric material on the first metal features and in gaps among the first metal features; performing a chemical mechanical polishing (CMP) process to both the dielectric layer and the hard mask; removing the hard mask, thereby having portions of the dielectric layer extruded above the metal features; forming an inter-layer dielectric (ILD) layer of the second dielectric material different from the first dielectric material; and patterning the ILD layer to form openings that expose the first metal features and are constrained to be self-aligned with the first metal features by the extruded portions of the first dielectric layer.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: May 2, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tai-I Yang, Yu-Chieh Liao, Chia-Tien Wu, Hsin-Ping Chen, Hai-Ching Chen, Shau-Lin Shue
  • Publication number: 20230118866
    Abstract: A cavity interposer has a cavity, first bondpads adapted to couple to a chip-type camera cube disposed within a base of the cavity at a first level, the first bondpads coupled through feedthroughs to second bondpads at a base of the interposer at a second level; and third bondpads adapted to couple to a light-emitting diode (LED), the third bondpads at a third level. The third bondpads coupled to fourth bondpads at the base of the interposer at the second level; and the second and fourth bondpads couple to conductors of a cable with the first, second, and third level different. An endoscope optical includes the cavity interposer an LED, and a chip-type camera cube electrically bonded to the first bondpads; the LED is bonded to the third bondpads; and a top of the chip-type camera cube and a top of the LED are at a same level.
    Type: Application
    Filed: May 18, 2022
    Publication date: April 20, 2023
    Inventors: Teng-Sheng CHEN, Wei-Ping CHEN, Wei-Feng LIN, Jau-Jan DENG
  • Publication number: 20230122722
    Abstract: A cavity interposer has a cavity, first bondpads adapted to couple to a chip-type camera cube disposed within a base of the cavity at a first level, the first bondpads coupled through feedthroughs to second bondpads at a base of the interposer at a second level; and third bondpads adapted to couple to a light-emitting diode (LED), the third bondpads at a third level. The third bondpads coupled to fourth bondpads at the base of the interposer at the second level; and the second and fourth bondpads couple to conductors of a cable with the first, second, and third level different. An endoscope optical includes the cavity interposer an LED, and a chip-type camera cube electrically bonded to the first bondpads; the LED is bonded to the third bondpads; and a top of the chip-type camera cube and a top of the LED are at a same level.
    Type: Application
    Filed: October 18, 2021
    Publication date: April 20, 2023
    Inventors: Teng-Sheng CHEN, Wei-Ping CHEN, Jau-Jan DENG, Wei-Feng LIN, Chun-Sheng FAN
  • Publication number: 20230119370
    Abstract: A semiconductor device in a first area includes first non-planar semiconductor structures separated with a first distance, and a first isolation region including a first layer and a second layer that collectively embed a lower portion of each of the first non-planar semiconductor structures. At least one of the first layer or second layer of the first isolation region is in a cured state. The semiconductor device in a second area includes second non-planar semiconductor structures separated with a second distance, and a second isolation region including a first layer and a second layer that collectively embed a lower portion of each of the second non-planar semiconductor structures. At least one of the first or second layer of the second isolation region is in a cured state.
    Type: Application
    Filed: December 15, 2022
    Publication date: April 20, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Hsiao Wen Lee, Li-Jung Kuo, Chen-Ping Chen, Ming-Ching Chang
  • Patent number: 11626671
    Abstract: An electrical male terminal of this invention includes a clamp or crimp area, a main body, and a blade. Protruding members and support members of the main body act as overstress protection. A panel shield member protects a protruding guide member. In another embodiment of this invention, a protruding member extends from a first support member of the main body, and a cut-out portion at the lower portion of the main body accommodates therein the protruding member to prevent the tang member from inadvertently or accidentally rotating relative to the lower portion of the main body.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: April 11, 2023
    Assignee: J.S.T. CORPORATION
    Inventors: Ping Chen, Gwendolyn Upson
  • Publication number: 20230107642
    Abstract: Compounds with KRAS G12C inhibitory active are disclosed and methods of using the same to treat a cancer comprising a K-Ras G12C mutation.
    Type: Application
    Filed: December 20, 2021
    Publication date: April 6, 2023
    Inventors: Jun FENG, Jean-Michel VERNIER, Marcos GONZALEZ-LOPEZ, Benjamin JONES, Nicholas A. ISLEY, Ping CHEN
  • Patent number: 11618126
    Abstract: A polishing pad conditioning apparatus includes a base, a fiber, and a polymer protruding from a surface of the base and encompassing the fiber.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: April 4, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Cheng-Ping Chen, Shih-Chung Chen, Sheng-Tai Peng, Hung-Lin Chen
  • Patent number: 11619800
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a circuit assembly. The movable assembly is configured to connect an optical element, the movable assembly is movable relative to the fixed assembly, and the optical element has an optical axis. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The circuit assembly includes a plurality of circuits and is affixed to the fixed assembly.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: April 4, 2023
    Assignee: TDK TAIWAN CORP.
    Inventors: Sin-Hong Lin, Yung-Ping Yang, Wen-Yen Huang, Yu-Cheng Lin, Kun-Shih Lin, Chao-Chang Hu, Yung-Hsien Yeh, Mao-Kuo Hsu, Chih-Wei Weng, Ching-Chieh Huang, Chih-Shiang Wu, Chun-Chia Liao, Chia-Yu Chang, Hung-Ping Chen, Wei-Zhong Luo, Wen-Chang Lin, Shou-Jen Liu, Shao-Chung Chang, Chen-Hsin Huang, Meng-Ting Lin, Yen-Cheng Chen, I-Mei Huang, Yun-Fei Wang, Wei-Jhe Shen
  • Publication number: 20230087151
    Abstract: A trench gate metal oxide semiconductor (MOSFET) device includes a substrate with a semiconductor surface layer doped a first conductivity type. At least one trench gate MOSFET cell is located in or over the semiconductor surface layer, and includes a body region in the semiconductor surface layer doped a second conductivity type, and a source region on top of the body region doped the first conductivity type. A trench extends down from a top side of the semiconductor surface layer, the trench abutting the body region and being lined with a dielectric material. A field plate that includes polysilicon is located in the trench, and a gate electrode is located over the field plate. The field plate has a bottom portion, a middle portion, and a top portion, wherein the bottom portion is narrower than the middle portion, and the middle portion is narrower than the top portion.
    Type: Application
    Filed: October 15, 2021
    Publication date: March 23, 2023
    Inventors: Thomas Grebs, Meng-Chia Lee, Hong Yang, Ya ping Chen, Sunglyong Kim
  • Patent number: 11609290
    Abstract: MRI system cabinet having a cabinet body with electronics and a water cooler with a water cooling loop. The water cooling loop divides the cabinet body into first and second cabinet spaces, and the electronics are along the first and second cabinet spaces. An air cooler is along the central axis of the water cooler and has a fan. A cooling cycle is formed where, on a first side, the fan generates a first air flow, which is sent to the first cabinet space through a first air path, and a second air flow, which is sent to the second cabinet space through a second air path. After flowing through the first and second cabinet spaces, the first and second air flows are guided into the water cooling loop for heat exchange under the suction action of the fan on a second side, and then directed into the air cooler.
    Type: Grant
    Filed: July 4, 2021
    Date of Patent: March 21, 2023
    Assignee: Siemens Healthcare GmbH
    Inventors: Hai Ying Yang, Ping Chen
  • Patent number: 11610747
    Abstract: A keyboard includes a substrate, a display member, and a keyswitch assembly. The display member is disposed over the substrate. The keyswitch assembly includes a keycap, a fixing element, two balance bars, and a position-returning member. The keycap is located over the substrate and has a light-transmitting portion located over the display member. The fixing element is disposed on the substrate and has a retaining slot. Each of the balance bars includes a rod portion and an end portion. The rod portion is rotatably engaged with the keycap. The end portion is movably retained in the retaining slot. The position-returning member abuts against the keycap above the substrate and is adjacent to an edge of the keycap.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: March 21, 2023
    Assignee: Chicony Electronics Co., Ltd.
    Inventors: Ping-Chen Li, Chao-Chin Hsieh
  • Publication number: 20230085518
    Abstract: A video processing method for detecting location(s), pixels, and skeleton(s) of one or more objects and an associated video processing circuit are provided. The video processing method may include: utilizing a backbone network in a predetermined model of a single deep learning network to receive and convert input image data having the object(s) into at least one feature map; and utilizing at least one instance head and a pixel head in the predetermined model of the single deep learning network to receive and convert the aforementioned at least one feature map into one or more object detection results, one or more instance segmentation results and one or more pose estimation results of the object(s).
    Type: Application
    Filed: August 1, 2022
    Publication date: March 16, 2023
    Applicant: MEDIATEK INC.
    Inventors: Hsing-Yu Chen, Cheng-Wei Wu, Shu-Ping Chen
  • Patent number: 11605727
    Abstract: In a method of manufacturing a semiconductor device, a fin structure including a stacked layer of first and second semiconductor layers and a hard mask layer over the stacked layer is formed. A sacrificial cladding layer is formed over at least sidewalls of the exposed hard mask layer and stacked layer. An etching is performed to remove lateral portions of the sacrificial cladding layer, thereby leaving the sacrificial cladding layer on sidewalls of the exposed hard mask layer and stacked layer. A first dielectric layer and a second dielectric layer made of a different material than the first dielectric layer are formed. The second dielectric layer is recessed, and a third dielectric layer made of a different material than the second dielectric layer is formed on the recessed second dielectric layer. During the etching operation, a protection layer is formed over the sacrificial cladding layer.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: March 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shu-Wen Shen, Chen-Ping Chen
  • Publication number: 20230073811
    Abstract: Interconnect structures and method of forming the same are disclosed herein. An exemplary interconnect structure includes a first contact feature in a first dielectric layer, a second dielectric layer over the first dielectric layer, a second contact feature over the first contact feature, a barrier layer between the second dielectric layer and the second contact feature, and a liner between the barrier layer and the second contact feature. An interface between the first contact feature and the second contact feature includes the liner but is free of the barrier layer.
    Type: Application
    Filed: November 10, 2022
    Publication date: March 9, 2023
    Inventors: Hsin-Ping Chen, Yung-Hsu Wu, Chia-Tien Wu, Min Cao, Ming-Han Lee, Shau-Lin Shue, Shin-Yi Yang
  • Publication number: 20230072830
    Abstract: A display device is provided. The display device includes a device housing, a knob, a restriction unit and a screen panel. The knob is rotatably connected to the device housing, wherein the knob comprises a latch and a plurality of teeth, the knob is adapted to be rotated between a first knob location and a second knob location, and when the knob is in the first knob location, the latch protrudes from the device housing, and when the knob is in the second knob location, the latch is received in the device housing. The restriction unit is disposed in the device housing, wherein the restriction unit is adapted to be connected to one of the teeth to restrict the knob. The screen panel is detachably connected to the device housing. The display device can be easily detached from a display system.
    Type: Application
    Filed: April 13, 2022
    Publication date: March 9, 2023
    Inventors: An-Hsiu LEE, Chih-Ping CHEN, Yuan-Tai CHEN, Chun-Hong KUO
  • Publication number: 20230060825
    Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Yu Kao, Shih-Yao Lin, Chen-Ping Chen, Chih-Chung Chiu, Chen-Yui Yang, Ke-Chia Tseng, Hsien-Chung Huang, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen
  • Publication number: 20230067527
    Abstract: A semiconductor structure includes a substrate, a dielectric layer, a first conductive feature and a second conductive feature. The substrate includes a semiconductor device. The dielectric layer is disposed on the substrate. The first conductive feature is formed in the first dielectric layer. The second conductive feature penetrates the first conductive feature and the dielectric layer, and is electrically connected to the first conductive feature and the semiconductor device.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Chen CHU, Chia-Tien WU, Chia-Wei SU, Yu-Chieh LIAO, Chia-Chen LEE, Hsin-Ping CHEN, Shau-Lin SHUE