Patents by Inventor Rahul Agarwal

Rahul Agarwal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11853788
    Abstract: Disclosed are various embodiments for creating and managing virtual appliances. A command to create a virtual machine image for a hosted instance of an application image is received. The virtual machine image is created in response to receiving the command. The virtual machine image can include an operating system; a container orchestration service configured to host the instance of the application image; and a configuration service. The configuration service can be configured to at least install a management agent in response to a first boot of the virtual machine and configure the management agent to download and install the application image.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: December 26, 2023
    Assignee: VMWARE, INC.
    Inventors: Steven Taylor, Rahul Agarwal, Etienne Robert Le Sueur, Sindhu Shashidhara, Sunny Tulsi Sreedhar Murthy, Gal Yardeni, Sandhya Pai
  • Patent number: 11855061
    Abstract: A three-dimensional integrated circuit includes a first die structure having a first geometry. The first die structure includes a first region that operates with a first power density and a second region that operates with a second power density. The first power density is less than the second power density. The three-dimensional integrated circuit includes a second die structure having a second geometry. A stacked portion of the second die structure is aligned with the first region. The three-dimensional integrated circuit includes an additional die structure stacked with the first die structure and the second die structure. The additional die structure has the first geometry or the second geometry.
    Type: Grant
    Filed: August 19, 2022
    Date of Patent: December 26, 2023
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Brett P. Wilkerson, Milind S. Bhagavat, Rahul Agarwal, Dmitri Yudanov
  • Publication number: 20230411331
    Abstract: A semiconductor package for high-speed die connections using a conductive insert, the semiconductor package comprising: a die; a plurality of redistribution layers; a conductive insert housed in a perforation through the plurality of redistribution layers; and a conductive bump conductively coupled to an input/output (I/O) connection point of the die via the conductive insert.
    Type: Application
    Filed: August 25, 2023
    Publication date: December 21, 2023
    Inventor: RAHUL AGARWAL
  • Patent number: 11841803
    Abstract: A chiplet system includes a central processing unit (CPU) communicably coupled to a first GPU chiplet of a GPU chiplet array. The GPU chiplet array includes the first GPU chiplet communicably coupled to the CPU via a bus and a second GPU chiplet communicably coupled to the first GPU chiplet via a passive crosslink. The passive crosslink is a passive interposer die dedicated for inter-chiplet communications and partitions systems-on-a-chip (SoC) functionality into smaller functional chiplet groupings.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: December 12, 2023
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Skyler J. Saleh, Samuel Naffziger, Milind S. Bhagavat, Rahul Agarwal
  • Patent number: 11837588
    Abstract: Various circuit boards with mounted passive components and method of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes at least partially encapsulating a first plurality of passive components in a molding material to create a first molded passive component group. The first molded passive component group is mounted on a surface of a circuit board. The first plurality of passive components are electrically connected to the circuit board.
    Type: Grant
    Filed: November 1, 2022
    Date of Patent: December 5, 2023
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Milind S. Bhagavat, Rahul Agarwal
  • Publication number: 20230387076
    Abstract: A chip for hybrid bonded interconnect bridging for chiplet integration, the chip comprising: a first chiplet; a second chiplet; an interconnecting die coupled to the first chiplet and the second chiplet through a hybrid bond.
    Type: Application
    Filed: May 26, 2023
    Publication date: November 30, 2023
    Inventors: LEI FU, BRETT P. WILKERSON, RAHUL AGARWAL
  • Patent number: 11830817
    Abstract: A semiconductor package includes a first die, a second die, and an interconnect die coupled to a first plurality of through-die vias in the first die and a second plurality of through-die vias in the second die. The interconnect die provides communications pathways the first die and the second die.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: November 28, 2023
    Assignees: ADVANCED MICRO DEVICES, INC., ATI TECHNOLOGIES ULC
    Inventors: Rahul Agarwal, Raja Swaminathan, Michael S. Alfano, Gabriel H. Loh, Alan D. Smith, Gabriel Wong, Michael Mantor
  • Patent number: 11804479
    Abstract: Systems, apparatuses, and methods for routing traffic through vertically stacked semiconductor dies are disclosed. A first semiconductor die has a second die stacked vertically on top of it in a three-dimensional integrated circuit. The first die includes a through silicon via (TSV) interconnect that does not traverse the first die. The first die includes one or more metal layers above the TSV, which connect to a bonding pad interface through a bonding pad via. If the signals transferred through the TSV of the first die are shared by the second die, then the second die includes a TSV aligned with the bonding pad interface of the first die. If these signals are not shared by the second die, then the second die includes an insulated portion of a wafer backside aligned with the bonding pad interface.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: October 31, 2023
    Assignee: Advanced Micro Devices, Inc.
    Inventors: John J. Wuu, Milind S. Bhagavat, Brett P. Wilkerson, Rahul Agarwal
  • Publication number: 20230328003
    Abstract: Described herein are systems, methods, and software to manage multiple sellers of record in a cloud computing environment. In one example, a cloud management service can monitor resource usage in association one or more cloud service providers for each seller of record of a plurality of sellers of record for a customer organization. The cloud management service can further identify interface requirements for reporting the usage information to each of the sellers of record and can communicate the corresponding usage information to each of the sellers of record.
    Type: Application
    Filed: April 11, 2022
    Publication date: October 12, 2023
    Inventors: Rahul Agarwal, Rockne J. Egnatios, Jahnavi Mukesh Patel, Alex Rankov, Sunil Kumar, Narayan Bharadwaj, Srinivasan Seetharaman, Suresh Babu Bashyam, Oren Daniel Root, Vijayakumar Kothandaraman
  • Publication number: 20230297582
    Abstract: Computer implemented systems and methods are disclosed for automatically clustering and canonically identifying related data in various data structures. Data structures may include a plurality of records, wherein each record is associated with a respective entity. In accordance with some embodiments, the systems and methods further comprise identifying clusters of records associated with a respective entity by grouping the records into pairs, analyzing the respective pairs to determine a probability that both members of the pair relate to a common entity, and identifying a cluster of overlapping pairs to generate a collection of records relating to a common entity. Clusters may further be analyzed to determine canonical names or other properties for the respective entities by analyzing record fields and identifying similarities.
    Type: Application
    Filed: May 30, 2023
    Publication date: September 21, 2023
    Inventors: Lawrence Manning, Rahul Mehta, Daniel Erenrich, Guillem Palou Visa, Roger Hu, Xavier Falco, Rowan Gilmore, Eli Bingham, Jason Prestinario, Yifei Huang, Daniel Fernandez, Jeremy Elser, Clayton Sader, Rahul Agarwal, Matthew Elkherj, Nicholas Latourette, Aleksandr Zamoshchin
  • Patent number: 11749629
    Abstract: A semiconductor package for high-speed die connections using a conductive insert, the semiconductor package comprising: a die; a plurality of redistribution layers; a conductive insert housed in a perforation through the plurality of redistribution layers; and a conductive bump conductively coupled to an input/output (I/O) connection point of the die via the conductive insert.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: September 5, 2023
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventor: Rahul Agarwal
  • Patent number: 11742301
    Abstract: Various semiconductor chip packages are disclosed. In one aspect, a semiconductor chip package is provided that includes a fan-out redistribution layer (RDL) structure that has plural stacked polymer layers, plural metallization layers, plural conductive vias interconnecting adjacent metallization layers of the metallization layers, and plural rivets configured to resist delamination of one or more of the polymer layers. Each of the plural rivets includes a first head, a second head and a shank connected between the first head and the second head. The first head is part of one of the metallization layers. The shank includes at least one of the conductive vias and at least one part of another of the metallization layers.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: August 29, 2023
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Rahul Agarwal, Milind S. Bhagavat, Priyal Shah, Chia-Hao Cheng, Brett P. Wilkerson, Lei Fu
  • Patent number: 11741962
    Abstract: Techniques for generating a recommendation for content based on user-device dialogue are described. In an example, a computer system receives a request for audio output at a user device. The computer system determines a response for the request. The computer system determines a topic and value associated with the request and the response. The computer system also determines a recommendation for content based on the request and the response. The computer system generates prompt data including a question of whether to initiate an action associated with the recommendation. The computer system sends the prompt data and the response data to the user device or a different user device.
    Type: Grant
    Filed: July 11, 2022
    Date of Patent: August 29, 2023
    Assignee: Amazon Technologies, Inc.
    Inventors: Matthew Dominick Mahar, Rahul Agarwal, Emanuele Coviello, Gustavo Souza Melo
  • Publication number: 20230268319
    Abstract: A semiconductor assembly includes a first die having a front side metallization layer. The semiconductor assembly also includes a second side having a front side metallization layer that is bonded to the front side metallization layer of the first die.
    Type: Application
    Filed: October 14, 2022
    Publication date: August 24, 2023
    Inventors: RAHUL AGARWAL, RAJA SWAMINATHAN, JOHN WUU
  • Patent number: 11733229
    Abstract: In some embodiments, apparatuses, systems, and methods are provided herein useful to assessing products. In some embodiments, an enclosure for use in assessing products comprises a housing including a door configured to allow placement of a product within the housing, a product holding surface located within the housing allowing pictures to be taken through the product holding surface and configured to support the product, a first image capture device configured to capture an image of the product from a first perspective, a second image capture device configured to capture an image of the product from a second perspective, and wherein the image of the product from the second perspective is captured through the product holding surface, and a lighting element, wherein the lighting element is located within the housing, and wherein the lighting element is configured to provide lighting within the housing.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: August 22, 2023
    Assignee: Walmart Apollo, LLC
    Inventors: Joshua T. Bohling, Chuck E. Tilmon, Emily Moneka Francis Xavier, Daniel J. Pumford, Brian J. A. Schardt, Issac Mathew, Venkataraja Nellore, Gaurav Savlani, Viraj C. Patel, Rahul Agarwal, Pushkar Pushp, Jennifer McTeer
  • Patent number: 11734813
    Abstract: Systems, methods, and computer-readable storage media for object detection and classification, and particularly produce detection and classification. A system configured according to this disclosure can receiving, at a processor, an image of an item. The system can then perform, across multiple pre-trained neural networks, feature detection on the image, resulting in feature maps of the image. These feature maps can be concatenated and combined, then input into an additional neural network for feature detection on the combined feature map, resulting in tiered neural network features. The system then classifies, via the processor, the item based on the tiered neural network features.
    Type: Grant
    Filed: July 19, 2022
    Date of Patent: August 22, 2023
    Assignee: Walmart Apollo, LLC
    Inventors: Issac Mathew, Pushkar Pushp, Viraj Patel, Emily Xavier, Gaurav Savlani, Venkataraja Nellore, Rahul Agarwal, Girish Thiruvenkadam, Shivani Naik
  • Publication number: 20230247259
    Abstract: Systems and methods for optimizing interactions with a media-streaming application platform are disclosed. One method includes identifying a user of a media-streaming application platform running on an information handling device. Based on this identification, a user profile associated with one or more social media platforms linked to the media-streaming application platform may be accessed. Media-related activity data from at least one other individual on the social media platform(s) may be obtained. Thereafter, a determination may be made whether one or more articles of media content available to the media-streaming application platform are associated with the media-related activity of the other individuals. Responsive to identifying that a positive association exists, one or more recommendation rails may be presented on the media-streaming application platform. Other aspects are described and claimed.
    Type: Application
    Filed: January 28, 2022
    Publication date: August 3, 2023
    Inventor: Rahul AGARWAL
  • Patent number: 11715691
    Abstract: Various semiconductor chip devices and methods of making the same are disclosed. In one aspect, an apparatus is provided that includes a first redistribution layer (RDL) structure having a first plurality of conductor traces, a first molding layer on the first RDL structure, plural conductive pillars in the first molding layer, each of the conductive pillars including a first end and a second end, a second RDL structure on the first molding layer, the second RDL structure having a second plurality of conductor traces, and wherein some of the conductive pillars are electrically connected between some of the first plurality of conductor traces and some of the second plurality of conductor traces to provide a first inductor coil.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: August 1, 2023
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Milind S. Bhagavat, Rahul Agarwal, Chia-Hao Cheng
  • Patent number: 11709327
    Abstract: A semiconductor package includes a first mold layer at least partially encasing at least one photonic integrated circuit. A redistribution layer structure is fabricated on the first mold layer, the redistribution layer structure including dielectric material and conductive structures. A second mold layer at least partially encasing at least one semiconductor chip is fabricated on the redistribution layer structure. The redistribution layer structure provides electrical pathways between the at least one semiconductor chip and the at least one photonic integrated circuit. One or more voids are defined in the second mold layer in an area above an optical interface of the at least one photonic integrated circuit such that light is transmittable through dielectric material above the optical interface.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: July 25, 2023
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Brett P. Wilkerson, Raja Swaminathan, Kong Toon Ng, Rahul Agarwal
  • Patent number: 11704325
    Abstract: Computer implemented systems and methods are disclosed for automatically clustering and canonically identifying related data in various data structures. Data structures may include a plurality of records, wherein each record is associated with a respective entity. In accordance with some embodiments, the systems and methods further comprise identifying clusters of records associated with a respective entity by grouping the records into pairs, analyzing the respective pairs to determine a probability that both members of the pair relate to a common entity, and identifying a cluster of overlapping pairs to generate a collection of records relating to a common entity. Clusters may further be analyzed to determine canonical names or other properties for the respective entities by analyzing record fields and identifying similarities.
    Type: Grant
    Filed: July 15, 2022
    Date of Patent: July 18, 2023
    Assignee: Palantir Technologies Inc.
    Inventors: Lawrence Manning, Rahul Mehta, Daniel Erenrich, Guillem Palou Visa, Roger Hu, Xavier Falco, Rowan Gilmore, Eli Bingham, Jason Prestinario, Yifei Huang, Daniel Fernandez, Jeremy Elser, Clayton Sader, Rahul Agarwal, Matthew Elkherj, Nicholas Latourette, Aleksandr Zamoshchin