Patents by Inventor Rahul Agarwal

Rahul Agarwal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220415723
    Abstract: A chip for wafer-level testing of fanout chiplet, including: a die; a carrier substrate; a plurality of redistribution layers applied to the carrier substrate; and one or more first conductive pathways in the plurality of redistribution layers, wherein the one or more first conductive pathways each comprise a first end coupled to a corresponding input/output connection point of the die and a second end coupled to a corresponding probing site, wherein the one or more first conductive pathways are not routed through the carrier substrate.
    Type: Application
    Filed: June 28, 2021
    Publication date: December 29, 2022
    Inventors: RAHUL AGARWAL, DEAN GONZALES
  • Patent number: 11526471
    Abstract: A model management system provides a centralized repository for storing and accessing models. The model management system receives an input to store a model object in a first model state generated based on a first set of known variables. The model management system generates a first file including a first set of functions defining the first model state and associates the first file with a model key identifying the model object. The model management system receives an input to store the model object in a second model state having been generated based on the first model state and a second set of known variables. The model management system generates a second file including a second set of functions defining the second model state and associates the second file with the model key. The model management system identifies available versions of the model object based on the model key.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: December 13, 2022
    Assignee: Palantir Technologies Inc.
    Inventors: David Lisuk, Daniel Erenrich, Guodong Xu, Luis Voloch, Rahul Agarwal, Simon Slowik, Aleksandr Zamoshchin, Andre Frederico Cavalheiro Menck, Anirvan Mukherjee, Daniel Chin
  • Publication number: 20220392882
    Abstract: A three-dimensional integrated circuit includes a first die structure having a first geometry. The first die structure includes a first region that operates with a first power density and a second region that operates with a second power density. The first power density is less than the second power density. The three-dimensional integrated circuit includes a second die structure having a second geometry. A stacked portion of the second die structure is aligned with the first region. The three-dimensional integrated circuit includes an additional die structure stacked with the first die structure and the second die structure. The additional die structure has the first geometry or the second geometry.
    Type: Application
    Filed: August 19, 2022
    Publication date: December 8, 2022
    Inventors: Brett P. Wilkerson, Milind S. Bhagavat, Rahul Agarwal, Dmitri Yudanov
  • Patent number: 11517740
    Abstract: The present invention is generally related to methods and systems for preventing onset or worsening of RHF in patients with implanted ventricular assist devices. More particularly, the present invention relates to identifying patients at risk for RHF following implantation of a ventricular assist device based on pulmonary artery pressure measurement and/or trends and adjusting a pump operating parameter to prevent or reduce the onset or worsening of RHF in such patients, improve patient outcomes, or reduce mortality risks associated with VAD implantation. In particular, a pump operating parameter may be adjusted to reduce or minimize particularly high pressure loads on a patient's heart or amount of time the patient is exposed to such high pressure loads following implantation.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: December 6, 2022
    Assignee: TC1 LLC
    Inventors: Rahul Agarwal, Allison Connolly, Yelena Nabutovsky, Julie Prillinger
  • Publication number: 20220374454
    Abstract: Computer implemented systems and methods are disclosed for automatically clustering and canonically identifying related data in various data structures. Data structures may include a plurality of records, wherein each record is associated with a respective entity. In accordance with some embodiments, the systems and methods further comprise identifying clusters of records associated with a respective entity by grouping the records into pairs, analyzing the respective pairs to determine a probability that both members of the pair relate to a common entity, and identifying a cluster of overlapping pairs to generate a collection of records relating to a common entity. Clusters may further be analyzed to determine canonical names or other properties for the respective entities by analyzing record fields and identifying similarities.
    Type: Application
    Filed: July 15, 2022
    Publication date: November 24, 2022
    Inventors: Lawrence Manning, Rahul Mehta, Daniel Erenrich, Guillem Palou Visa, Roger Hu, Xavier Falco, Rowan Gilmore, Eli Bingham, Jason Prestinario, Yifei Huang, Daniel Fernandez, Jeremy Elser, Clayton Sader, Rahul Agarwal, Matthew Elkherj, Nicholas Latourette, Aleksandr Zamoshchin
  • Patent number: 11495588
    Abstract: Various circuit boards with mounted passive components and method of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes at least partially encapsulating a first plurality of passive components in a molding material to create a first molded passive component group. The first molded passive component group is mounted on a surface of a circuit board. The first plurality of passive components are electrically connected to the circuit board.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: November 8, 2022
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Milind Bhagavat, Rahul Agarwal
  • Publication number: 20220351364
    Abstract: Systems, methods, and computer-readable storage media for object detection and classification, and particularly produce detection and classification. A system configured according to this disclosure can receiving, at a processor, an image of an item. The system can then perform, across multiple pre-trained neural networks, feature detection on the image, resulting in feature maps of the image. These feature maps can be concatenated and combined, then input into an additional neural network for feature detection on the combined feature map, resulting in tiered neural network features. The system then classifies, via the processor, the item based on the tiered neural network features.
    Type: Application
    Filed: July 19, 2022
    Publication date: November 3, 2022
    Inventors: Issac Mathew, Pushkar Pushp, Viraj Patel, Emily Xavier, Gaurav Savlani, Venkataraja Nellore, Rahul Agarwal, Girish Thiruvenkadam, Shivani Naik
  • Patent number: 11488058
    Abstract: In various example embodiments, a vector modeling system is configured to access a set of data distributed across client devices and stored in a structured format. The vector modeling system determines vector parameters and vector templates suitable for the set of data and transforms the set of data from the structured format into a second format including one or more vectors based on one or more transformation strategies. The vector modeling system stores the transformed data and performs machine learning analysis on the vector.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: November 1, 2022
    Assignee: Palantir Technologies Inc.
    Inventors: Rahul Agarwal, Daniel Erenrich
  • Publication number: 20220342165
    Abstract: A semiconductor package includes a first mold layer at least partially encasing at least one photonic integrated circuit. A redistribution layer structure is fabricated on the first mold layer, the redistribution layer structure including dielectric material and conductive structures. A second mold layer at least partially encasing at least one semiconductor chip is fabricated on the redistribution layer structure. The redistribution layer structure provides electrical pathways between the at least one semiconductor chip and the at least one photonic integrated circuit. One or more voids are defined in the second mold layer in an area above an optical interface of the at least one photonic integrated circuit such that light is transmittable through dielectric material above the optical interface.
    Type: Application
    Filed: June 28, 2021
    Publication date: October 27, 2022
    Inventors: BRETT P. WILKERSON, RAJA SWAMINATHAN, KONG TOON NG, RAHUL AGARWAL
  • Patent number: 11469183
    Abstract: A method of manufacturing a semiconductor device includes mounting an interconnect chip to a redistribution layer structure and mounting a first, second, and third semiconductor chip to the redistribution layer structure, where the second semiconductor chip is interposed between the first and the third semiconductor chips, and the interconnect chip communicatively couples the first, second and third, semiconductor chips to one another.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: October 11, 2022
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Rahul Agarwal, Milind S. Bhagavat
  • Publication number: 20220319871
    Abstract: Various semiconductor chip packages are disclosed. In one aspect, a semiconductor chip package includes a package substrate that has a first side and a second side opposite to the first side. A semiconductor chip is mounted on the first side. Plural metal anchor structures are coupled to the package substrate and project away from the first side. A molding layer is on the package substrate and at least partially encapsulates the semiconductor chip and the anchor structures. The anchor structures terminate in the molding layer and anchor the molding layer to the package substrate.
    Type: Application
    Filed: June 17, 2022
    Publication date: October 6, 2022
    Inventors: PRIYAL SHAH, MILIND S. BHAGAVAT, BRETT P. WILKERSON, LEI FU, RAHUL AGARWAL
  • Publication number: 20220292407
    Abstract: A system including one or more processors and one or more non-transitory computer-readable media storing computing instructions configured to run on the one or more processors and perform: receiving historical delivery records over a predetermined time period from partners associated with items offered to subregions through an online platform; generating nodes for combinations each comprising a respective one of the partners, a respective one of the items offered by the partners, and a respective one of the subregions; generating, using a machine learning model, a respective classification for each respective node on whether to tag the each respective node as deliverable in a predetermined time window; and automatically tagging a portion of the nodes as deliverable in the predetermined time window in the online platform. Other embodiments are disclosed.
    Type: Application
    Filed: March 15, 2021
    Publication date: September 15, 2022
    Applicant: Walmart Apollo, LLC
    Inventors: Omker Mahalanobish, Rahul Agarwal, Nicholas William Sinai, Girish Thiruvenkadam
  • Patent number: 11437359
    Abstract: A method for manufacturing a three-dimensional integrated circuit includes attaching a first side of a first die to a first carrier wafer. The method includes preparing a second side of the first die to generate a prepared second side of the first die. The method includes attaching the prepared second side of the first die to a second carrier wafer. The method includes removing the first carrier wafer from the first side of the first die to form a transitional three-dimensional integrated circuit. The method includes attaching a third carrier wafer to a first side of the transitional three-dimensional integrated circuit. The method includes attaching a first side of the second die to a second side of the transitional three-dimensional integrated circuit.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: September 6, 2022
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Brett P. Wilkerson, Milind S. Bhagavat, Rahul Agarwal, Dmitri Yudanov
  • Patent number: 11429464
    Abstract: A method of configuring a hybrid, multi-cloud gateway configuration system for executing an application programming interface (API) may comprise receiving, via a network interface device of the API service control plane system, gateway operation policies in a first format for execution of an API at a first gateway type and a second gateway type, generating via one of a plurality of gateway type policy translators and transmitting to a gateway of the first gateway type, a first configuration file in a second format, instructing the gateway of the first gateway type to provision the API to meet the gateway operation policies, and generating via another one of the plurality of gateway type policy translators and transmitting to a gateway of the second gateway type, a second configuration file in a third format, instructing the gateway of the second gateway type to provision the API to meet the gateway operation policies.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: August 30, 2022
    Assignee: BOOMI, LP
    Inventors: Rajesh Raheja, Sean P. Collins, Rahul Agarwal, Ed Macosky
  • Publication number: 20220250845
    Abstract: A delivery system generates a pick sheet containing a plurality of SKUs based upon an order. A loaded pallet is imaged to identify the SKUs on the loaded pallet, which are compared to the order prior to the loaded pallet leaving the distribution center. The loaded pallet may be imaged while being wrapped with stretch wrap. At the point of delivery, the loaded pallet may be imaged again and analyzed to compare with the pick sheet.
    Type: Application
    Filed: April 26, 2022
    Publication date: August 11, 2022
    Inventors: Robert Lee Martin, JR., Kalpana Mahesh, Rachel Herstad, Georgey John, Hari Durga Tatineni, Rahul Agarwal, Jason Crawford Miller, Ravi Raghunathan, Joseph Melendez, Deanna Petrochilos, Charles Burden
  • Patent number: 11410653
    Abstract: Techniques for generating a recommendation for content based on user-device dialogue are described. In an example, a computer system receives a request for audio output at a user device. The computer system determines a response for the request. The computer system determines a topic and value associated with the request and the response. The computer system also determines a recommendation for content based on the request and the response. The computer system generates prompt data including a question of whether to initiate an action associated with the recommendation. The computer system sends the prompt data and the response data to the user device or a different user device.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: August 9, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Matthew Dominick Mahar, Rahul Agarwal, Emanuele Coviello, Gustavo Souza Melo
  • Patent number: 11393082
    Abstract: Systems, methods, and computer-readable storage media for object detection and classification, and particularly produce detection and classification. A system configured according to this disclosure can receiving, at a processor, an image of an item. The system can then perform, across multiple pre-trained neural networks, feature detection on the image, resulting in feature maps of the image. These feature maps can be concatenated and combined, then input into an additional neural network for feature detection on the combined feature map, resulting in tiered neural network features. The system then classifies, via the processor, the item based on the tiered neural network features.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: July 19, 2022
    Assignee: Walmart Apollo, LLC
    Inventors: Issac Mathew, Pushkar Pushp, Viraj Patel, Emily Xavier, Gaurav Savlani, Venkataraja Nellore, Rahul Agarwal, Girish Thiruvenkadam, Shivani Naik
  • Patent number: 11392591
    Abstract: Computer implemented systems and methods are disclosed for automatically clustering and canonically identifying related data in various data structures. Data structures may include a plurality of records, wherein each record is associated with a respective entity. In accordance with some embodiments, the systems and methods further comprise identifying clusters of records associated with a respective entity by grouping the records into pairs, analyzing the respective pairs to determine a probability that both members of the pair relate to a common entity, and identifying a cluster of overlapping pairs to generate a collection of records relating to a common entity. Clusters may further be analyzed to determine canonical names or other properties for the respective entities by analyzing record fields and identifying similarities.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: July 19, 2022
    Assignee: Palantir Technologies Inc.
    Inventors: Lawrence Manning, Rahul Mehta, Daniel Erenrich, Guillem Palou Visa, Roger Hu, Xavier Falco, Rowan Gilmore, Eli Bingham, Jason Prestinario, Yifei Huang, Daniel Fernandez, Jeremy Elser, Clayton Sader, Rahul Agarwal, Matthew Elkherj, Nicholas Latourette, Aleksandr Zamoshchin
  • Patent number: 11393697
    Abstract: Various semiconductor chips with gettering regions and methods of making the same are disclosed. In one aspect, an apparatus is provided that includes a semiconductor chip that has a first side and a second side opposite the first side. The first side has a plurality of laser ablation craters. Each of the ablation craters has a bottom. A gettering region is in the semiconductor chip beneath the laser ablation craters. The gettering region includes plural structural defects. At least some of the structural defects emanate from at least some of the bottoms of the laser ablation craters.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: July 19, 2022
    Assignee: ADVANCED MICRO DEVICES, INC
    Inventors: Rahul Agarwal, Milind S. Bhagavat, Ivor Barber, Venkatachalam Valliappan, Yuen Ting Cheng, Guan Sin Chok
  • Patent number: 11383930
    Abstract: A delivery system generates a pick sheet containing a plurality of SKUs based upon an order. A loaded pallet is imaged to identify the SKUs on the loaded pallet, which are compared to the order prior to the loaded pallet leaving the distribution center. The loaded pallet may be imaged while being wrapped with stretch wrap. At the point of delivery, the loaded pallet may be imaged again and analyzed to compare with the pick sheet.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: July 12, 2022
    Assignee: Rehrig Pacific Company
    Inventors: Robert Lee Martin, Jr., Kalpana Mahesh, Rachel Herstad, Georgey John, Hari Durga Tatineni, Rahul Agarwal, Jason Crawford Miller, Ravi Raghunathan, Joseph Melendez, Deanna Petrochilos, Charles Burden