Patents by Inventor Rahul Jain

Rahul Jain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10999497
    Abstract: A system-on-chip (SoC) includes first and second processing circuits and a data exchange circuit such that the first processing circuit is configured to process image lines based on corresponding sets of processing attributes. The first processing circuit is further configured to continuously receive and process the image lines one after the other to generate corresponding output data, and the second processing circuit is configured to continuously receive by way of the data exchange circuit, the generated output data for processing the generated output data. The data exchange circuit is thus configured to control data flow between the first processing circuit and the second processing circuit such that the first processing circuit and the second processing circuit parallelly process corresponding data associated with same or different image lines.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: May 4, 2021
    Assignee: NXP USA, INC.
    Inventors: Chanpreet Singh, Stephan Matthias Herrmann, Gaurav Gupta, Rahul Jain
  • Publication number: 20210111088
    Abstract: An apparatus is provided which comprises: a substrate, a die site on the substrate to couple with a die, a die side component site on the substrate to couple with a die side component, and a raised barrier on the substrate between the die and die side component sites to contain underfill material disposed at the die site, wherein the raised barrier comprises electroplated metal. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: December 29, 2016
    Publication date: April 15, 2021
    Applicant: INTEL CORPORATION
    Inventors: Rahul Jain, Kyu Oh Lee, Siddharth K. Alur, Wei-Lun K. Jen, Vipul V. Mehta, Ashish Dhall, Sri Chaitra J. Chavali, Rahul N. Manepalli, Amruthavalli P. Alur, Sai Vadlamani
  • Publication number: 20210102728
    Abstract: Aspects of the present disclosure include a damper control system having a casing configured to detachably couple from a conventional air register having a damper assembly movably controllable by a manual lever, a motor assembly mounted to the casing, an actuating linkage assembly movably attached to the motor assembly and configured to detachably couple with the manual lever that controls the damper assembly, wherein one or more dampers of the damper assembly are in a closed position when the actuating linkage assembly is in a first position and in an open position when the actuating linkage assembly is in a second position, a memory mounted within the casing, and one or more processors communicatively coupled with the memory and mounted within the casing, the one or more processors being configured to cause the motor assembly to drive the actuating linkage assembly between the first position and the second position.
    Type: Application
    Filed: October 3, 2019
    Publication date: April 8, 2021
    Inventors: Eric Wayne PALMBOS, Vikas Ashok PATIL, Satyendra KUMAR, Rahul JAIN
  • Patent number: 10971492
    Abstract: Disclosed embodiments include an embedded thin-film capacitor and a magnetic inductor that are assembled in two adjacent build-up layers of a semiconductor package substrate. The thin-film capacitor is seated on a surface of a first of the build-up layers and the magnetic inductor is partially disposed in a recess in the adjacent build up layer. The embedded thin-film capacitor and the integral magnetic inductor are configured within a die shadow that is on a die side of the semiconductor package substrate.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: April 6, 2021
    Assignee: Intel Corporation
    Inventors: Cheng Xu, Rahul Jain, Seo Young Kim, Kyu Oh Lee, Ji Yong Park, Sai Vadlamani, Junnan Zhao
  • Publication number: 20210092489
    Abstract: According to an embodiment of the present disclosure, a method comprises playing, by the media player, a 360-degree video. The method further comprises recording, by the media player, one or more viewing angles corresponding to a user's viewing of the 360-degree video. Further, the method comprises detecting, by the media player, a video seek event to a seek point of the 360-degree video. The method further comprises playing, by the media player, the 360-degree video from the seek point according to a viewing angle determined based on at least one of (a) a recorded viewing angle and (b) a view mode.
    Type: Application
    Filed: November 26, 2018
    Publication date: March 25, 2021
    Inventors: Bhaskar DUTTA, Manoj VERMA, Rahul JAIN
  • Patent number: 10949907
    Abstract: Methods and systems for generating a list of products each matching a reference product are disclosed. A user query is first received, and multi-modal attribute data for the reference product are determined, with each data mode being a type of product characterization having a modality selected from a text data class, categorical data, a pre-compared engineered feature, audio, image, and video. Next, a first list of candidate products is determined based on a product match signature, and a second list of candidate products is generated from the first, wherein for at least one given candidate product, a deep learning multi-modal matching model is selected to determine whether a match is found. Lastly, the second list is filtered to remove outliers and to generate the list of matching products. Also disclosed are benefits of the new methods and systems, and alternative embodiments of the implementation.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: March 16, 2021
    Assignee: Price Technologies Inc.
    Inventors: Rahul Jain, Steven Douglas Moffitt
  • Publication number: 20210066162
    Abstract: A device is disclosed. The device includes a substrate, a die on the substrate, a thermal interface material (TIM) on the die, and solder bumps on a periphery of a top surface of the substrate. An integrated heat spreader (IHS) is formed on the solder bumps. The IHS covers the TIM.
    Type: Application
    Filed: August 30, 2019
    Publication date: March 4, 2021
    Inventors: Sergio A. CHAN ARGUEDAS, Nicholas S. HAEHN, Edvin CETEGEN, Nicholas NEAL, Jacob VEHONSKY, Steve S. CHO, Rahul JAIN, Antariksh Rao Pratap SINGH, Tarek A. IBRAHIM, Thomas HEATON, Vipul MEHTA
  • Patent number: 10923443
    Abstract: A substrate for an electronic device may include a first layer, a second layer, and may include a third layer. The first layer may include a capacitive material, and the capacitive material may be segmented into a first section, and a second section. Each of the first section and the second section may include a first surface and a second surface. The second layer may include a first conductor. The third layer may include a second conductor. The first surface of the second section of capacitive material may be directly coupled to the first conductor. The second surface of the second section of the capacitive material may be directly coupled to the second conductor. A first filler region may include a dielectric material and the first filler region may be located in a first gap between the first section of capacitive material and the second section of capacitive material.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: February 16, 2021
    Assignee: Intel Corporation
    Inventors: Brandon C Marin, Shivasubramanian Balasubramanian, Rahul Jain, Praneeth Akkinepally, Jeremy D Ecton
  • Patent number: 10922781
    Abstract: A system for processing multiple images includes an access serializer, trigger controllers, a first-in-first-out (FIFO) memory, and an image signal processing (ISP) pipeline circuit. The access serializer serializes access requests that are associated with processing of input image lines of the images. The trigger controllers decode corresponding serialized access requests to generate trigger identifiers (IDs), respectively. The FIFO memory receives a corresponding trigger ID from each trigger controller and provides the trigger IDs to the ISP pipeline circuit based on an order of reception of the trigger IDs. The ISP pipeline circuit receives the input image lines associated with the trigger IDs, and based on a corresponding set of configuration parameters associated with the input image lines, processes the input image lines in an order of reception of the trigger IDs, to generate processed image lines, respectively.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: February 16, 2021
    Assignee: NXP USA, INC.
    Inventors: Chanpreet Singh, Stephan Matthias Herrmann, Rahul Jain, Gaurav Gupta, Pranshu Agrawal, Navarshi Dhiman
  • Publication number: 20210035271
    Abstract: Embodiments are disclosed that apply adaptive sub-tiles to captured images for distortion correction in vision-based assistance systems and methods. A captured image is processed to generate corrected tiles, and selected numbers of sub-tiles are used to generate each of the corrected tiles depending upon the pixel densities for regions of the captured image. The corrected sub-tiles are combined to form corrected tiles, and corrected tiles are combined for form a corrected image. The corrected image can be used to output control signals to cause actions to be issued to a user of the system such as a driver of a vehicle. For one embodiment, the corrected tiles are generated one at a time, and corrected sub-tiles for each corrected tile are also generated one at a time based upon individual source data blocks determined by a pre-determined sub-tile configuration. Efficient memory use and data transfers are provided.
    Type: Application
    Filed: July 31, 2019
    Publication date: February 4, 2021
    Inventors: Sharath Subramanya Naidu, Michael Andreas Staudenmaier, Chanpreet Singh, Rahul Jain
  • Publication number: 20210036889
    Abstract: A system and method for connecting virtual computer networks in a public cloud computing environment using a transit virtual computer network uses a cloud gateway device in the transit virtual computer network that includes a first-tier logical router and a plurality of second-tier logical routers connected to the virtual computer networks. A source Internet Protocol (IP) address of outgoing data packets from a particular virtual computer network is translated at a particular second-tier logical router of the cloud gateway device from an IP address of the particular virtual computer network to an internal IP address from a particular pool of IP addresses. The outgoing data packets are then routed to the first-tier logical router of the cloud gateway device, where the outgoing data packets are transmitted a destination network from a particular interface of the first-tier logical router of the cloud gateway device.
    Type: Application
    Filed: July 29, 2019
    Publication date: February 4, 2021
    Inventors: Rahul JAIN, Mukesh HIRA
  • Publication number: 20210035921
    Abstract: Embodiments disclosed herein include electronic packages with thermal solutions. In an embodiment, an electronic package comprises a package substrate, a first die electrically coupled to the package substrate, and an integrated heat spreader (IHS) that is thermally coupled to a surface of the first die. In an embodiment, the IHS comprises a main body having an outer perimeter, and one or more legs attached to the outer perimeter of the main body, wherein the one or more legs are supported by the package substrate. In an embodiment, the electronic package further comprises a thermal block between the package substrate and the main body of the IHS, wherein the thermal block is within the outer perimeter of the main body.
    Type: Application
    Filed: July 30, 2019
    Publication date: February 4, 2021
    Inventors: Nicholas NEAL, Nicholas S. HAEHN, Sergio CHAN ARGUEDAS, Edvin CETEGEN, Jacob VEHONSKY, Steve S. CHO, Rahul JAIN, Antariksh Rao Pratap SINGH, Tarek A. IBRAHIM, Thomas HEATON
  • Patent number: 10909668
    Abstract: Embodiments are disclosed that apply adaptive sub-tiles to captured images for distortion correction in vision-based assistance systems and methods. A captured image is processed to generate corrected tiles, and selected numbers of sub-tiles are used to generate each of the corrected tiles depending upon the pixel densities for regions of the captured image. The corrected sub-tiles are combined to form corrected tiles, and corrected tiles are combined for form a corrected image. The corrected image can be used to output control signals to cause actions to be issued to a user of the system such as a driver of a vehicle. For one embodiment, the corrected tiles are generated one at a time, and corrected sub-tiles for each corrected tile are also generated one at a time based upon individual source data blocks determined by a pre-determined sub-tile configuration. Efficient memory use and data transfers are provided.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: February 2, 2021
    Assignee: NXP USA, Inc.
    Inventors: Sharath Subramanya Naidu, Michael Andreas Staudenmaier, Chanpreet Singh, Rahul Jain
  • Publication number: 20210020531
    Abstract: Embodiments disclosed herein include electronic packages with underfill flow control features. In an embodiment, an electronic package comprises a package substrate and a plurality of interconnects on the package substrate. In an embodiment, a die is coupled to the package substrate by the plurality of interconnects and a flow control feature is adjacent on the package substrate. In an embodiment, the flow control feature is electrically isolated from circuitry of the electronic package. In an embodiment, the electronic package further comprises an underfill surrounding the plurality of interconnects and in contact with the flow control feature.
    Type: Application
    Filed: July 15, 2019
    Publication date: January 21, 2021
    Inventors: Edvin CETEGEN, Jacob VEHONSKY, Nicholas S. HAEHN, Thomas HEATON, Steve S. CHO, Rahul JAIN, Tarek IBRAHIM, Antariksh Rao Pratap SINGH, Nicholas NEAL, Sergio CHAN ARGUEDAS, Vipul MEHTA
  • Publication number: 20210020532
    Abstract: Embodiments disclosed herein include electronic packages and methods of forming such packages. In an embodiment an electronic package comprises a package substrate, and a first level interconnect (FLI) bump region on the package substrate. In an embodiment, the FLI bump region comprises a plurality of pads, and a plurality of bumps, where each bump is over a different one of the plurality of pads. In an embodiment, the electronic package further comprises a guard feature adjacent to the FLI bump region. In an embodiment, the guard feature comprises, a guard pad, and a guard bump over the guard pad, wherein the guard feature is electrically isolated from circuitry of the electronic package.
    Type: Application
    Filed: July 15, 2019
    Publication date: January 21, 2021
    Inventors: Jacob VEHONSKY, Nicholas S. HAEHN, Thomas HEATON, Steve S. CHO, Rahul JAIN, Tarek IBRAHIM, Antariksh Rao Pratap SINGH, Edvin CETEGEN, Nicholas NEAL, Sergio CHAN ARGUEDAS
  • Publication number: 20210021486
    Abstract: Example methods and computer systems are provided for east-west service insertion in a public cloud environment. An example method may comprise detecting an egress packet that is destined for a second endpoint located in the same virtual network as a first endpoint. The method may also comprise: in response to determination that service insertion is required, identifying a service path based on a service insertion rule; generating an encapsulated packet by encapsulating the egress packet with an outer header that is addressed from the first endpoint to a network device; and sending the encapsulated packet to cause the network device to send the egress packet towards the service path, thereby steering the egress packet towards the service path for processing.
    Type: Application
    Filed: July 18, 2019
    Publication date: January 21, 2021
    Applicant: VMware, Inc.
    Inventors: Rahul JAIN, Mukesh HIRA, Su WANG
  • Patent number: 10892989
    Abstract: Example methods and systems are provided a network device to perform tunnel-based service insertion in a public cloud environment. An example method may comprise establishing a tunnel between the network device and a service path. The method may also comprise: in response to receiving a first encapsulated packet, identifying the service path specified by a service insertion rule; generating and sending a second encapsulated packet over the tunnel to cause the service path to process an inner packet according to one or more services. The method may further comprise: in response to receiving, from the service path via the tunnel, a third encapsulated packet that includes the inner packet processed by the service path, sending the inner packet processed by the service path, or a fourth encapsulated packet, towards a destination address of the inner packet.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: January 12, 2021
    Assignee: VMWARE, INC.
    Inventors: Rahul Jain, Kantesh Mundaragi, Pierluigi Rolando, Jayant Jain, Mukesh Hira
  • Publication number: 20200411441
    Abstract: Embodiments described herein relate to lithographically defined vertical interconnect accesses (litho-vias) for a bridge die first level interconnect (FLI) and techniques of fabricating such litho-vias. In one example, a package substrate comprises a bridge die embedded in the package substrate; a first contact pad outside a perimeter of the bridge die; a second contact pad inside the perimeter of the bridge die and coupled to the bridge die by a first via; a third pad inside the perimeter of the bridge die, adjacent to the second contact pad, and coupled to the bridge die by a second via. The first contact pad has a surface finish disposed thereon. A first protruded interconnect structure is positioned on the first via and a second protruded interconnect structure is positioned on the second via. Each of the first and second vias have sidewalls that are substantially vertical.
    Type: Application
    Filed: June 27, 2019
    Publication date: December 31, 2020
    Inventors: Kristof DARMAWIKARTA, Tarek IBRAHIM, Siddharth ALUR, Rahul JAIN, Haobo CHEN
  • Publication number: 20200396123
    Abstract: A cloud extension agent can be provided on a customer premise for interfacing, via an outbound secure connection, cloud based services.
    Type: Application
    Filed: May 26, 2020
    Publication date: December 17, 2020
    Inventors: Vineeth Narasimhan, Joshua Lambert, Thomas Herchek, Ryan Elliot Hope, Nitish Jha, Rahul Jain, Sumeet Singh
  • Publication number: 20200396124
    Abstract: A cloud extension agent can be provided on a customer premise for interfacing, via an outbound secure connection, cloud based services.
    Type: Application
    Filed: June 25, 2020
    Publication date: December 17, 2020
    Inventors: Vineeth Narasimhan, Joshua Lambert, Thomas Herchek, Ryan Elliot Hope, Nitish Jha, Rahul Jain, Sumeet Singh