Patents by Inventor Ralf Siemieniec

Ralf Siemieniec has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190081039
    Abstract: A first semiconductor body including type IV semiconductor material is provided. A second semiconductor body including type III-V semiconductor material is provided. A first adhesion layer is formed on the first semiconductor body. A second adhesion layer is formed on the second semiconductor body. The first and the second semiconductor bodies are bonded together by adhering the first and the second adhesion layers to one another.
    Type: Application
    Filed: September 14, 2017
    Publication date: March 14, 2019
    Inventors: Ralf Siemieniec, Daniel Kueck, Gilberto Curatola, Romain Esteve
  • Patent number: 10211306
    Abstract: A semiconductor device includes a semiconductor body formed from a semiconductor material with a band-gap of at least 2.0 eV, the semiconductor body having a diode region and a source region. The semiconductor device further includes a trench gate structure having a first sidewall and a second sidewall opposite the first sidewall, the first sidewall and the second sidewall extending along a common longitudinal direction. A doping concentration of a first doping type is higher in the diode region than in the source region. The trench gate structure projects from a first surface of the semiconductor body into the semiconductor body. A first portion of the second sidewall at the first surface is directly adjoined by the source region. A second portion of the second sidewall is in direct contact with the diode region. Additional semiconductor device embodiments are provided.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: February 19, 2019
    Assignee: Infineon Technologies AG
    Inventors: Ralf Siemieniec, Dethard Peters, Romain Esteve, Wolfgang Bergner, Thomas Aichinger, Daniel Kueck, Roland Rupp, Bernd Zippelius, Karlheinz Feldrapp, Christian Strenger
  • Publication number: 20190035915
    Abstract: Disclosed is a transistor device. The transistor device includes: in a semiconductor body, a drift region, a body region adjoining the drift region, and a source region separated from the drift region by the body region; a gate electrode dielectrically insulated from the body region by a gate dielectric; a source electrode electrically connected to the source region; at least one field electrode dielectrically insulated from the drift region by a field electrode dielectric; and a rectifier element coupled between the source electrode and the field electrode. The field electrode and the field electrode dielectric are arranged in a first trench that extends from a first surface of the semiconductor body into the semiconductor body. The rectifier element is integrated in the first trench in a rectifier region that is adjacent at least one of the source region and the body region.
    Type: Application
    Filed: July 25, 2018
    Publication date: January 31, 2019
    Inventors: Ralf Siemieniec, Robert Haase, Gerhard Noebauer, Martin Poelzl
  • Patent number: 10177250
    Abstract: A method of manufacturing a semiconductor device includes: forming a trench extending into a semiconductor substrate and a polysilicon gate electrode in the trench; forming a body region of a first conductivity type in the substrate adjacent the trench and a source region of a second conductivity type adjacent the body region and the trench; forming a dielectric layer on the substrate; forming a gate metallization on the dielectric layer which covers part of the substrate and a source metallization on the dielectric layer which is electrically connected to the source region, spaced apart from the gate metallization and covering a different part of the substrate than the gate metallization; and forming a metal-filled groove in the polysilicon gate electrode which is electrically connected to the gate metallization. The metal-filled groove extends along a length of the trench underneath at least part of the source metallization.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: January 8, 2019
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Siemieniec, Oliver Blank, Li Juin Yip
  • Publication number: 20190006513
    Abstract: A semiconductor device includes a semiconductor substrate having drift and body regions. The drift region includes upper and lower drift regions. An active area includes a plurality of spicular trenches extending through the body region and into the drift region. Each spicular trench in the active area has a lower end which together define a lower end of the upper drift region extending towards a first side and a lower drift region extending from the lower end of the upper drift region towards a second side. The edge termination area includes spicular termination trenches extending at least into the upper drift region. A surface doping region arranged in the upper drift region in the edge termination area extends to the first side, is spaced apart from the lower end of the upper drift region, and has a net doping concentration lower than that of the upper drift region.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 3, 2019
    Inventors: Cedric Ouvrard, Adam Amali, Oliver Blank, Michael Hutzler, David Laforet, Harsh Naik, Ralf Siemieniec, Li Juin Yip
  • Patent number: 10164025
    Abstract: A semiconductor device comprises a semiconductor substrate structure comprising a cell region and an edge termination region surrounding the cell region. Further it comprises a plurality of needle-shaped cell trenches within the cell region reaching from a surface of the semiconductor substrate structure into the substrate structure and an edge termination trench within the edge termination region surrounding the cell region at the surface of the semiconductor substrate structure.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: December 25, 2018
    Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Oliver Blank, Franz Hirler, Ralf Siemieniec, Li Juin Yip
  • Publication number: 20180350968
    Abstract: A semiconductor device includes trench structures that extend from a first surface into a semiconductor body. The trench structures include a gate structure and a contact structure that extends through the gate structure, respectively. Transistor mesas are between the trench structures. Each transistor mesa includes a body zone forming a first pn junction with a drift structure and a second pn junction with a source zone. Diode regions directly adjoin one of the contact structures form a third pn junction with the drift structure, respectively.
    Type: Application
    Filed: August 3, 2018
    Publication date: December 6, 2018
    Inventors: Thomas Aichinger, Romain Esteve, Dethard Peters, Roland Rupp, Ralf Siemieniec
  • Publication number: 20180331204
    Abstract: By using at least one of a processor device and model transistor cells, a set of design parameters for at least one of a transistor cell and a drift structure of a wide band-gap semiconductor device is determined, wherein an on state failure-in-time rate and an off state failure-in-time rate of a gate dielectric of the transistor cell are within a same order of magnitude for a predefined on-state gate-to-source voltage, a predefined off-state gate-to-source voltage, and a predefined off-state drain-to-source voltage.
    Type: Application
    Filed: May 14, 2018
    Publication date: November 15, 2018
    Inventors: Thomas Aichinger, Wolfgang Bergner, Romain Esteve, Daniel Kueck, Dethard Peters, Ralf Siemieniec, Bernd Zippelius
  • Publication number: 20180315845
    Abstract: A semiconductor device includes a gate trench formed in a semiconductor body and having a first sidewall, a second sidewall opposite the first sidewall, and a bottom, a source region and a drift region of a first conductivity type formed in the semiconductor body, a body region of a second conductivity type arranged between the source region and the drift region and adjoining the first sidewall of the gate trench, and a diode region of the second conductivity type adjoining the second sidewall of the gate trench. A pn junction is formed between the diode region and the drift region and adjoins the bottom of the gate trench. The drift region has a locally increased doping concentration in a region between a pn junction at the border between the body region and the drift region and a lower end of the diode region.
    Type: Application
    Filed: June 29, 2018
    Publication date: November 1, 2018
    Inventors: Ralf Siemieniec, Wolfgang Bergner, Romain Esteve, Dethard Peters
  • Publication number: 20180308938
    Abstract: A semiconductor device includes a trench extending from a first surface into a SiC semiconductor body. The trench has a first sidewall, a second sidewall opposite to the first sidewall, and a trench bottom. A gate electrode is arranged in the trench and is electrically insulated from the SiC semiconductor body by a trench dielectric. A body region of a first conductivity type adjoins the first sidewall. A shielding structure of the first conductivity type adjoins at least a portion of the second sidewall and the trench bottom. A first section of the trench bottom and a second section of the trench bottom are offset to one another by a vertical offset along a vertical direction extending from the first surface to a second surface of the SiC semiconductor body opposite to the first surface.
    Type: Application
    Filed: April 23, 2018
    Publication date: October 25, 2018
    Inventors: Ralf Siemieniec, Thomas Aichinger, Romain Esteve, Daniel Kueck
  • Patent number: 10074741
    Abstract: A semiconductor device includes trench structures that extend from a first surface into a semiconductor body. The trench structures include a gate structure and a contact structure that extends through the gate structure, respectively. Transistor mesas are between the trench structures. Each transistor mesa includes a body zone forming a first pn junction with a drift structure and a second pn junction with a source zone. Diode regions directly adjoin one of the contact structures form a third pn junction with the drift structure, respectively.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: September 11, 2018
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Thomas Aichinger, Romain Esteve, Dethard Peters, Roland Rupp, Ralf Siemieniec
  • Patent number: 10068848
    Abstract: A semiconductor chip has a semiconductor body with a bottom side and a top side arranged distant from the bottom side in a vertical direction, an active and a non-active transistor region, a drift region formed in the semiconductor body, a contact terminal for externally contacting the semiconductor chip, and a plurality of transistor cells formed in the semiconductor body. Each of the transistor cells has a first electrode. Each of a plurality of connection lines electrically connects another one of the first electrodes to the contact terminal pad at a connecting location of the respective connection line. Each of the connection lines includes a resistance section formed of a locally increased specific resistance relative to a specific resistance of adjacent semiconductor material or metal of the respective connection line. Each of the connecting locations and each of the resistance sections is arranged in the non-active transistor region.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: September 4, 2018
    Assignee: Infineon Technologies Austria AG
    Inventors: Gerhard Noebauer, Ralf Siemieniec, Maximilian Roesch, Martin Poelzl, Michael Hutzler
  • Publication number: 20180248000
    Abstract: A vertical transistor device includes a silicon-carbide substrate, a gate trench formed in the silicon-carbide substrate, a body region adjacent the gate trench, a source region adjacent the gate trench and above the body region, and a dielectric material covering a bottom and a sidewall of the gate trench. A thickness of the dielectric material is greater at the bottom of the gate trench than along the sidewall of the gate trench. Further vertical transistor device embodiments and corresponding methods of manufacture are also described.
    Type: Application
    Filed: April 19, 2018
    Publication date: August 30, 2018
    Inventors: Romain Esteve, Dethard Peters, Wolfgang Bergner, Ralf Siemieniec, Thomas Aichinger, Daniel Kueck
  • Patent number: 10050113
    Abstract: A semiconductor device includes needle-shaped field plate structures extending from a first surface into transistor sections of a semiconductor portion in a transistor cell area. A grid structure separates the transistor sections from each other. The grid structure includes: stripe-shaped gate edge portions extending along one edge of the transistor sections, respectively; gate node portions wider than the gate edge portions and connecting two or more of the gate edge portions, respectively; and one or more connection sections of the semiconductor portion, wherein the one or more connection sections extend between neighboring transistor sections.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: August 14, 2018
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Siemieniec, Oliver Blank, David Laforet, Cedric Ouvrard, Li Juin Yip
  • Patent number: 10038087
    Abstract: According to an embodiment of a semiconductor device, the device includes a semiconductor body with a drift region and neighboring device cells integrated in the semiconductor body. Each device cell includes: a body region arranged between a source region and the drift region; a diode region and a pn junction between the diode region and the drift region; a trench with first and second opposing sidewalls and a bottom, the body region adjoining the first sidewall, the diode region adjoining the second sidewall, and the pn junction adjoining the bottom; and a gate electrode arranged in the trench and dielectrically insulated from the semiconductor body by a gate dielectric. The diode regions together with the drift region act as a JFET, which has a channel region in the drift region between the diode regions. The drift region has a locally increased doping concentration in the channel region of the JFET.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: July 31, 2018
    Assignee: Infineon Technologies AG
    Inventors: Ralf Siemieniec, Wolfgang Bergner, Romain Esteve, Dethard Peters
  • Publication number: 20180197852
    Abstract: A semiconductor body having a drift region layer, a body region layer adjoining the drift region layer, and a source region layer adjoining the body region layer and forming a first surface of the semiconductor body is provided. At least two trenches extend from the first surface of the semiconductor body through the source region layer and the body region layer. In each of the trenches a gate electrode and a gate dielectric are formed. Diode regions are directly adjacent to each of the at least two trenches. The diode regions extend from the first surface of the semiconductor body through the source region layer and the body region layer. The diode regions include a first region and a second region. A doping concentration in the diode regions varies such that a doping concentration is higher near the first surface than at the bottom of the trench.
    Type: Application
    Filed: March 9, 2018
    Publication date: July 12, 2018
    Inventors: Ralf Siemieniec, Dethard Peters, Romain Esteve
  • Publication number: 20180190651
    Abstract: A semiconductor device includes a semiconductor body having a first silicon carbide region and a second silicon carbide region which forms a pn-junction with the first silicon carbide region, a first metallization on a front side of the semiconductor body, a contact region that forms an Ohmic contact with the second silicon carbide region, and a barrier-layer between the first metallization and the contact region and that is in Ohmic connection with the first metallization and the contact region. The barrier-layer forms a Schottky-junction with the first silicon carbide region, and includes molybdenum nitride or tantalum nitride. Additional semiconductor device embodiments and corresponding methods of manufacture are described.
    Type: Application
    Filed: January 3, 2018
    Publication date: July 5, 2018
    Inventors: Ralf Siemieniec, Mihai Draghici, Jens Peter Konrath
  • Publication number: 20180175150
    Abstract: A body structure and a drift zone are formed in a semiconductor layer, wherein the body structure and the drift zone form a first pn junction. A silicon nitride layer is formed on the semiconductor layer. A silicon oxide layer is formed from at least a vertical section of the silicon nitride layer by oxygen radical oxidation.
    Type: Application
    Filed: December 20, 2017
    Publication date: June 21, 2018
    Applicant: Infineon Technologies AG
    Inventors: Anton MAUDER, Oliver HELLMUND, Peter IRSIGLER, Jens Peter KONRATH, David LAFORET, Maik LANGNER, Markus NEUBER, Hans-Joachim SCHULZE, Ralf SIEMIENIEC, Knut STAHRENBERG, Olaf STORBECK
  • Publication number: 20180166543
    Abstract: A semiconductor device comprises a semiconductor substrate structure comprising a cell region and an edge termination region surrounding the cell region. Further it comprises a plurality of needle-shaped cell trenches within the cell region reaching from a surface of the semiconductor substrate structure into the substrate structure and an edge termination trench within the edge termination region surrounding the cell region at the surface of the semiconductor substrate structure.
    Type: Application
    Filed: January 11, 2018
    Publication date: June 14, 2018
    Inventors: Oliver Blank, Franz Hirler, Ralf Siemieniec, Li Juin Yip
  • Publication number: 20180158920
    Abstract: A semiconductor device includes a semiconductor body formed from a semiconductor material with a band-gap of at least 2.0 eV, the semiconductor body having a diode region and a source region. The semiconductor device further includes a trench gate structure having a first sidewall and a second sidewall opposite the first sidewall, the first sidewall and the second sidewall extending along a common longitudinal direction. A doping concentration of a first doping type is higher in the diode region than in the source region. The trench gate structure projects from a first surface of the semiconductor body into the semiconductor body. A first portion of the second sidewall at the first surface is directly adjoined by the source region. A second portion of the second sidewall is in direct contact with the diode region. Additional semiconductor device embodiments are provided.
    Type: Application
    Filed: January 10, 2018
    Publication date: June 7, 2018
    Inventors: Ralf Siemieniec, Dethard Peters, Romain Esteve, Wolfgang Bergner, Thomas Aichinger, Daniel Kueck, Roland Rupp, Bernd Zippelius, Karlheinz Feldrapp, Christian Strenger