Patents by Inventor Ralf Siemieniec

Ralf Siemieniec has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210249510
    Abstract: The application relates to a semiconductor transistor device, having a source region, a body region including a channel region extending in a vertical direction, a drain region, a gate region arranged aside the channel region in a lateral direction, and a body contact region made of an electrically conductive material, wherein the body contact region forms a body contact area, the body contact region being in an electrical contact with the body region via the body contact area, and wherein the body contact area is tilted with respect to the vertical direction and the lateral direction.
    Type: Application
    Filed: February 1, 2021
    Publication date: August 12, 2021
    Inventors: Li Juin Yip, Oliver Blank, Heimo Hofer, Michael Hutzler, Ralf Siemieniec
  • Publication number: 20210249534
    Abstract: In an embodiment, a transistor device includes a semiconductor substrate having a main surface, a cell field including a plurality of transistor cells, and an edge termination region laterally surrounding the cell field. The cell field includes a gate trench in the main surface of the semiconductor substrate, a gate dielectric lining the gate trench, a metal gate electrode arranged in the gate trench on the gate dielectric, and an electrically insulating cap arranged on the metal gate electrode and within the gate trench.
    Type: Application
    Filed: February 1, 2021
    Publication date: August 12, 2021
    Inventors: Ingmar Neumann, Michael Hutzler, David Laforet, Roland Moennich, Ralf Siemieniec
  • Publication number: 20210242340
    Abstract: A vertical power semiconductor transistor device includes: a drain region of a first conductivity type; a body region of a second conductivity type; a drift region of the first conductivity type which separates the body region from the drain region; a source region of the first conductivity type separated from the drift region by the body region; a gate trench extending through the source and body regions and into the drift region, the gate trench including a gate electrode; and a field electrode in the gate trench or in a separate trench. The drift region has a generally linearly graded first doping profile which increases from the body region toward a bottom of the trench that includes the field electrode, and a graded second doping profile that increases at a greater rate than the first doping profile from an end of the first doping profile toward the drain region.
    Type: Application
    Filed: February 5, 2020
    Publication date: August 5, 2021
    Inventors: Ralf Siemieniec, David Laforet, Cedric Ouvrard
  • Publication number: 20210234010
    Abstract: A method of producing a semiconductor device includes: forming, in a semiconductor substrate, a drift region of a first conductivity type, a body region of a second conductivity type above the drift region, and a source region of the first conductivity type separated from the drift region by the body region; forming rows of spicular-shaped field plate structures in the semiconductor substrate, the spicular-shaped field plate structures extending through the source region and the body region into the drift region; forming stripe-shaped gate structures in the semiconductor substrate and separating adjacent rows of the spicular-shaped field plate structures; and forming a current spread region of the first conductivity type below the body region in semiconductor mesas between adjacent ones of the spicular-shaped field plate structures and which are devoid of the stripe-shaped gate structures, the current spread region configured to increase channel current distribution in the semiconductor mesas.
    Type: Application
    Filed: April 13, 2021
    Publication date: July 29, 2021
    Inventors: Ralf Siemieniec, Michael Hutzler
  • Patent number: 11043560
    Abstract: A semiconductor component includes gate structures extending into a silicon carbide body from a first surface. A width of the gate structures along a first horizontal direction parallel to the first surface is less than a vertical extent of the gate structures perpendicular to the first surface. Contact structures extend into the silicon carbide body from the first surface. The gate structures and the contact structures alternate along the first horizontal direction. Shielding regions in the silicon carbide body adjoin a bottom of the contact structures and are spaced apart from the gate structures along the first horizontal direction. Corresponding methods for producing the semiconductor component are also described.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: June 22, 2021
    Assignee: Infineon Technologies AG
    Inventors: Ralf Siemieniec, Wolfgang Bergner
  • Publication number: 20210159316
    Abstract: A semiconductor component includes a semiconductor component, including: a merged PiN Schottky (MPS) diode structure in a SiC semiconductor body having a drift zone of a first conductivity type; an injection region of a second conductivity type adjoining a first surface of the SiC semiconductor body; a contact structure at the first surface, the contact structure forming a Schottky contact with the drift zone and electrically contacting the injection region; and a zone of the first conductivity type formed between the injection region and a second surface of the SiC semiconductor body, the second surface being situated opposite the first surface. The zone is at a maximal distance of 1 ?m from the injection region of the second conductivity type.
    Type: Application
    Filed: February 1, 2021
    Publication date: May 27, 2021
    Inventors: Thomas Basler, Hans-Joachim Schulze, Ralf Siemieniec
  • Patent number: 11004945
    Abstract: A semiconductor device includes: a semiconductor substrate having a drift region of a first conductivity type, a body region of a second conductivity type formed above the drift region, and a source region of the first conductivity type separated from the drift region by the body region; rows of spicular-shaped field plate structures formed in the semiconductor substrate, the spicular-shaped field plate structures extending through the source region and the body region into the drift region; stripe-shaped gate structures formed in the semiconductor substrate and separating adjacent rows of the spicular-shaped field plate structures; and a current spread region of the first conductivity type formed below the body region in semiconductor mesas between adjacent ones of the spicular-shaped field plate structures and which are devoid of the stripe-shaped gate structures. The current spread region is configured to increase channel current distribution in the semiconductor mesas.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: May 11, 2021
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Siemieniec, Michael Hutzler
  • Publication number: 20210134960
    Abstract: A silicon carbide device includes a silicon carbide body having a hexagonal crystal lattice with a c-plane and with further main planes. The further main planes include a-planes and m-planes. A mean surface plane of the silicon carbide body is tilted to the c-plane by an off-axis angle. The silicon carbide body includes a columnar portion with column sidewalls. At least three of the column sidewalls are oriented along a respective one of the further main planes. A trench gate structure is in contact with the at least three of the column sidewalls.
    Type: Application
    Filed: October 27, 2020
    Publication date: May 6, 2021
    Inventors: Ralf Siemieniec, Rudolf Elpelt, Anton Mauder
  • Patent number: 10991812
    Abstract: Disclosed is a transistor device. The transistor device includes: in a semiconductor body, a drift region, a body region adjoining the drift region, and a source region separated from the drift region by the body region; a gate electrode dielectrically insulated from the body region by a gate dielectric; a source electrode electrically connected to the source region; at least one field electrode dielectrically insulated from the drift region by a field electrode dielectric; and a rectifier element coupled between the source electrode and the field electrode. The field electrode and the field electrode dielectric are arranged in a first trench that extends from a first surface of the semiconductor body into the semiconductor body. The rectifier element is integrated in the first trench in a rectifier region that is adjacent at least one of the source region and the body region.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: April 27, 2021
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Siemieniec, Robert Haase, Gerhard Noebauer, Martin Poelzl
  • Publication number: 20210119006
    Abstract: In an example, a transistor device is provided. The transistor device includes a plurality of transistor cells each including a gate electrode and each at least partially integrated in a semiconductor body that includes a wide bandgap semiconductor material. The transistor device includes a gate pad arranged on top of the semiconductor body, and a plurality of gate runners each arranged on top of the semiconductor body and each connected to gate electrodes of at least some of the plurality of transistor cells. Each gate runner of the plurality of gate runners has a longitudinal direction, and at least one of the gate runners includes at least a section in which a resistivity per area increases in the longitudinal direction as a distance to the gate pad along the gate runner increases.
    Type: Application
    Filed: October 16, 2020
    Publication date: April 22, 2021
    Inventors: Thomas AICHINGER, Wolfgang BERGNER, Ralf SIEMIENIEC, Frank WOLTER
  • Publication number: 20210118986
    Abstract: A semiconductor device includes gate trenches formed in a SiC substrate and extending lengthwise in parallel in a first direction. A trench interval which defines a space between adjacent gate trenches extends in a second direction perpendicular to the first direction. Source regions of a first conductivity type formed in the SiC substrate occupy a first part of the space between adjacent gate trenches. Body regions of a second conductivity type opposite the first conductivity type formed in the SiC substrate and below the source regions occupy a second part of the space between adjacent gate trenches. Body contact regions of the second conductivity type formed in the SiC substrate occupy a third part of the space between adjacent gate trenches. Shielding regions of the second conductivity type formed deeper in the SiC substrate than the body regions adjoin a bottom of at least some of the gate trenches.
    Type: Application
    Filed: December 4, 2020
    Publication date: April 22, 2021
    Inventors: Thomas Aichinger, Wolfgang Bergner, Paul Ellinghaus, Rudolf Elpelt, Romain Esteve, Florian Grasse, Caspar Leendertz, Shiqin Niu, Dethard Peters, Ralf Siemieniec, Bernd Zippelius
  • Patent number: 10950696
    Abstract: A semiconductor component includes a field effect transistor structure in a SiC semiconductor body having a gate structure at a first surface of the SiC semiconductor body and a drift zone of a first conductivity type. A zone of the first conductivity type is formed in a vertical direction between a semiconductor region of a second conductivity type and the drift zone. The zone is spaced apart from the gate structure and is at a maximal distance of 1 ?m from the semiconductor region in the vertical direction.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: March 16, 2021
    Assignee: Infineon Technologies AG
    Inventors: Thomas Basler, Hans-Joachim Schulze, Ralf Siemieniec
  • Publication number: 20210066459
    Abstract: A semiconductor device includes a semiconductor substrate, a transistor cell region formed in the semiconductor substrate and an inner termination region formed in the semiconductor substrate and devoid of transistor cells. The transistor cell region includes a gate structure extending from a first surface into the semiconductor substrate, a plurality of needle-shaped first field plate structures extending from the first surface into the semiconductor substrate, body regions of a second conductivity type, and source regions of a first conductivity type formed between the body regions and the first surface. The inner termination region surrounds the transistor cell region and includes needle-shaped second field plate structures extending from the first surface into the semiconductor substrate. The needle-shaped first field plate structures are arranged in a first pattern and the needle-shaped second field plate structures are arranged in a second pattern.
    Type: Application
    Filed: November 16, 2020
    Publication date: March 4, 2021
    Inventors: Ralf Siemieniec, Oliver Blank, Franz Hirler, Michael Hutzler, David Laforet, Cédric Ouvrard, Li Juin Yip
  • Patent number: 10937784
    Abstract: A method for forming a semiconductor device includes: forming, in a silicon carbide layer of a first conductivity type having a first side, a first silicon carbide region and a second silicon carbide region that forms a pn-junction with the first silicon carbide region; forming a contact region that forms an Ohmic contact with the second silicon carbide region; forming a barrier-layer on the contact region and the first silicon carbide region so that a Schottky-junction is formed between the barrier-layer and the first silicon carbide region and so that an Ohmic connection is formed between the barrier-layer and the contact region, the barrier-layer comprising molybdenum nitride; and forming a first metallization on the barrier-layer, and in Ohmic connection with the barrier-layer.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: March 2, 2021
    Assignee: Infineon Technologies AG
    Inventors: Ralf Siemieniec, Mihai Draghici, Jens Peter Konrath
  • Publication number: 20210020740
    Abstract: A semiconductor device is proposed. A trench gate structure extends from a first surface into a silicon carbide semiconductor body along a vertical direction. A trench contact structure extends from the first surface into the silicon carbide semiconductor body along the vertical direction. A source region of a first conductivity type and a body region of a second conductivity type adjoin a first sidewall of the trench gate structure. A diode region of the second conductivity type adjoins a second sidewall of the trench gate structure opposite to the first sidewall. A shielding region of the second conductivity type adjoins a bottom of the trench contact structure, the shielding region being arranged at a lateral distance to the trench gate structure.
    Type: Application
    Filed: July 15, 2020
    Publication date: January 21, 2021
    Inventors: Ralf Siemieniec, Wolfgang Bergner
  • Patent number: 10896952
    Abstract: A semiconductor device includes gate trenches formed in a SiC substrate and extending lengthwise in parallel in a first direction. A trench interval which defines a space between adjacent gate trenches extends in a second direction perpendicular to the first direction. Source regions of a first conductivity type formed in the SiC substrate occupy a first part of the space between adjacent gate trenches. Body regions of a second conductivity type opposite the first conductivity type formed in the SiC substrate and below the source regions occupy a second part of the space between adjacent gate trenches. Body contact regions of the second conductivity type formed in the SiC substrate occupy a third part of the space between adjacent gate trenches. Shielding regions of the second conductivity type formed deeper in the SiC substrate than the body regions adjoin a bottom of at least some of the gate trenches.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: January 19, 2021
    Assignee: Infineon Technologies AG
    Inventors: Thomas Aichinger, Wolfgang Bergner, Paul Ellinghaus, Rudolf Elpelt, Romain Esteve, Florian Grasse, Caspar Leendertz, Shiqin Niu, Dethard Peters, Ralf Siemieniec, Bernd Zippelius
  • Patent number: 10872957
    Abstract: A semiconductor device includes a semiconductor substrate, a transistor cell region formed in the semiconductor substrate and an inner termination region formed in the semiconductor substrate and devoid of transistor cells. The transistor cell region includes a plurality of transistor cells and a gate structure that forms a grid separating transistor sections of the transistor cells from each other, each of the transistor sections including a needle-shaped first field plate structure extending from a first surface into the semiconductor substrate. The inner termination region surrounds the transistor cell region and includes needle-shaped second field plate structures extending from the first surface into the semiconductor substrate. The first field plate structures form a first portion of a regular pattern and the second field plate structures form a second portion of the same regular pattern.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: December 22, 2020
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Siemieniec, Oliver Blank, Franz Hirler, Michael Hutzler, David Laforet, Cedric Ouvrard, Li Juin Yip
  • Patent number: 10868173
    Abstract: A semiconductor device includes a semiconductor substrate having drift and body regions. The drift region includes upper and lower drift regions. An active area includes a plurality of spicular trenches extending through the body region and into the drift region. Each spicular trench in the active area has a lower end which together define a lower end of the upper drift region extending towards a first side and a lower drift region extending from the lower end of the upper drift region towards a second side. The edge termination area includes spicular termination trenches extending at least into the upper drift region. A surface doping region arranged in the upper drift region in the edge termination area extends to the first side, is spaced apart from the lower end of the upper drift region, and has a net doping concentration lower than that of the upper drift region.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: December 15, 2020
    Assignee: Infineon Technologies Austria AG
    Inventors: Cedric Ouvrard, Adam Amali, Oliver Blank, Michael Hutzler, David Laforet, Harsh Naik, Ralf Siemieniec, Li Juin Yip
  • Publication number: 20200373396
    Abstract: A semiconductor device includes: a semiconductor substrate having a drift region of a first conductivity type, a body region of a second conductivity type formed above the drift region, and a source region of the first conductivity type separated from the drift region by the body region; rows of spicular-shaped field plate structures formed in the semiconductor substrate, the spicular-shaped field plate structures extending through the source region and the body region into the drift region; stripe-shaped gate structures formed in the semiconductor substrate and separating adjacent rows of the spicular-shaped field plate structures; and a current spread region of the first conductivity type formed below the body region in semiconductor mesas between adjacent ones of the spicular-shaped field plate structures and which are devoid of the stripe-shaped gate structures. The current spread region is configured to increase channel current distribution in the semiconductor mesas.
    Type: Application
    Filed: May 21, 2019
    Publication date: November 26, 2020
    Inventors: Ralf Siemieniec, Michael Hutzler
  • Publication number: 20200365724
    Abstract: A semiconductor device includes a semiconductor body having first and second opposing surfaces, an active area including active transistor cells, and an edge termination region laterally surrounding the active area. Each active transistor cell includes a mesa and a columnar trench having a field plate. The edge termination region includes inactive cells each including a columnar termination trench having a field plate, and a termination mesa including a drift region of a first conductivity type. The edge termination region includes a transition region laterally surrounding the active region and an outer termination region laterally surrounding the transition region. In the transition region, the termination mesa includes a body region of a second conductivity type arranged on the drift region. In the outer termination region, the drift region extends to the first surface. A buried doped region of the edge termination region is positioned in the transition and outer termination regions.
    Type: Application
    Filed: May 13, 2020
    Publication date: November 19, 2020
    Inventors: Ralf Siemieniec, Adam Amali, Michael Hutzler, Laszlo Juhasz, David Laforet, Cedric Ouvrard, Li Juin Yip