Abstract: A semiconductor device includes gate trenches formed in a SiC substrate and extending lengthwise in parallel in a first direction. A trench interval which defines a space between adjacent gate trenches extends in a second direction perpendicular to the first direction. Source regions of a first conductivity type formed in the SiC substrate occupy a first part of the space between adjacent gate trenches. Body regions of a second conductivity type opposite the first conductivity type formed in the SiC substrate and below the source regions occupy a second part of the space between adjacent gate trenches. Body contact regions of the second conductivity type formed in the SiC substrate occupy a third part of the space between adjacent gate trenches. Shielding regions of the second conductivity type formed deeper in the SiC substrate than the body regions adjoin a bottom of at least some of the gate trenches.

Abstract: A semiconductor body having a drift region layer, a body region layer adjoining the drift region layer, and a source region layer adjoining the body region layer and forming a first surface of the semiconductor body is provided. At least two trenches extend from the first surface of the semiconductor body through the source region layer and the body region layer. In each of the trenches a gate electrode and a gate dielectric are formed. Diode regions are directly adjacent to each of the at least two trenches. The diode regions extend from the first surface of the semiconductor body through the source region layer and the body region layer. The diode regions include a first region and a second region. A doping concentration in the diode regions varies such that a doping concentration is higher near the first surface than at the bottom of the trench.

Abstract: A silicon carbide device includes a silicon carbide substrate having a body region and a source region of a transistor cell. Further, the silicon carbide device includes a titanium carbide gate electrode of the transistor cell.

Abstract: A semiconductor device includes a semiconductor substrate, a transistor cell region formed in the semiconductor substrate and an inner termination region formed in the semiconductor substrate and devoid of transistor cells. The transistor cell region includes a plurality of transistor cells and a gate structure that forms a grid separating transistor sections of the transistor cells from each other, each of the transistor sections including a needle-shaped first field plate structure extending from a first surface into the semiconductor substrate. The inner termination region surrounds the transistor cell region and includes needle-shaped second field plate structures extending from the first surface into the semiconductor substrate. The first field plate structures form a first portion of a regular pattern and the second field plate structures form a second portion of the same regular pattern.

Abstract: A semiconductor device includes a semiconductor body having a first silicon carbide region and a second silicon carbide region which forms a pn-junction with the first silicon carbide region, a first metallization on a front side of the semiconductor body, a contact region that forms an Ohmic contact with the second silicon carbide region, and a barrier-layer between the first metallization and the contact region and that is in Ohmic connection with the first metallization and the contact region. The barrier-layer forms a Schottky-junction with the first silicon carbide region, and includes molybdenum nitride or tantalum nitride. Additional semiconductor device embodiments and corresponding methods of manufacture are described.

Abstract: According to an embodiment of a semiconductor device, the device includes gate trenches formed in a SiC substrate and extending lengthwise in parallel in a first direction. Rows of source regions of a first conductivity type are formed in the SiC substrate and extend lengthwise in parallel in a second direction which is transverse to the first direction. Rows of body regions of a second conductivity type opposite the first conductivity type are formed in the SiC substrate below the rows of source regions. Rows of body contact regions of the second conductivity type are formed in the SiC substrate. The rows of body contact regions extend lengthwise in parallel in the second direction. First shielding regions of the second conductivity type are formed deeper in the SiC substrate than the rows of body regions.

Abstract: A body structure and a drift zone are formed in a semiconductor layer, wherein the body structure and the drift zone form a first pn junction. A silicon nitride layer is formed on the semiconductor layer. A silicon oxide layer is formed from at least a vertical section of the silicon nitride layer by oxygen radical oxidation.

Abstract: A semiconductor device includes a SiC body having a first surface, a gate trench extending from the first surface into the SiC body and having a first sidewall, a second sidewall opposite the first sidewall, and a bottom, a source region of a first conductivity type formed in the SiC body and adjoining the first sidewall of the gate trench, a drift region of the first conductivity type formed in the SiC body below the source region, a body region of a second conductivity type formed in the SiC body between the source region and the drift region and adjoining the first sidewall of the gate trench, and a diode region of the second conductivity type formed in the SiC body and adjoining the second sidewall and the bottom of the gate trench but not the first sidewall of the gate trench.

Abstract: A semiconductor device includes a trench extending from a first surface into a SiC semiconductor body. The trench has a first sidewall, a second sidewall opposite to the first sidewall, and a trench bottom. A gate electrode is arranged in the trench and is electrically insulated from the SiC semiconductor body by a trench dielectric. A body region of a first conductivity type adjoins the first sidewall. A shielding structure of the first conductivity type adjoins at least a portion of the second sidewall and the trench bottom. A first section of the trench bottom and a second section of the trench bottom are offset to one another by a vertical offset along a vertical direction extending from the first surface to a second surface of the SiC semiconductor body opposite to the first surface.

Abstract: A silicon carbide device includes a silicon carbide substrate, a contact layer including nickel, silicon and aluminum, a barrier layer structure including titanium and tungsten, and a metallization layer including copper. The contact layer is located on the silicon carbide substrate. The contact layer is located between the silicon carbide substrate and at least a part of the barrier layer structure. The barrier layer structure is located between the silicon carbide substrate and the metallization layer.

Abstract: A semiconductor device includes a silicon carbide body including a transistor cell region and an idle region. The transistor cell region includes transistor cells. The idle region is devoid of transistor cells. The idle region includes a transition region between the transistor cell region and a side surface of the silicon carbide body, a gate pad region, and a diode structure comprising at least one of a merged pin Schottky diode structure or a merged pin heterojunction diode structure in at least one of the transition region or the gate pad region.

Abstract: A semiconductor device includes transistor cells in a semiconductor portion, wherein the transistor cells are electrically connected to a gate metallization, a source electrode and a drain electrode. In one example, the semiconductor device further includes a doped region in the semiconductor portion. The doped region is electrically connected to the source electrode. A resistance of the doped region has a negative temperature coefficient. An interlayer dielectric separates the gate metallization from the doped region. A drain structure in the semiconductor portion electrically connects the transistor cells with the drain electrode and forms a pn junction with the doped region.

Abstract: A semiconductor device includes a semiconductor substrate, a transistor cell region formed in the semiconductor substrate and an inner termination region formed in the semiconductor substrate and devoid of transistor cells. The transistor cell region includes a plurality of transistor cells and a gate structure that forms a grid separating transistor sections of the transistor cells from each other, each of the transistor sections including a needle-shaped first field plate structure extending from a first surface into the semiconductor substrate. The inner termination region surrounds the transistor cell region and includes needle-shaped second field plate structures extending from the first surface into the semiconductor substrate. The first field plate structures form a first portion of a regular pattern and the second field plate structures form a second portion of the same regular pattern.

Abstract: A semiconductor device includes a gate electrode and a gate dielectric. The gate electrode extends from a first surface of a silicon carbide body into the silicon carbide body. The gate dielectric is between the gate electrode and the silicon carbide body. The gate electrode includes a metal structure and a semiconductor layer between the metal structure and the gate dielectric.

Abstract: A semiconductor component has a gate structure that extends from a first surface into an SiC semiconductor body. A body area in the SiC semiconductor body adjoins a first side wall of the gate structure. A first shielding area and a second shielding area of the conductivity type of the body area have at least twice as high a level of doping as the body area. A diode area forms a Schottky contact with a load electrode between the first shielding area and the second shielding area.

Abstract: A semiconductor device comprises a semiconductor substrate structure comprising a cell region and an edge termination region surrounding the cell region. Further it comprises a plurality of needle-shaped cell trenches within the cell region reaching from a surface of the semiconductor substrate structure into the substrate structure and an edge termination trench within the edge termination region surrounding the cell region at the surface of the semiconductor substrate structure.

Abstract: A method of manufacturing a power metal oxide semiconductor field effect transistor includes: forming a field electrode in a field plate trench in a main surface of a semiconductor substrate; forming a gate trench in the main surface, the gate trench extending in a first direction parallel to the main surface; and for a gate electrode in the gate trench, the gate electrode being made of a gate electrode material that comprises a metal. The field plate trench is formed to have an extension length in the first direction which is less than double of an extension length of the field plate trench in a second direction, the second direction being perpendicular to the first direction.

Abstract: A semiconductor component includes a field effect transistor structure in a SiC semiconductor body having a gate structure at a first surface of the SiC semiconductor body and a drift zone of a first conductivity type. A zone of the first conductivity type is formed in a vertical direction between a semiconductor region of a second conductivity type and the drift zone. The zone is spaced apart from the gate structure and is at a maximal distance of 1 ?m from the semiconductor region in the vertical direction.

Abstract: A semiconductor device includes a plurality of gate trenches formed in a first surface of a semiconductor body and extending lengthwise parallel to one another, transistor cells and diode regions formed in a mesa of the semiconductor body between neighboring ones of the gate trenches, and a drift region in the semiconductor body beneath the gate trenches. Each transistor cell includes a source zone and a body region. Each diode region includes a contact portion and a lower doped shielding portion. The source zone forms a first p-n junction with the body region, and the body region forms a second p-n junction with the drift region. The contact region extends to the first surface, and the shielding portion forms a third p-n junction with the drift region. The shielding portion extends under bottoms of the neighboring ones of the gate trenches.

Abstract: A first semiconductor body including type IV semiconductor material is provided. A second semiconductor body including type III-V semiconductor material is provided. A first adhesion layer is formed on the first semiconductor body. A second adhesion layer is formed on the second semiconductor body. The first and the second semiconductor bodies are bonded together by adhering the first and the second adhesion layers to one another.