Patents by Inventor Shu Lin

Shu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200099394
    Abstract: A low-density parity-check code scaling method is disclosed. The method includes following steps: obtaining the original low-density parity-check matrix; forming the permutation matrices with the random row shift or the random column shift to the identity matrix; replacing the component codes by the permutation matrices and the all-zero matrix to form the extended low-density parity-check matrix; adjusting the code length and the code rate to form the global coupled low-density parity-check matrix; and outputting the global coupled low-density parity-check code.
    Type: Application
    Filed: September 24, 2018
    Publication date: March 26, 2020
    Inventors: HSIE-CHIA CHANG, YEN-CHIN LIAO, SHU LIN
  • Publication number: 20200098712
    Abstract: A semiconductor device includes a conductive pad having a first width. The semiconductor device includes a passivation layer over the conductive pad, wherein the passivation layer directly contacts the conductive pad. The semiconductor device includes a protective layer over the passivation layer, wherein the protective layer directly contacts the conductive pad. The semiconductor device includes an under-bump metallization (UBM) layer directly contacting the conductive pad, wherein the UBM layer has a second width greater than the first width. The semiconductor device includes a conductive pillar on the UBM layer.
    Type: Application
    Filed: November 18, 2019
    Publication date: March 26, 2020
    Inventors: Chita CHUANG, Yao-Chun CHUANG, Tsung-Shu LIN, Chen-Cheng KUO, Chen-Shien CHEN
  • Publication number: 20200075418
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a shallow trench isolation (STI) around the first fin-shaped structure and the second fin-shaped structure; forming a mask layer on the first fin-shaped structure; and performing a first anneal process so that the first fin-shaped structure and the second fin-shaped structure comprise different radius of curvature.
    Type: Application
    Filed: November 6, 2019
    Publication date: March 5, 2020
    Inventors: Chun-Jen Chen, Tien-I Wu, Yu-Shu Lin
  • Publication number: 20200067834
    Abstract: Stateful inspection and classification of packets is disclosed. For a first packet associated with a network traffic flow, a differentiated services header value (DSHV) is determined to associate with the first packet. The DSHV is used to perform a lookup of a quality of service treatment associated with the DSHV. The treatment is applied to the first packet. A determination is made, for a second packet associated with the network traffic flow, to associate a second DSHV with the second, where the second DSHV is different from the first DSHV.
    Type: Application
    Filed: November 4, 2019
    Publication date: February 27, 2020
    Inventors: Philip Kwan, Shu Lin
  • Publication number: 20200059030
    Abstract: An automotive electrical plug connector and an automotive electrical receptacle connector mating with the automotive electrical plug connector are provided. The automotive electrical plug connector includes an insulated housing electrical plug connector includes an insulated housing, plug terminals, terminal fixing plates, and a positioning member. Upper and lower surfaces of the insulated housing has buckling grooves for positioning the terminal fixing plates, so that the front ends of the terminal fixing plates are abutted against the plug terminals, and the plug terminals can be prevented from detaching off terminal grooves of the insulated housing. Moreover, when the positioning member is assembled in an engaging groove at the side surface of the insulated housing, the positioning member is moved from a movable position to a locked position, and the automotive electrical plug connector and the automotive electrical receptacle connector can be locked with each other.
    Type: Application
    Filed: August 16, 2019
    Publication date: February 20, 2020
    Inventors: Shu-Lin Duan, Wei Wan, Hua-Yan Wu
  • Publication number: 20200051936
    Abstract: A device and method of manufacture is provided that utilize a dummy pad feature adjacent contact pads. The contact pads may be contact pads in an integrated fan-out package in which a molding compound is placed along sidewalls of a die and the contact pads extend over the die and the molding compound. The contact pads are electrically coupled to the die using one or more redistribution layers. The dummy pad features are electrically isolated from the contact pads. In some embodiments, the dummy pad features partially encircle the contact pads and are located in a corner region of the molding compound, a corner region of the die, and/or an interface region between an edge of the die and the molding compound.
    Type: Application
    Filed: October 15, 2019
    Publication date: February 13, 2020
    Inventors: Chang-Chia Huang, Tsung-Shu Lin, Cheng-Chieh Hsieh, Wei-Cheng Wu
  • Publication number: 20200047393
    Abstract: A blow molding machine suitable for manufacturing the bottle having the handle and a method for using the same, wherein each of the preform holders has a local temperature regulating device, the local temperature regulating devices are disposed around the handle portion, the rotary joint supplies liquid or gas continuously to the local temperature regulating devices of the preform holders to perform continuous temperature regulation for the handle portion, thereby overcoming the problem that the temperature needs to be immediately cooled after the injection molding, and temperature of the body portion can be maintained, so as to achieve the purpose of reducing energy consumption.
    Type: Application
    Filed: August 12, 2018
    Publication date: February 13, 2020
    Inventors: WEN-YUNG YANG, SHU-LIN HSIEH, HUAI-RONG PAN, ZHI-ZHONG LUO, PO-CHENG LAI
  • Publication number: 20200051888
    Abstract: In an embodiment, a device includes: a die stack over and electrically connected to an interposer, the die stack including a topmost integrated circuit die including: a substrate having a front side and a back side opposite the front side, the front side of the substrate including an active surface; a dummy through substrate via (TSV) extending from the back side of the substrate at least partially into the substrate, the dummy TSV electrically isolated from the active surface; a thermal interface material over the topmost integrated circuit die; and a dummy connector in the thermal interface material, the thermal interface material surrounding the dummy connector, the dummy connector electrically isolated from the active surface of the topmost integrated circuit die.
    Type: Application
    Filed: October 7, 2019
    Publication date: February 13, 2020
    Inventors: Tsung-Shu Lin, Wensen Hung, Hung-Chi Li, Tsung-Yu Chen
  • Patent number: 10531303
    Abstract: Systems, methods, and software can be used to share content. In some aspect, an electronic device selects a base station to camp on. A first message is sent from the electronic device to the base station. The first message is addressed to a server and requests the server to send a second message to the electronic device. Whether the electronic device receives the second message from the base station within a threshold time period after the first message is sent is determined. The electronic device determines that the base station has a security risk based at least in part on whether the second message is received within the threshold time period.
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: January 7, 2020
    Assignee: BlackBerry Limited
    Inventors: Michael Eoin Buckley, Shu-Lin Chen
  • Patent number: 10523239
    Abstract: A method for generating encoded data includes: generating at least one local LDPC matrix and a global LDPC matrix, the global LDPC matrix relating to each of the at least one local LDPC matrix; repeatedly selecting one of the at least one local LDPC matrix as a target local LDPC matrix until a number t of the target local LDPC matrices are selected, where t is a user-defined number that is greater than one; generating a block matrix that includes the target local LDPC matrices; generating a primary LDPC matrix that includes a first primary matrix part relating to the block matrix, and a second primary matrix part relating to the global LDPC matrix; and encoding data based on the primary LDPC matrix.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: December 31, 2019
    Assignee: National Chiao Tung University
    Inventors: Hsie-Chia Chang, Shu Lin, Yen-Chin Liao
  • Publication number: 20190393195
    Abstract: An under bump metallurgy (UBM) and redistribution layer (RDL) routing structure includes an RDL formed over a die. The RDL comprises a first conductive portion and a second conductive portion. The first conductive portion and the second conductive portion are at a same level in the RDL. The first conductive portion of the RDL is separated from the second conductive portion of the RDL by insulating material of the RDL. A UBM layer is formed over the RDL. The UBM layer includes a conductive UBM trace and a conductive UBM pad. The UBM trace electrically couples the first conductive portion of the RDL to the second conductive portion of the RDL. The UBM pad is electrically coupled to the second conductive portion of the RDL. A conductive connector is formed over and electrically coupled to the UBM pad.
    Type: Application
    Filed: September 6, 2019
    Publication date: December 26, 2019
    Inventors: Meng-Tsan Lee, Wei-Cheng Wu, Tsung-Shu Lin
  • Patent number: 10516609
    Abstract: Stateful inspection and classification of packets is disclosed. For a first packet associated with a network traffic flow, a differentiated services header value (DSHV) is determined to associate with the first packet. The DSHV is used to perform a lookup of a quality of service treatment associated with the DSHV. The treatment is applied to the first packet. A determination is made, for a second packet associated with the network traffic flow, to associate a second DSHV with the second, where the second DSHV is different from the first DSHV.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: December 24, 2019
    Assignee: Palo Alto Networks, Inc.
    Inventors: Philip Kwan, Shu Lin
  • Patent number: 10515867
    Abstract: The present disclosure provides a semiconductor structure including a substrate, a first die over the substrate, a second die over the first die, a heat spreader having a sidewall facing toward and proximal to a sidewall of the first die, and a thermal interface material (TIM) between the sidewall of the first die and the sidewall of the heat spreader. A thermal conductivity of the heat spreader is higher than a thermal conductivity of the TIM.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: December 24, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chi-Hsi Wu, Wensen Hung, Tsung-Shu Lin, Shih-Chang Ku, Tsung-Yu Chen, Hung-Chi Li
  • Publication number: 20190385929
    Abstract: A semiconductor device includes a vapor chamber lid for high power applications such as chip-on-wafer-on-substrate (CoWoS) applications using high performance processors (e.g., graphics processing unit (GPU)) and methods of manufacturing the same. The vapor chamber lid provides a thermal solution which enhances the thermal performance of a package with multiple chips. The vapor chamber lid improves hot spot dissipation in high performance chips, for example, at the three-dimensional (3D-IC) packaging level.
    Type: Application
    Filed: March 1, 2019
    Publication date: December 19, 2019
    Inventors: Shih-Chang Ku, Hung-Chi Li, Tsung-Shu Lin, Tsung-Yu Chen, Wensen Hung
  • Patent number: 10510609
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a shallow trench isolation (STI) around the first fin-shaped structure and the second fin-shaped structure; forming a mask layer on the first fin-shaped structure; and performing a first anneal process so that the first fin-shaped structure and the second fin-shaped structure comprise different radius of curvature.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: December 17, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Jen Chen, Tien-I Wu, Yu-Shu Lin
  • Patent number: 10491904
    Abstract: Video pixel line buffers are widely used for data processing in video codecs. Video data may be packed into buffers configured to store a plurality of words, each word comprising a series of bits. The video data may be associated with two or more channels. In order to reduce realization costs, data blocks from two different channels may be packed from opposite sides of a word in the buffer in opposite directions. In some embodiments, data blocks from two or more physical channels may be mapped to two or more virtual channels, the virtual channels having balanced data block sizes. The data blocks associated with the virtual channels may then be packed to one or more buffers.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: November 26, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Shu Lin, Mang Li, Kai Wang, Atul Garg
  • Patent number: 10483225
    Abstract: A packaging assembly includes a semiconductor device. The semiconductor device includes a conductive pad having a first width, and an under-bump metallization (UBM) layer on the conductive pad, wherein the UBM layer has a second width greater than the first width. The semiconductor device further includes a conductive pillar on the UBM layer, and a cap layer over the conductive pillar, wherein the cap layer exposes sidewalls of the UBM layer. The packaging assembly further includes a substrate. The substrate includes a conductive region, and a mask layer overlying the substrate and exposing a portion of the conductive region. The packaging assembly further includes a joint solder structure between the conductive pillar and the conductive region.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: November 19, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chita Chuang, Yao-Chun Chunag, Tsung-Shu Lin, Chen-Cheng Kuo, Chen-Shien Chen
  • Publication number: 20190348381
    Abstract: Semiconductor devices and methods of forming are provided. A molding compound extends along sidewalls of a first die and a second die. A redistribution layer is formed over the first die, the second die, and the molding compound. The redistribution layer includes a conductor overlying a gap between the first die and the second die. The conductor is routed at a first angle over an edge of the first die. The first angle is measured with respect to a straight line that extends along a shortest between the first die and the second die, and the first angle is greater than 0.
    Type: Application
    Filed: July 29, 2019
    Publication date: November 14, 2019
    Inventors: Hsien-Wei Chen, An-Jhih Su, Tsung-Shu Lin
  • Patent number: 10476195
    Abstract: An electrical receptacle connector includes a plurality of lower terminals, a lower insulator, a shielding plate, a plurality of upper terminals, an upper insulator and an outer insulator. The lower insulator partially covers the lower terminals and exposes a lower contact area of a lower contact segment of each lower terminal. The shielding plate is assembled onto the lower insulator. The upper insulator partially covers the upper terminals, exposes an upper contact area of an upper contact segment of each upper terminal, and is assembled onto the lower insulator. The outer insulator partially covers the above elements, and exposes the lower contact areas and the upper contact areas.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: November 12, 2019
    Assignee: Advanced Connectek Inc.
    Inventors: Shu-Lin Duan, Wei Wan, Fei-Wu Dong
  • Publication number: 20190341360
    Abstract: A package includes a first dielectric layer, a device die over and attached to the first dielectric layer, an active through-via and a dummy through-via, and an encapsulating material encapsulating the device die, the active through-via, and the dummy through-via. The package further includes a second dielectric layer over and contacting the device die, the active through-via, and the dummy through-via. An active metal cap is over and contacting the second dielectric layer and electrically coupling to the active through-via. The active metal cap overlaps the active through-via. A dummy metal cap is over and contacting the second dielectric layer. The dummy metal cap overlaps the dummy through-via. The dummy metal cap is separated into a first portion and a second portion by a gap. A redistribution line passes through the gap between the first portion and the second portion of the dummy metal cap.
    Type: Application
    Filed: July 15, 2019
    Publication date: November 7, 2019
    Inventors: Chen-Hua Yu, Hsien-Wei Chen, Meng-Tsan Lee, Tsung-Shu Lin, Wei-Cheng Wu, Chien-Chia Chiu, Chin-Te Wang