Patents by Inventor Shu Lin

Shu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10756199
    Abstract: An embodiment fin field-effect-transistor (finFET) includes a semiconductor fin comprising a channel region and a gate oxide on a sidewall and a top surface of the channel region. The gate oxide includes a thinnest portion having a first thickness and a thickest portion having a second thickness different than the first thickness. A difference between the first thickness and the second thickness is less than a maximum thickness variation, and the maximum thickness variation is in accordance with an operating voltage of the finFET.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: August 25, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Cheng Chen, Meng-Shu Lin, Liang-Yin Chen, Xiong-Fei Yu, Syun-Ming Jang, Hui-Cheng Chang
  • Patent number: 10756038
    Abstract: A semiconductor package includes a semiconductor die and a connection structure. The semiconductor die is laterally encapsulated by an insulating encapsulant. The connection structure is disposed on the semiconductor die, the connection structure is electrically connected to the semiconductor die, and the connection structure includes at least one first via, first pad structures, second vias, a second pad structure and a conductive terminal. The at least one first via is disposed over and electrically connected to the semiconductor die. The first pad structures are disposed over the at least one first via, wherein the at least one first via contacts at least one of the first pad structures. The second vias are disposed over the first pad structures, wherein the second vias contact the first pad structures.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: August 25, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Yen Chiu, Shou-Yi Wang, Tsung-Shu Lin
  • Publication number: 20200243664
    Abstract: A semiconductor device and a method for fabricating the semiconductor device are provided, in which the method includes the steps of forming a gate structure on a substrate, forming a spacer on a sidewall of the gate structure, forming two recesses adjacent to two sides of the spacer, performing a cleaning process to trim the spacer for forming a void between the spacer and the substrate, and forming two portions of an epitaxial layer in the two recesses. The semiconductor device preferably includes a cap layer on the two portions of the epitaxial layer as the cap layer includes a planar top surface and an inclined sidewall.
    Type: Application
    Filed: March 6, 2019
    Publication date: July 30, 2020
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Publication number: 20200244620
    Abstract: Described herein are systems, methods, and software to enhance failover operations in a cloud computing environment. In one implementation, a method of operating a first service instance in a cloud computing environment includes obtaining a communication from a computing asset, wherein the communication comprises a first destination address. The method further provides replacing the first destination address with a second destination address in the communication, wherein the second destination address comprises a shared address for failover from a second service instance. After replacing the address, the method determines whether the communication is permitted based on the second destination address, and if permitted, processes the communication in accordance with a service executing on the service instance.
    Type: Application
    Filed: April 14, 2020
    Publication date: July 30, 2020
    Inventors: Shu Lin, Patrick Xu, Eswar Rao Sadaram, Hao Long
  • Patent number: 10718497
    Abstract: An electronic product with a light emitting function is provided. The electronic product includes a supporting structure, a light emitting structure and a cavity. The light emitting structure is bonded on the supporting structure. The light emitting structure includes a film, a conductive circuit and a light emitting device. The conductive circuit is formed on the film. The conductive circuit is enclosed between the supporting structure and the film. The light emitting device is disposed on the conductive circuit. The cavity is formed between the supporting structure and the light emitting structure, and the light emitting device is received in the cavity.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: July 21, 2020
    Assignees: LITE-ON ELECTRONICS (GUANZHOU) LIMITED, LITE-ON TECHNOLOGY CORPORATION
    Inventors: Yi-Feng Pu, Tzu-Shu Lin
  • Patent number: 10716219
    Abstract: A manufacturing method of an electronic product is provided. The manufacturing method includes following steps. Firstly, a conductive circuit is formed on a film, wherein the conductive circuit is made of a conductive metal layer, the conductive metal layer is a metal foil and the conductive metal layer is patterned to form the conductive circuit. Then, an electronic element is disposed on the conductive circuit of the film, and the electronic element is electrically connected to the conductive circuit. Then, the film and a supporting structure are combined by an out-mold forming technology or an in-mold forming technology, such that the electronic element is wrapped between the film and the supporting structure.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: July 14, 2020
    Assignees: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, LITE-ON TECHNOLOGY CORPORATION
    Inventors: Yi-Feng Pu, Tzu-Shu Lin, Pei-Hsuan Huang
  • Patent number: 10714426
    Abstract: An embodiment is a structure including a first die having an active surface with a first center point, a molding compound at least laterally encapsulating the first die, and a first redistribution layer (RDL) including metallization patterns extending over the first die and the molding compound. A first portion of the metallization patterns of the first RDL extending over a first portion of a boundary of the first die to the molding compound, the first portion of the metallization patterns not extending parallel to a first line, the first line extending from the first center point of the first die to the first portion of the boundary of the first die.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: July 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Hsien Hsieh, Li-Han Hsu, Wei-Cheng Wu, Hsien-Wei Chen, Der-Chyang Yeh, Chi-Hsi Wu, Chen-Hua Yu, Tsung-Shu Lin
  • Publication number: 20200219786
    Abstract: A packaged semiconductor device and a method and apparatus for forming the same are disclosed. In an embodiment, a method includes bonding a device die to a first surface of a substrate; depositing an adhesive on the first surface of the substrate; depositing a thermal interface material on a surface of the device die opposite the substrate; placing a lid over the device die and the substrate, the lid contacting the adhesive and the thermal interface material; applying a clamping force to the lid and the substrate; and while applying the clamping force, curing the adhesive and the thermal interface material.
    Type: Application
    Filed: April 1, 2019
    Publication date: July 9, 2020
    Inventors: Wensen Hung, Tsung-Yu Chen, Tsung-Shu Lin, Chen-Hsiang Lao, Wen-Hsin Wei, Hsien-Pin Hu
  • Patent number: 10700033
    Abstract: The present disclosure relates a method of forming an integrated chip packaging device. In some embodiments, the method may be performed by forming a conductive trace on a surface of a packaging component. The conductive trace has an angled surface defining an undercut. A molding material is deposited over an entirety of the conductive trace and within the undercut. The molding material is removed from an upper surface of the conductive trace. The molding material has a sloped outermost sidewall after removing the molding material from the upper surface. A solder region is formed on the upper surface of the conductive trace.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: June 30, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chang-Chia Huang, Tsung-Shu Lin, Ming-Da Cheng, Wen-Hsiung Lu, Bor-Rung Su
  • Publication number: 20200203303
    Abstract: A package structure includes a semiconductor die, a redistribution circuit structure, and conductive pads. The redistribution circuit structure is located on and electrically connected to the semiconductor die, the redistribution circuit structure includes a first contact pad having a first width and a second contact pad having a second width. The conductive pads are located on and electrically connected to the redistribution circuit structure through connecting to the first contact pad and the second contact pad, the redistribution circuit structure is located between the conductive pads and the semiconductor die. The first width of the first contact pad is less than a width of the conductive pads, and the second width of the second contact pad is substantially equal to or greater than the width of the conductive pads.
    Type: Application
    Filed: May 13, 2019
    Publication date: June 25, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Shu Lin, Hsuan-Ning Shih
  • Publication number: 20200187038
    Abstract: A telematics controller is programmed to identify a location responsive to detecting a failed data call from a vehicle, and if the location is within a geographic boundary of a failure zone within a cellular tower region and a cause of the failure matches a recorded cause for the failure zone, initiate data throttling until the vehicle moved outside of the geographic boundary.
    Type: Application
    Filed: December 7, 2018
    Publication date: June 11, 2020
    Inventors: Jixin ZHANG, Shu-Lin CHEN
  • Publication number: 20200185304
    Abstract: In an embodiment, a device includes: an integrated circuit die; a redistribution structure over a front-side surface of the integrated circuit die; a socket over the redistribution structure; a mechanical brace over the socket, the mechanical brace having an opening exposing the socket, edge regions of the socket overlapping edge regions of the mechanical brace at the opening; a first standoff screw disposed in the edge regions of the mechanical brace, the first standoff screw physically contacting the socket, the first standoff screw extending a first distance between the socket and the mechanical brace; and a bolt extending through the mechanical brace and the redistribution structure.
    Type: Application
    Filed: April 4, 2019
    Publication date: June 11, 2020
    Inventors: Yuan Sheng Chiu, Chih-Kai Cheng, Tsung-Shu Lin
  • Patent number: 10679953
    Abstract: Semiconductor devices and methods of forming are provided. A molding compound extends along sidewalls of a first die and a second die. A redistribution layer is formed over the first die, the second die, and the molding compound. The redistribution layer includes a conductor overlying a gap between the first die and the second die. The conductor is routed at a first angle over an edge of the first die. The first angle is measured with respect to a straight line that extends along a shortest between the first die and the second die, and the first angle is greater than 0.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: June 9, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsien-Wei Chen, An-Jhih Su, Tsung-Shu Lin
  • Publication number: 20200163317
    Abstract: A special-shaped dip net provided with an external handle comprises a net rack, a dip net rod and a handle, wherein a dip net rod mounting base is arranged at the tail end of the net rack and is provided with a first lock structure; the dip net rod penetrates through the dip net rod mounting base, clamping grooves matched with the first lock structure are separately formed in the front end and the rear end of the dip net rod, and the dip net rod is locked on the dip net rod mounting base through the first lock structure; the handle comprises two connecting parts and a handheld part, the two connecting parts are symmetrically fixed to the left and the right side of the dip net rod mounting base and incline upwards from back to front, and the handheld part has two ends fixed to the connecting parts on the two sides and is higher than the dip net rod. The dip net rod and the handle are cooperatively used for scooping fish, the dip net can be lifted more easily, and the dip net rod is not prone to deformation.
    Type: Application
    Filed: December 27, 2018
    Publication date: May 28, 2020
    Inventors: HONGJIAN XU, SHU LIN, LINRONG HONG, HUIHAI GE
  • Publication number: 20200163318
    Abstract: Disclosed is a foldable dip net provided with a handle and a method for using the same. The foldable dip net comprises a handle, a connector and a net rack, wherein the handle comprises a U-shaped support, a handle lever is arranged at the front end of the U-shaped support, and an arm rest plate is arranged on the tail end of the U-shaped support; the connector comprises a mounting base body fixed to the forefront of the U-shaped support and provided with a lock structure, and a light-emitting unit is arranged in the mounting base body; the tail end of the net rack is hinged to the mounting base body through a rotary pin, and a clamping groove is formed in the side wall of the rotary pin and is matched with the lock structure.
    Type: Application
    Filed: December 27, 2018
    Publication date: May 28, 2020
    Inventors: HONGJIAN XU, SHU LIN, LINRONG HONG, HUIHAI GE
  • Patent number: 10659959
    Abstract: A secure cell broadcast method entails defining a group of mobile devices, reserving a channel for the group, associating cryptographic key material with the group, notifying the mobile devices of the channel for the group, securely providing the key material to the mobile devices of the group, and broadcasting on the channel a secure broadcast message that is encrypted such that the mobile devices of the group receiving on the channel can receive and decrypt the secure broadcast message using the key material.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: May 19, 2020
    Assignee: BlackBerry Limited
    Inventors: John David Netto, Shu-Lin Chen
  • Patent number: 10643997
    Abstract: A semiconductor device includes at least a substrate, fin-shaped structures, a protection layer, epitaxial layers, and a gate electrode. The fin-shaped structures are disposed in a first region and a second region of the substrate. The protection layer conformally covers the surface of the substrate and the sidewalls of fin-shaped structures. The epitaxial layers respectively conformally and directly cover the fin-shaped structures in the first region. The gate electrode covers the fin-shaped structures in the second region, and the protection layer is disposed between the gate electrode and the fin-shaped structures.
    Type: Grant
    Filed: July 17, 2017
    Date of Patent: May 5, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Li-Wei Feng, Tong-Jyun Huang, Shih-Hung Tsai, Jia-Rong Wu, Tien-Chen Chan, Yu-Shu Lin, Jyh-Shyang Jenq
  • Publication number: 20200135610
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor includes a substrate, a block bonded on the substrate, a first die bonded on the block, a second die disposed over the first die, and a heat spreader covering the block and having a surface facing toward and proximal to the block. A thermal conductivity of the heat spreader is higher than a thermal conductivity of the block.
    Type: Application
    Filed: December 23, 2019
    Publication date: April 30, 2020
    Inventors: CHI-HSI WU, WENSEN HUNG, TSUNG-SHU LIN, SHIH-CHANG KU, TSUNG-YU CHEN, HUNG-CHI LI
  • Patent number: D884118
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: May 12, 2020
    Assignee: HANGZHOU FUFAN INDUSTRY CO., LTD.
    Inventors: Hongjian Xu, Shu Lin, Linrong Hong, Huihai Ge
  • Patent number: D884826
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: May 19, 2020
    Assignee: HANGZHOU FUFAN INDUSTRY CO., LTD.
    Inventors: Hongjian Xu, Shu Lin, Linrong Hong, Huihai Ge