Patents by Inventor Shu Lin

Shu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210098391
    Abstract: A semiconductor package includes a semiconductor die, a redistribution structure and connective terminals. The redistribution structure is disposed on the semiconductor die and includes a first metallization tier disposed in between a pair of dielectric layers. The first metallization tier includes routing conductive traces electrically connected to the semiconductor die and a shielding plate electrically insulated from the semiconductor die. The connective terminals include dummy connective terminals and active connective terminals. The dummy connective terminals are disposed on the redistribution structure and are electrically connected to the shielding plate. The active connective terminals are disposed on the redistribution structure and are electrically connected to the routing conductive traces. Vertical projections of the dummy connective terminals fall on the shielding plate.
    Type: Application
    Filed: June 5, 2020
    Publication date: April 1, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Cheng Wu, Chien-Chia Chiu, Cheng-Hsien Hsieh, Li-Han Hsu, Meng-Tsan Lee, Tsung-Shu Lin
  • Publication number: 20210098330
    Abstract: A package structure including a substrate, a semiconductor device, a heat spreader, and an adhesive layer is provided. The semiconductor device is bonded onto the substrate, wherein an angle ? is formed between one sidewall of the semiconductor device and one sidewall of the substrate, 0°<?<90°. The heat spreader is disposed over the substrate, wherein the semiconductor device is disposed between the heat spreader and the substrate. The adhesive layer is surrounding the semiconductor device and attaching the heat spreader onto the substrate, wherein the adhesive layer has a first opening misaligned with one of corners of the semiconductor device closest to the first opening.
    Type: Application
    Filed: March 2, 2020
    Publication date: April 1, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Hui Wang, Der-Chyang Yeh, Shih-Peng Tai, Tsung-Shu Lin, Yi-Chung Huang
  • Publication number: 20210082845
    Abstract: A redistribution layer with a landing pad is formed over a substrate with one or more mesh holes extending through the landing pad. The mesh holes may be arranged in a circular shape, and a passivation layer may be formed over the landing pad and the mesh holes. An opening is formed through the passivation layer and an underbump metallization is formed in contact with an exposed portion of the landing pad and extends over the mesh holes. By utilizing the mesh holes, sidewall delamination and peeling that might otherwise occur may be reduced or eliminated.
    Type: Application
    Filed: November 9, 2020
    Publication date: March 18, 2021
    Inventors: Cheng-Hsien Hsieh, Hsien-Wei Chen, Chen-Hua Yu, Tsung-Shu Lin, Wei-Cheng Wu
  • Publication number: 20210070711
    Abstract: Provided are compounds of Formula (I), or pharmaceutically acceptable salts thereof, pharmaceutical compositions comprising these compounds thereof, and use of these compounds in preparing drugs for inhibiting ROCK.
    Type: Application
    Filed: March 22, 2019
    Publication date: March 11, 2021
    Inventors: Rui TAN, Weipeng ZHANG, Yunling WANG, Xingdong ZHAO, Tao CHENG, Shu LIN, Weibo WANG
  • Patent number: 10943991
    Abstract: A semiconductor device and a method for fabricating the semiconductor device are provided, in which the method includes the steps of forming a gate structure on a substrate, forming a spacer on a sidewall of the gate structure, forming two recesses adjacent to two sides of the spacer, performing a cleaning process to trim the spacer for forming a void between the spacer and the substrate, and forming two portions of an epitaxial layer in the two recesses. The semiconductor device preferably includes a cap layer on the two portions of the epitaxial layer as the cap layer includes a planar top surface and an inclined sidewall.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: March 9, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Patent number: 10930605
    Abstract: A device and method of manufacture is provided that utilize a dummy pad feature adjacent contact pads. The contact pads may be contact pads in an integrated fan-out package in which a molding compound is placed along sidewalls of a die and the contact pads extend over the die and the molding compound. The contact pads are electrically coupled to the die using one or more redistribution layers. The dummy pad features are electrically isolated from the contact pads. In some embodiments, the dummy pad features partially encircle the contact pads and are located in a corner region of the molding compound, a corner region of the die, and/or an interface region between an edge of the die and the molding compound.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: February 23, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chang-Chia Huang, Tsung-Shu Lin, Cheng-Chieh Hsieh, Wei-Cheng Wu
  • Publication number: 20210035953
    Abstract: A method includes attaching a first-level device die to a dummy die, encapsulating the first-level device die in a first encapsulating material, forming through-vias over and electrically coupled to the first-level device die, attaching a second-level device die over the first-level device die, and encapsulating the through-vias and the second-level device die in a second encapsulating material. Redistribution lines are formed over and electrically coupled to the through-vias and the second-level device die. The dummy die, the first-level device die, the first encapsulating material, the second-level device die, and the second encapsulating material form parts of a composite wafer.
    Type: Application
    Filed: October 19, 2020
    Publication date: February 4, 2021
    Inventors: Chen-Hua Yu, An-Jhih Su, Wei-Yu Chen, Ying-Ju Chen, Tsung-Shu Lin, Chin-Chuan Chang, Hsien-Wei Chen, Wei-Cheng Wu, Li-Hsien Huang, Chi-Hsi Wu, Der-Chyang Yeh
  • Patent number: 10911407
    Abstract: Techniques for providing localization at scale for a cloud-based security service are disclosed. In some embodiments, a system/method/computer program product for providing localization at scale for a cloud-based security service includes receiving a connection request at a network gateway of a cloud-based security service; performing a source Network Address Translation (NAT) from a registered set of public IP addresses associated with a tenant; and providing secure access to a Software as a Service (SaaS) using the cloud-based security service.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: February 2, 2021
    Assignee: Palo Alto Networks, Inc.
    Inventors: Thomas Arthur Warburton, Shu Lin, Devendra Raut, Jialiang Li, Hao Long
  • Publication number: 20210024528
    Abstract: Provided are certain TRK inhibitors, pharmaceutical compositions thereof, and methods of use thereof.
    Type: Application
    Filed: March 13, 2019
    Publication date: January 28, 2021
    Inventors: Hongbin LIU, Haohan TAN, Chengxi HE, Xianlong WANG, Qihong LIU, Zhifu LI, Zuwen ZHOU, Yuwei GAO, Lihua JIANG, Li LINGHU, Shu LIN, Xingdong ZHAO, Weibo WANG
  • Patent number: 10904938
    Abstract: A telematics controller is programmed identify a location of the vehicle responsive to failure of a vehicle-originated data call to initiate packet-switched communications, and send, to a service delivery network configured to provide data services to the vehicle, a message specifying that circuit-switched communication but not packet-switched communication is available to the vehicle. A message is received, over a wide-area network from a vehicle, in response to a failed initiation of a packed-switched data connection over the wide-area network, indicating that packet-switched communications are unavailable at a current location of the vehicle. Failure zones are updated to indicate that the current location of the vehicle is a network location supporting circuit-switched communication but not packet-switched communication over the wide-area network.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: January 26, 2021
    Assignee: Ford Global Technologies, LLC
    Inventors: Jeffrey William Wirtanen, Shu-Lin Chen, Jason Zhang
  • Publication number: 20210020574
    Abstract: A structure includes a bridge die. The bridge die includes a semiconductor substrate; and an interconnect structure over the semiconductor substrate. The interconnect structure includes dielectric layers and conductive lines in the dielectric layers, an encapsulant encapsulating the bridge die therein, and a redistribution structure over the bridge die. The redistribution structure includes redistribution lines therein. A first package component and a second package component are bonded to the redistribution lines. The first package component and the second package component are electrically interconnected through the redistribution lines and the bridge die.
    Type: Application
    Filed: November 1, 2019
    Publication date: January 21, 2021
    Inventors: Chen-Hua Yu, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Ming Shih Yeh, Tsung-Shu Lin
  • Patent number: 10886944
    Abstract: A low-density parity-check code scaling method is disclosed. The method includes following steps: obtaining the original low-density parity-check matrix; forming the permutation matrices with the random row shift or the random column shift to the identity matrix; replacing the component codes by the permutation matrices and the all-zero matrix to form the extended low-density parity-check matrix; adjusting the code length and the code rate to form the global coupled low-density parity-check matrix; and outputting the global coupled low-density parity-check code.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: January 5, 2021
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Hsie-Chia Chang, Yen-Chin Liao, Shu Lin
  • Patent number: 10886656
    Abstract: An automotive electrical plug connector and an automotive electrical receptacle connector mating with the automotive electrical plug connector are provided. The automotive electrical plug connector includes an insulated housing electrical plug connector includes an insulated housing, plug terminals, terminal fixing plates, and a positioning member. Upper and lower surfaces of the insulated housing has buckling grooves for positioning the terminal fixing plates, so that the front ends of the terminal fixing plates are abutted against the plug terminals, and the plug terminals can be prevented from detaching off terminal grooves of the insulated housing. Moreover, when the positioning member is assembled in an engaging groove at the side surface of the insulated housing, the positioning member is moved from a movable position to a locked position, and the automotive electrical plug connector and the automotive electrical receptacle connector can be locked with each other.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: January 5, 2021
    Assignee: ADVANCED-CONNECTEK INC.
    Inventors: Shu-Lin Duan, Wei Wan, Hua-Yan Wu
  • Publication number: 20200411440
    Abstract: A package structure and method for forming the same are provided. The package structure includes a first through via structure formed in a substrate and a semiconductor die formed below the first through via structure. The package structure further includes a conductive structure formed in a passivation layer over the substrate. The conductive structure includes a first via portion and a second via portion, the first via portion is directly over the first through via structure, and there is no conductive material directly below and in direct contact with the second via portion.
    Type: Application
    Filed: June 27, 2019
    Publication date: December 31, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Kai CHENG, Tsung-Shu LIN, Tsung-Yu CHEN, Hsien-Pin HU, Wen-Hsin WEI
  • Publication number: 20200404893
    Abstract: A dip net provided with a lockable and foldable handle comprises a handle, a hoop and a hoop mounting base, wherein the hoop mounting base is fixed to the front end of the handle and comprises a base body, a rotary shaft and a lock device; and the rotary shaft and the lock device are both mounted in the base body; connecting pieces are arranged at two ends of the rear side of the hoop and are respectively connected with two ends of the rotary shaft; the rotary shaft is provided with two clamping grooves in a circumferential direction; when the handle is unfolded, the lock device is matched with one clamping groove to realize locking; and when the handle is folded, the lock device is matched with the other clamping groove to realize locking. The dip net of the invention is more convenient to use and capable of saving time and labor.
    Type: Application
    Filed: June 26, 2019
    Publication date: December 31, 2020
    Inventors: HONGJIAN XU, SHU LIN, LINRONG HONG, HUIHAI GE, XIONG LI
  • Patent number: 10879201
    Abstract: A semiconductor package includes a semiconductor die and a connection structure. The semiconductor die is laterally encapsulated by an insulating encapsulant. The connection structure is disposed on the semiconductor die, the connection structure is electrically connected to the semiconductor die, and the connection structure includes at least one first via, first pad structures, second vias, a second pad structure and a conductive terminal. The at least one first via is disposed over and electrically connected to the semiconductor die. The first pad structures are disposed over the at least one first via, wherein the at least one first via contacts at least one of the first pad structures. The second vias are disposed over the first pad structures, wherein the second vias contact the first pad structures.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: December 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Yen Chiu, Shou-Yi Wang, Tsung-Shu Lin
  • Publication number: 20200381382
    Abstract: A semiconductor package includes a semiconductor die and a connection structure. The semiconductor die is laterally encapsulated by an insulating encapsulant. The connection structure is disposed on the semiconductor die, the connection structure is electrically connected to the semiconductor die, and the connection structure includes at least one first via, first pad structures, second vias, a second pad structure and a conductive terminal. The at least one first via is disposed over and electrically connected to the semiconductor die. The first pad structures are disposed over the at least one first via, wherein the at least one first via contacts at least one of the first pad structures. The second vias are disposed over the first pad structures, wherein the second vias contact the first pad structures.
    Type: Application
    Filed: August 20, 2020
    Publication date: December 3, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Yen Chiu, Shou-Yi Wang, Tsung-Shu Lin
  • Publication number: 20200379008
    Abstract: An electrical connection assembly includes a main body and a spring. One end of the main body is configured to be in contact with a device under test. The spring is sleeved around the main body. Two ends of the spring are respectively defined as a first end and a second end. The first end is abutted against a limiting protrusion, and a concealed section of the main body is correspondingly arranged inside of the spring. The spring has a first tightly-coiled section, an elastic section, and a second tightly-coiled section in sequence from the first end to the second end. A pitch of the spring within the elastic section is greater than a pitch of the spring within the first tightly-coiled section, and the pitch of the spring within the elastic section is greater than a pitch of the spring within the second tightly-coiled section.
    Type: Application
    Filed: March 19, 2020
    Publication date: December 3, 2020
    Inventors: SHU-LIN WU, YEN-WEI LIN, WEI-CHU CHEN, BOR-CHEN TSAI
  • Publication number: 20200359611
    Abstract: A dip net provided with lockable hoops capable of being folded leftwards and rightwards comprises a net rod, a hoop mounting base mounted on the net rod, and hoops including a left hoop and a right hoop, wherein mounting plates are arranged on the left side and the right side of the hoop mounting base, and two rotary bases are arranged at the rear end of the left hoop and the rear end of the right hoop and are hinged to the mounting plates through rotary shafts. The left hoop and the right hoop can be folded and are independently connected to the hoop mounting base, so that assembly is convenient; and the size can be reduced for transportation and carrying, so that carrying storage are facilitated.
    Type: Application
    Filed: June 26, 2019
    Publication date: November 19, 2020
    Inventors: HONGJIAN XU, SHU LIN, LINRONG HONG, HUIHAI GE, XIONG LI
  • Patent number: D902342
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: November 17, 2020
    Assignee: HANGZHOU FUFAN INDUSTRY CO., LTD.
    Inventors: Hongjian Xu, Shu Lin, Linrong Hong, Huihai Ge, Xiong Li