Patents by Inventor Tatsuya Kato
Tatsuya Kato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170352672Abstract: A semiconductor memory device according to an embodiment includes first and second semiconductor pillars extending in a first direction and being arranged along a second direction, first and second interconnects extending in a third direction and being provided between the first semiconductor pillar and the second semiconductor pillar, a first electrode provided between the first semiconductor pillar and the first interconnect, a second electrode provided between the second semiconductor pillar and the second interconnect, third and fourth interconnects extending in the second direction, a first contact contacting the first semiconductor pillar and being connected to the third interconnect, and a second contact contacting the second semiconductor pillar and being connected to the fourth interconnect. The third and fourth interconnects each pass through both a region directly above the first semiconductor pillar and a region directly above the second semiconductor pillar.Type: ApplicationFiled: August 25, 2017Publication date: December 7, 2017Applicant: Toshiba Memory CorporationInventors: Wataru SAKAMOTO, Tatsuya KATO, Yuta WATANABE, Katsuyuki SEKINE, Toshiyuki IWAMOTO, Fumitaka ARAI
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Publication number: 20170352671Abstract: A semiconductor memory device according to an embodiment, includes a semiconductor pillar extending in a first direction, a first electrode extending in a second direction crossing the first direction, a second electrode provided between the semiconductor pillar and the first electrode, a first insulating film provided between the first electrode and the second electrode and on two first-direction sides of the first electrode, a second insulating film provided between the second electrode and the first insulating film and on two first-direction sides of the second electrode, a third insulating film provided between the second electrode and the semiconductor pillar, and a conductive film provided inside a region interposed between the first insulating film and the second insulating film.Type: ApplicationFiled: August 23, 2017Publication date: December 7, 2017Applicant: Toshiba Memory CorporationInventors: Tatsuya Kato, Fumitaka Arai, Katsuyuki Sekine, Toshiyuki Iwamoto, Yuta Watanabe, Wataru Sakamoto, Hiroshi Itokawa
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Publication number: 20170345837Abstract: A semiconductor device according to an embodiment includes two semiconductor pillars, a connection member connected between the two semiconductor pillars, and a contact connected to the connection member. There is not a conductive member disposed between the two semiconductor pillars.Type: ApplicationFiled: August 10, 2017Publication date: November 30, 2017Applicant: Toshiba Memory CorporationInventors: Mikiko Mori, Ryota Suzuki, Tatsuya Kato, Wataru Sakamoto, Fumie Kikushima
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Publication number: 20170271527Abstract: A semiconductor memory device includes a substrate, a multi-layered structure including a plurality of insulating layers and a plurality of conductive layers that are alternately formed above the substrate, and a pillar extending through the multi-layered structure. The pillar includes a semiconductor body extending along the pillar, and a charge-storing film around the semiconductor body, the charge-storing film having a first thickness at first portions facing the insulating layers and a second thickness greater than the first thickness at second portions facing the conductive layers.Type: ApplicationFiled: September 29, 2016Publication date: September 21, 2017Inventors: Masaaki HIGUCHI, Masao SHINGU, Tatsuya KATO, Takeshi MURATA, Makoto FUJIWARA, Masaki KONDO, Muneyuki TSUDA, Takashi KURUSU
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Publication number: 20170271348Abstract: A semiconductor memory device includes a semiconductor substrate, a first insulating film provided on the semiconductor substrate, a first conductive film provided on a first region of the first insulating film, a second conductive film provided on a second region of the first insulating film, a first stacked body provided on the first conductive film, a second stacked body provided on the second conductive film, a first semiconductor pillar, and two conductive pillars. In the first stacked body, a second insulating film and an electrode film are stacked alternately. In the second stacked body, a third insulating film and a first film are stacked alternately. The two conductive pillars extend in the first direction through the second stacked body, are separated from the second conductive film, sandwich the second conductive film, and are connected at a bottom ends of the second conductive pillars to the semiconductor substrate.Type: ApplicationFiled: September 16, 2016Publication date: September 21, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Fumitaka ARAI, Tatsuya KATO, Satoshi NAGASHIMA, Katsuyuki SEKINE, Yuta WATANABE, Keisuke KIKUTANI, Atsushi MURAKOSHI
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Publication number: 20170263613Abstract: According to one embodiment, a semiconductor device includes a substrate and a semiconductor layer. The device further includes a first electrode layer that is provided on a side surface of the semiconductor layer with a first insulating film interposed therebetween. The device further includes a charge storage layer provided on a side surface of the first electrode layer with the second insulating film interposed therebetween.Type: ApplicationFiled: September 1, 2016Publication date: September 14, 2017Inventors: Atsushi MURAKOSHI, Yasuhito YOSHIMIZU, Tomofumi INOUE, Tatsuya KATO, Yuta WATANABE, Fumitaka ARAI
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Publication number: 20170263619Abstract: A semiconductor memory device includes a first structural body, a second structural body and interconnections. The first and the second structural bodies are separated in a first direction and extend in a second direction. The interconnections are provided between the first structural body and the second structural body, extend in the second direction, and are separated from each other along a third direction. The first and the second structural bodies each includes an insulating member, a column-shaped body and an insulating film. The insulating member and the column-shaped body are disposed in an alternating manner along the second direction and extend in the third direction. The insulating members of the first and second structural bodies make contact with the interconnections.Type: ApplicationFiled: September 16, 2016Publication date: September 14, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Satoshi NAGASHIMA, Katsumi YAMAMOTO, Kohei SAKAIKE, Tatsuya KATO, Keisuke KlKUTANI, Fumitaka ARAI, Atsushi MURAKOSHI, Shunichi TAKEUCHI, Katsuyuki SEKINE
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Publication number: 20170263615Abstract: A semiconductor memory device according to an embodiment, includes a first semiconductor member, a second semiconductor member, an insulating member, a plurality of electrode films, a first electrode, and a second electrode. The first semiconductor member and the second semiconductor member are separated in a first direction and extending in a second direction. The second direction crosses the first direction. The insulating member is provided between the first semiconductor member and the second semiconductor member. The plurality of electrode films are arranged to be separated from each other along the second direction. Each of the electrode films surrounds the first semiconductor member, the second semiconductor member, and the insulating member when viewed from the second direction. The first electrode is provided between the first semiconductor member and the electrode film. The second electrode is provided between the second semiconductor member and the electrode film.Type: ApplicationFiled: March 3, 2017Publication date: September 14, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Kohei SAKAIKE, Toshiyuki IWAMOTO, Tatsuya KATO, Keisuke KlKUTANI, Fumitaka ARAI, Satoshi NAGASHIMA, Koichi SAKATA, Yuta WATANABE
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Patent number: 9761600Abstract: A semiconductor device according to an embodiment includes two semiconductor pillars, a connection member connected between the two semiconductor pillars, and a contact connected to the connection member. There is not a conductive member disposed between the two semiconductor pillars.Type: GrantFiled: September 19, 2016Date of Patent: September 12, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Mikiko Mori, Ryota Suzuki, Tatsuya Kato, Wataru Sakamoto, Fumie Kikushima
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Publication number: 20170254655Abstract: Route search systems, methods, and programs search for a recommended route for transfer with switching between a plurality of transportation modes. The systems, methods, and programs acquire link information for specifying a link for transfer by each of the plurality of transportation modes and connection information related to connection between links for transfer by different transportation modes, and set a condition for switching from a first transportation mode to a second transportation mode, which is different from the first transportation mode, on the basis of a combination of the first transportation mode and the second transportation mode. The systems, methods, and programs search for the recommended route for transfer with switching between the plurality of transportation modes on the basis of the link information, the connection information, and the set condition, the recommended route connecting links for transfer by different transportation modes.Type: ApplicationFiled: August 31, 2015Publication date: September 7, 2017Applicants: AISIN AW CO., LTD., TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Tatsuya KATO, Daisuke TANIZAKI, Toyoji HIYOKAWA, Motohiro NAKAMURA, Kazunori WATANABE, Hiroyuki TASHIRO, Tomoko ARITA
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Publication number: 20170243945Abstract: In a semiconductor memory device, first insulating films are arranged along a first direction and a second direction and extend in a third direction. Interconnect is disposed between the first insulating films in the first direction and extends in the third direction. Electrodes are disposed between the first insulating films in the first direction on a second direction side of the interconnect, and is arranged along the third direction. Second insulating film is disposed between the interconnect and the electrodes. Semiconductor members are arranged along the third direction between the first insulating films in the second direction and extend in the first direction. The electrode is disposed between the interconnect and the semiconductor members. Third insulating film is disposed between the electrodes and the semiconductor member and is thicker than the second insulating film.Type: ApplicationFiled: September 13, 2016Publication date: August 24, 2017Applicant: KABUSHIKI KAISHA TOSHIBAInventors: KATSUYUKI SEKINE, TATSUYA KATO, FUMITAKA ARAI, TOSHIYUKI IWAMOTO, YUTA WATANABE, ATSUSHI MURAKOSHI
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Patent number: 9735167Abstract: A semiconductor memory device according to one embodiment, includes a plurality of first interconnects extending in a first direction and arrayed along a second direction crossing the first direction, a plurality of semiconductor pillars arrayed in a row along the first direction in each of spaces among the first interconnects and extending in a third direction crossing the first direction and the second direction, a first electrode disposed between one of the semiconductor pillars and one of the first interconnects, a first insulating film disposed between the first electrode and one of the first interconnects, a first insulating member disposed between the semiconductor pillars in the first direction and extending in the third direction and opposed the first interconnects not via the first insulating film.Type: GrantFiled: August 31, 2015Date of Patent: August 15, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Tatsuya Kato, Fumitaka Arai, Satoshi Nagashima, Katsuyuki Sekine, Yuta Watanabe, Keisuke Kikutani, Atsushi Murakoshi
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Patent number: 9620515Abstract: According to one embodiment, a semiconductor memory device includes a semiconductor pillar extending in a first direction in a first region. The semiconductor memory device also includes a first electrode film provided on a side of the semiconductor pillar and extending in a second direction different from the first direction in the first region and in a second region adjacent to the first region in the second direction. The semiconductor memory device also includes a second electrode film provided between the semiconductor pillar and the first electrode film in the first region. Film thickness in the first direction of the first electrode film in the first region is smaller than film thickness in the first direction of the first electrode film in the second region.Type: GrantFiled: August 6, 2015Date of Patent: April 11, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Satoshi Nagashima, Tatsuya Kato, Keisuke Kikutani
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Publication number: 20170012050Abstract: A semiconductor memory device according to one embodiment, includes a plurality of first interconnects extending in a first direction and arrayed along a second direction crossing the first direction, a plurality of semiconductor pillars arrayed in a row along the first direction in each of spaces among the first interconnects and extending in a third direction crossing the first direction and the second direction, a first electrode disposed between one of the semiconductor pillars and one of the first interconnects, a first insulating film disposed between the first electrode and one of the first interconnects, a first insulating member disposed between the semiconductor pillars in the first direction and extending in the third direction and opposed the first interconnects not via the first insulating film.Type: ApplicationFiled: August 31, 2015Publication date: January 12, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Tatsuya KATO, Fumitaka ARAI, Satoshi NAGASHIMA, Katsuyuki SEKINE, Yuta WATANABE, Keisuke KIKUTANI, Atsushi MURAKOSHI
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Publication number: 20170005107Abstract: A semiconductor device according to an embodiment includes two semiconductor pillars, a connection member connected between the two semiconductor pillars, and a contact connected to the connection member. There is not a conductive member disposed between the two semiconductor pillars.Type: ApplicationFiled: September 19, 2016Publication date: January 5, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Mikiko MORI, Ryota SUZUKI, Tatsuya KATO, Wataru SAKAMOTO, Fumie KIKUSHIMA
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Publication number: 20160336336Abstract: According to one embodiment, a semiconductor memory device includes a semiconductor pillar extending in a first direction in a first region. The semiconductor memory device also includes a first electrode film provided on a side of the semiconductor pillar and extending in a second direction different from the first direction in the first region and in a second region adjacent to the first region in the second direction. The semiconductor memory device also includes a second electrode film provided between the semiconductor pillar and the first electrode film in the first region. Film thickness in the first direction of the first electrode film in the first region is smaller than film thickness in the first direction of the first electrode film in the second region.Type: ApplicationFiled: August 6, 2015Publication date: November 17, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Satoshi NAGASHIMA, Tatsuya KATO, Keisuke KIKUTANI
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Publication number: 20160322373Abstract: A semiconductor memory device includes two first electrode films, a first column and a second insulating film. The two first electrode films extend in a first direction and are separated from each other in a second direction. The first column is provided between the two first electrode films and has a plurality of first members and a plurality of insulating members. Each of the first members and each of the insulating members are arranged alternately in the first direction. One of the plurality of first members has a semiconductor pillar, a second electrode film and a first insulating film provided between the semiconductor pillar and the second electrode film. The semiconductor pillar, the first insulating film and the second electrode film are arranged in the second direction. The second insulating film is provided between the first column and one of the two first electrode films.Type: ApplicationFiled: July 8, 2016Publication date: November 3, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Wataru SAKAMOTO, Ryota Suzuki, Tatsuya Okamoto, Tatsuya Kato, Fumitaka Arai
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Publication number: 20160322375Abstract: A non-volatile memory device includes a substrate having a first area and a second area around the first area, memory cells in the first area. Each memory cell includes a semiconductor body, an electrode layer and a stacked body including a charge storage layer between the semiconductor layer and the electrode layer. The device includes an STI provided between the memory cells and an insulating film provided between the stacked body and the electrode layer. The STI has a top surface at the same height level as a top surface of the stacked body. The device further includes a capacitor element in the second area, which includes a first conductive layer, a dielectric film on the first conductive layer and a second conductive layer on the dielectric film. The dielectric film includes at least one layer that contains the same material as a material included in the insulating film.Type: ApplicationFiled: August 28, 2015Publication date: November 3, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Ryota SUZUKI, Tatsuya Kato
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Publication number: 20160311858Abstract: An object of the present invention is to provide methods of discovering drugs effective for tough targets, which have conventionally been discovered only with difficulty. The present invention relates to novel methods for cyclizing peptide compounds, and novel peptide compounds and libraries comprising the same, to achieve the above object.Type: ApplicationFiled: May 27, 2016Publication date: October 27, 2016Applicant: Chugai Seiyaku Kabushiki KaishaInventors: Shiori Kariyuki, Takeo Iida, Miki Kojima, Ryuichi Takeyama, Mikimasa Tanada, Tetsuo Kojima, Hitoshi Iikura, Atsushi Matsuo, Takuya Shiraishi, Takashi Emura, Kazuhiko Nakano, Koji Takano, Kousuke Asou, Takuya Torizawa, Ryusuke Takano, Nozomi Hisada, Naoaki Murao, Atsushi Ohta, Kaori Kimura, Yusuke Yamagishi, Tatsuya Kato
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Patent number: 9478556Abstract: A semiconductor device according to an embodiment includes two semiconductor pillars, a connection member connected between the two semiconductor pillars, and a contact connected to the connection member. There is not a conductive member disposed between the two semiconductor pillars.Type: GrantFiled: March 11, 2015Date of Patent: October 25, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Mikiko Mori, Ryota Suzuki, Tatsuya Kato, Wataru Sakamoto, Fumie Kikushima