Abstract: A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A method for fabricating the component includes the steps of providing a substrate containing multiple dice, forming trenches on the substrate proximate to peripheral edges of the dice, and depositing a polymer material into the trenches. In addition, the method includes the steps of planarizing the back side of the substrate to contact the polymer filled trenches, and cutting through the polymer trenches to singulate the components from the substrate. Prior to the singulating step the components can be tested and burned-in while they remain on the substrate.

Abstract: A first precursor gas is flowed to the substrate within the chamber effective to form a first monolayer on the substrate. A second precursor gas different in composition from the first precursor gas is flowed to the first monolayer within the chamber under surface microwave plasma conditions within the chamber effective to react with the first monolayer and form a second monolayer on the substrate which is different in composition from the first monolayer. The second monolayer includes components of the first monolayer and the second precursor. In one implementation, the first and second precursor flowings are successively repeated effective to form a mass of material on the substrate of the second monolayer composition. Additional and other implementations are contemplated.

Abstract: A log list comprising log identifiers is received, wherein the log list delineates a set of logs to be groomed. A log sequence number and a time-stamp are extracted from the first log record of each log in the set of logs. A system ID is extracted from a log record of each log in the set of logs. An appended log list is created wherein the system ID, time-stamp and log sequence number comprise appended information that is logically appended to each of respective ones of the log identifiers. The appended log list is sorted utilizing at least a portion of the appended information, the result comprising a sorted appended log list. An actual log sequence number is extracted from the last log record of each log in the set of logs. Each of the actual log sequence numbers is compared to a corresponding predicted log sequence number, wherein the corresponding predicted log sequence number is computed utilizing the sorted appended log list.

Abstract: A semiconductor component includes back side pin contacts fabricated using a circuit side fabrication method. The component also includes a thinned semiconductor die having a pattern of die contacts, and conductive members formed by filled openings in the die contacts and the die. In addition, the pin contacts are formed by terminal portions of the conductive members. The fabrication method includes the steps of forming the openings and the conductive members, and then thinning and etching the die to form the pin contacts. An alternate embodiment female component includes female conductive members configured to physically and electrically engage pin contacts on a mating component of a stacked assembly.

Abstract: A vertical light emitting diode (LED) includes a metal substrate; a p-electrode coupled to the metal substrate; a p-contact coupled to the p-electrode; a p-GaN portion coupled to the p electrode; an active region coupled to the p-GaN portion; an n-GaN portion coupled to the active region; and a phosphor layer coupled to the n-GaN.

Abstract: A semiconductor component includes back side pin contacts fabricated using a circuit side fabrication method. The component also includes a thinned semiconductor die having a pattern of die contacts, and conductive members formed by filled openings in the die contacts and the die. In addition, the pin contacts are formed by terminal portions of the conductive members. The fabrication method includes the steps of forming the openings and the conductive members, and then thinning and etching the die to form the pin contacts. An alternate embodiment female component includes female conductive members configured to physically and electrically engage pin contacts on a mating component of a stacked assembly.

Abstract: Systems and methods for fabricating a light emitting diode include depositing one or more metal layers on a substrate; forming an n-gallium nitride (n-GaN) layer above the metal layer; and depositing a thermoelectric cooler in the metal layer to dissipate heat.

Abstract: Methods are disclosed for forming a vertical semiconductor light emitting diode (VLED) device having an active layer between an n-doped layer and a p-doped layer; and securing a plurality of balls on a surface of the n-doped layer of the VLED device.

Abstract: Systems and methods for fabricating a light emitting diode include forming a multilayer epitaxial structure above a carrier substrate; depositing at least one metal layer above the multilayer epitaxial structure; removing the carrier substrate.

Abstract: Systems and methods for fabricating a light emitting diode include forming a multilayer epitaxial structure above a carrier substrate; depositing at least one metal layer above the multilayer epitaxial structure and forming heat removal fins thereon; removing the carrier substrate.

Abstract: Systems and methods are disclosed for producing vertical LED array on a metal substrate; evaluating said array of LEDs for defects; destroying one or more defective LEDs; forming good LEDs only LED array suitable for wafer level package.

Abstract: A semiconductor component includes back side pin contacts fabricated using a circuit side fabrication method. The component also includes a thinned semiconductor die having a pattern of die contacts, and conductive members formed by filled openings in the die contacts and the die. In addition, the pin contacts are formed by terminal portions of the conductive members. The fabrication method includes the steps of forming the openings and the conductive members, and then thinning and etching the die to form the pin contacts. An alternate embodiment female component includes female conductive members configured to physically and electrically engage pin contacts on a mating component of a stacked assembly.

Abstract: Systems and methods are disclosed for fabricating a semiconductor light emitting diode (LED) device by forming an n-gallium nitride (n-GaN) layer on the LED device; and roughening the surface of the n-GaN layer to extract light from an interior of the LED device.

Abstract: An apparatus, such as a reader, adapter, or other device, is described that is capable of receiving at least four different types of memory cards using a single slot. The slot includes a central region having a width to receive a memory card of a first type, first outer regions that extend the width of the central region to a second width to receive a memory card selected from a second type of memory card or a third type of memory card, and second outer regions that extend the width of the central region to a third width to receive a memory card of a fourth type. A plurality of electrically conductive contact areas are disposed within the slot. The apparatus may receive, for example, any of a Smart Media flash memory card, Memory Stick flash memory card, Secure Digital flash memory card, or MultiMedia flash memory card.

Abstract: Method, apparatus and system embodiments to provide user-level creation, control and synchronization of OS-invisible “shreds” of execution via an abstraction layer for a system that includes one or more sequencers that are sequestered from operating system control. For at least one embodiment, the abstraction layer provides sequestration logic, proxy execution logic, transition detection and shred suspension logic, and sequencer arithmetic logic. Other embodiments are also described and claimed.

Abstract: Method, apparatus and system embodiments to schedule OS-independent “shreds” without intervention of an operating system. For at least one embodiment, the shred is scheduled for execution by a scheduler routine rather than the operating system. A scheduler routine may run on each enabled sequencer. The schedulers may retrieve shred descriptors from a queue system. The sequencer associated with the scheduler may then execute the shred described by the descriptor. Other embodiments are also described and claimed.

Abstract: An atomic layer deposition method includes positioning a semiconductor substrate within an atomic layer deposition chamber. A first deposition precursor is fed to the chamber under first vacuum conditions effective to form a first monolayer on the substrate. The first vacuum conditions are maintained at least in part by a first non-roughing vacuum pump connected to the chamber and through which at least some of the first deposition precursor flows. After forming the first monolayer, a purge gas is fed to the chamber under second vacuum conditions maintained at least in part by a second non-roughing vacuum pump connected to the chamber which is different from the first non-roughing vacuum pump and through which at least some of the purge gas flows. An atomic layer deposition apparatus is disclosed.

Abstract: Disclosed are novel methods and apparatus for manipulating and generating a real-time counter in network computing environments. In an embodiment, a method of tracking a defect is disclosed. The method includes providing a defect abstract, the defect abstract including information to identify the defect; identifying a component having the defect; assigning a user to resolve the defect; and assigning a defect number to identify the defect, the defect number obtained by incrementing a counter value stored in a file, the file being accessible by a single user at a time.

Abstract: A method for forming conductive plugs within an insulation material is described. The inventive process results in a plug of a material such as tungsten which is more even with the insulation layer surface than conventional plug formation techniques. Conventional processes result in recessed plugs which are not easily or reliably coupled with subsequent layers of sputtered aluminum or other conductors. The inventive process uses a two-step chemical mechanical planarization technique. An insulation layer with contact holes is formed, and a metal layer is formed thereover. A polishing pad rotates against the wafer surface while a slurry selective to the metal removes the metal overlying the wafer surface, and also recesses the metal within the contact holes due to the chemical nature and fibrous element of the polishing pad. A second CMP step uses a slurry having an acid or base selective to the insulation material to remove the insulator from around the metal.

Abstract: A pad refurbisher that provides in situ, real-time conditioning and/or cleaning of a polishing surface on a polishing pad used in chemical-mechanical polishing of a semiconductor wafer and other microelectronic substrates. The pad refurbisher has a body adapted for attachment to a wafer carrier of a chemical-mechanical polishing machine, and a refurbishing element connected to the body. The body has a distal face positioned proximate to a perimeter portion of the wafer carrier and facing generally toward the polishing surface of the polishing pad. The body travels with the wafer carrier as the wafer carrier moves over the polishing pad. The refurbishing element is connected to the distal face of the body so that the refurbishing element can operatively engage the polishing surface substantially adjacent to the perimeter of the wafer carrier.