Abstract: A recycled polishing pad conditioner comprises a base plate and a reversed abrasive disc that is flipped over from its original configuration. The reversed disc comprises an exposed abrasive face having an unused abrasive face comprising abrasive particles. A bond face of the disc is affixed to the base plate, the bond face comprising a used abrasive face that was previously used to condition polishing pads. Also described is a pad conditioner having an abrasive face comprising exposed portions of abrasive particles, with at least about 60% of the abrasive particles having a crystalline structure with substantially the same crystal symmetry.

Abstract: In a method of refurbishing a deposition target, a surface of the target is provided in a process zone. An electrical arc is generated in the process zone, and a consumable metal wire is inserted into the process zone to form liquefied metal. A pressurized gas is injected into the process zone to direct the liquefied metal toward the surface of the target to splatter the liquefied metal on the surface, thereby forming a coating having the metal on at least a portion of the surface of the target that exhibits reduced contamination from the environment.

Abstract: The invention is directed to a memory card that includes a device connector conforming to the memory card standard, and a host connector conforming to a host connection standard and comprising a retractable shieldless tab compatible with the host connection standard. The presence of the two connectors adds versatility to the memory card. The host connector facilitates direct coupling of the memory card to a computing device without an adapter or reader. The memory card maintains a form factor of the memory card standard when the shieldless tab is retracted, which allows the memory card to be used similar to a conventional memory card of the memory card standard. In order to fit within the memory card standard form factor, the shieldless tab may be an altered version of a conventional connector interface conforming to the host connection standard.

Abstract: A hermetic pressure connector which provides a pressure-tight, electrically conductive connection through a hole in a bulkhead. The connector includes a transverse support member having a high pressure side and an opposite low pressure side. A passage extends through the transverse support member between the opposite sides. A conductor pin having an axial portion extends through the passage. An insulating sleeve surrounds at least the axial portion of the conductor pin, thereby electrically insulating the transverse support member from the conductor pin. A molded connected body surrounds at least a central portion of the conductor pin at least at one of the high and low pressure sides to thereby mechanically support the conductor pin in the passage. The molded connector body is directly sealingly engaged with the conductor pin, the insulating sleeve and the transverse support member.

Abstract: Systems and methods are provided for processing transactions, and more specifically for receiving, processing and transmitting electronic payment transaction information. The system and method accesses a transaction software engine that effectuates the authorization of electronic payment requests and the settlement of authorized electronic payments. The transaction software engine, in accordance with an embodiment of the invention, resides at a merchant's site and more specifically within the merchant's server or computer which is in communication with one or more network terminals. With such a system, authorization requests may be sent by a terminal as each transaction occurs. Batches of settlement requests are processed after a predetermined time, although the transactions are processed on a transaction-by-transaction basis. In addition, the software engine enables the transmission of data over the Internet.

Abstract: A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A method for fabricating the component includes the steps of providing a substrate containing multiple dice, forming trenches on the substrate proximate to peripheral edges of the dice, and depositing a polymer material into the trenches. In addition, the method includes the steps of planarizing the back side of the substrate to contact the polymer filled trenches, and cutting through the polymer trenches to singulate the components from the substrate. Prior to the singulating step the components can be tested and burned-in while they remain on the substrate.

Abstract: A coalescing assembly for coalescing entrained oil from a high temperature, high velocity gas stream comprises a coalescing element of compacted high temperature polyamide fibers, such as those available under the trademark Nomex®, rigidly held by concentric cylindrical support structures of a dense fibrous material such as stainless steel. The coalescing assembly forms a component of an oil coalescer having a unique hole configuration in its outer shell to prevent coalesced oil from being re-entrained into the gas stream. The oil coalescer is a component of an oil separator for use in aircraft operational environments and features high durability and longevity of 10 years or more.

Abstract: A retaining ring can be shaped by machining or lapping the bottom surface of the ring to form a shaped profile in the bottom surface. The bottom surface of the retaining ring can include flat, sloped and curved portions. The lapping can be performed using a machine that dedicated for use in lapping the bottom surface of retaining rings. During the lapping the ring can be permitted to rotate freely about an axis of the ring. The bottom surface of the retaining ring can have curved or flat portions.

Abstract: A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A method for fabricating the component includes the steps of providing a substrate containing multiple dice, forming trenches on the substrate proximate to peripheral edges of the dice, and depositing a polymer material into the trenches. In addition, the method includes the steps of planarizing the back side of the substrate to contact the polymer filled trenches, and cutting through the polymer trenches to singulate the components from the substrate. Prior to the singulating step the components can be tested and burned-in while they remain on the substrate.

Abstract: An apparatus and method for attaching a semiconductor die to a lead frame wherein the electric contact points of the semiconductor die are relocated to the periphery of the semiconductor die through a plurality of conductive traces. A plurality of leads extends from the lead frame over the conductive traces proximate the semiconductor die periphery and directly attaches to and makes electrical contact with the conductive traces in a LOC arrangement. Alternately, a connector may contact a portion of the conductive trace to make contact therewith.

Abstract: A die-wafer package includes a singulated semiconductor die having a first plurality of bond pads on a first surface and a second plurality of bond pads on a second opposing surface thereof. Each of the first and second pluralities of bond pads includes an under-bump metallization (UBM) layer. The singulated semiconductor die is disposed on a semiconductor die site of a semiconductor wafer and a first plurality of conductive bumps electrically couples the first plurality of bond pads of the singulated semiconductor die with a first set of bond pads formed on the semiconductor die site. A second plurality of conductive bumps is disposed on a second set of bond pads of the semiconductor die site. A third plurality of conductive bumps is disposed on the singulated semiconductor die's second plurality of bond pads. The second and third pluralities of conductive bumps are configured for electrical interconnection with an external device.

Abstract: A method of fabricating a chip-scale or wafer-level package having passivation layers on substantially all surfaces thereof to form a hermetically sealed package. The package may be formed by disposing a first passivation layer on the passive or backside surface of a semiconductor wafer. The semiconductor wafer may be attached to a flexible membrane and diced, such as by a wafer saw, to separate the semiconductor devices. Once diced, the flexible membrane may be stretched so as to laterally displace the individual semiconductor devices away from one another and substantially expose the side edges thereof. Once the side edges of the semiconductor devices are exposed, a passivation layer may be formed on the side edges and active surfaces of the devices. A portion of the passivation layer over the active surface of each semiconductor device may be removed so as to expose conductive elements formed therebeneath.

Abstract: The present disclosure provides small scale capacitors (e.g., DRAM capacitors) and methods of forming such capacitors. One exemplary implementation provides a method of fabricating a capacitor that includes sequentially forming a first electrode, a dielectric layer, and a second electrode. At least one of the electrodes may be formed by a) reacting two precursors to deposit a first conductive layer at a first deposition rate, and b) depositing a second conductive layer at a second, lower deposition rate by depositing a precursor layer of one precursor at least one monolayer thick and exposing that precursor layer to another precursor to form a nanolayer reaction product. The second conductive layer may be in contact with the dielectric layer and have a thickness of no greater than about 50?.

Abstract: The present invention provides a method and apparatus for capturing portions of an electronic document. The method includes activating a capture mode based on a user input, selecting a portion of an electronic document in response to activating the capture mode, and receiving the selected portion of the electronic document in response to selecting the portion of the electronic document. The method also includes providing the selected portion of the electronic document in a predetermined format.

Abstract: An atomic layer deposition method includes positioning a plurality of semiconductor wafers into an atomic layer deposition chamber. Deposition precursor is emitted from individual gas inlets associated with individual of the wafers received within the chamber effective to form a respective monolayer onto said individual wafers received within the chamber. After forming the monolayer, purge gas is emitted from individual gas inlets associated with individual of the wafers received within the chamber. An atomic layer deposition tool includes a subatmospheric load chamber, a subatmospheric transfer chamber and a plurality of atomic layer deposition chambers. Other aspects and implementations are disclosed.

Abstract: The invention includes a method of forming a rugged semiconductor-containing surface. A first semiconductor layer is formed over a substrate, and a second semiconductor layer is formed over the first semiconductor layer. Subsequently, a third semiconductor layer is formed over the second semiconductor layer, and semiconductor-containing seeds are formed over the third semiconductor layer. The seeds are annealed to form the rugged semiconductor-containing surface. The first, second and third semiconductor layers are part of a common stack, and can be together utilized within a storage node of a capacitor construction. The invention also includes semiconductor structures comprising rugged surfaces. The rugged surfaces can be, for example, rugged silicon.

Abstract: A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A method for fabricating the component includes the steps of providing a substrate containing multiple dice, forming trenches on the substrate proximate to peripheral edges of the dice, and depositing a polymer material into the trenches. In addition, the method includes the steps of planarizing the back side of the substrate to contact the polymer filled trenches, and cutting through the polymer trenches to singulate the components from the substrate. Prior to the singulating step the components can be tested and burned-in while they remain on the substrate.

Abstract: A method for forming a floating gate semiconductor device such as an electrically erasable programmable read only memory is provided. The device includes a silicon substrate having an electrically isolated active area. A gate oxide, as well as other components of a FET (e.g., source, drain) are formed in the active area. A self aligned floating gate is formed by depositing a conductive layer (e.g., polysilicon) into the recess and over the gate oxide. The conductive layer is then chemically mechanically planarized to an endpoint of the isolation layer so that all of the conductive layer except material in the recess and on the gate oxide is removed. Following formation of the floating gate an insulating layer is formed on the floating gate and a control gate is formed on the insulating layer.

Abstract: An atomic layer deposition method includes positioning a semiconductor substrate within an atomic layer deposition chamber. A first deposition precursor is fed to the chamber under first vacuum conditions effective to form a first monolayer on the substrate. The first vacuum conditions are maintained at least in part by a first non-roughing vacuum pump connected to the chamber and through which at least some of the first deposition precursor flows. After forming the first monolayer, a purge gas is fed to the chamber under second vacuum conditions maintained at least in part by a second non-roughing vacuum pump connected to the chamber which is different from the first non-roughing vacuum pump and through which at least some of the purge gas flows. An atomic layer deposition apparatus is disclosed.

Abstract: The invention is directed to a multi-connector memory card that includes a device connector and a connector that conform to a device connection standard and a host connection standard respectively. The dimensions of the memory card may substantially conform to dimensions of a memory card standard, such as a MultiMedia Card standard or a Secure Digital standard. A retractable sheath fits over a housing of the memory card to protect electrical contacts on the device-connector and the host connector. In particular, the retractable sheath that can be positioned in a first position to cover the host connector and expose the device connector, and a second position to cover the device connector and expose the host connector.