Patents by Inventor Tsung Yu

Tsung Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240274517
    Abstract: A semiconductor package structure includes a first component, a bonding structure on the first component, a second component connected to the first component, and a copper connector on the second component. The bonding structure includes a copper base on the first component and copper protruding portions on the copper base. The second component is connected to the first component by bonding the copper protruding portions to the copper connector, and the copper protruding portions are in contact with the copper connector.
    Type: Application
    Filed: January 22, 2024
    Publication date: August 15, 2024
    Inventors: Fa-Chuan CHEN, Ta-Jen YU, Bo-Jiun YANG, Tsung-Yu PAN, Tai-Yu CHEN, Nai-Wei LIU, Shih-Chin LIN, Wen-Sung HSU
  • Publication number: 20240274707
    Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a first drift region, a first source/drain region, and a gate oxide layer. The gate structure and the gate oxide layer are disposed on the semiconductor substrate. The first drift region is disposed in the semiconductor substrate. The first source/drain region is disposed in the first drift region. At least a part of a first portion of the gate oxide layer is disposed between the gate structure and the semiconductor substrate in a vertical direction. A second portion of the gate oxide layer is disposed between the first portion and the first source/drain region in a horizontal direction. The second portion includes a bottom extending downwards and a first depressed top surface located above the bottom. A part of the first drift region is located under the first portion and the second portion of the gate oxide layer.
    Type: Application
    Filed: April 24, 2024
    Publication date: August 15, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Tsung-Yu Yang, Shin-Hung Li, Ruei-Jhe Tsao, Che-Hua Chang
  • Publication number: 20240258374
    Abstract: A method of forming a semiconductor arrangement includes forming a gate dielectric layer over a semiconductor layer. A gate electrode layer is formed over the gate dielectric layer. A first gate mask is formed over the gate electrode layer. The gate electrode layer is etched using the first gate mask as an etch template to form a first gate electrode. A first dopant is implanted into the semiconductor layer using the first gate mask and the first gate electrode as an implantation template to form a first doped region in the semiconductor layer.
    Type: Application
    Filed: February 5, 2024
    Publication date: August 1, 2024
    Inventors: Yun-Chi WU, Tsung-Yu YANG, Cheng-Bo SHU, Chien Hung LIU
  • Patent number: 12051668
    Abstract: A method of forming a semiconductor device includes applying an adhesive material in a first region of an upper surface of a substrate, where applying the adhesive material includes: applying a first adhesive material at first locations of the first region; and applying a second adhesive material at second locations of the first region, the second adhesive material having a different material composition from the first adhesive material. The method further includes attaching a ring to the upper surface of the substrate using the adhesive material applied on the upper surface of the substrate, where the adhesive material is between the ring and the substrate after the ring is attached.
    Type: Grant
    Filed: May 26, 2023
    Date of Patent: July 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuan-Yu Huang, Li-Chung Kuo, Sung-Hui Huang, Shang-Yun Hou, Tsung-Yu Chen, Chien-Yuan Huang
  • Patent number: 12046671
    Abstract: A semiconductor device includes a semiconductor substrate, a trench, and a gate structure. The trench is disposed in the semiconductor substrate. The gate structure is disposed on the semiconductor substrate. The gate structure includes a gate electrode, a first gate oxide layer, and a second gate oxide layer. A first portion of the gate electrode is disposed in the trench, and a second portion of the gate electrode is disposed outside the trench. The first gate oxide layer is disposed between the gate electrode and the semiconductor substrate. At least a portion of the first gate oxide layer is disposed in the trench. The second gate oxide layer is disposed between the second portion of the gate electrode and the semiconductor substrate in a vertical direction. A thickness of the second gate oxide layer is greater than a thickness of the first gate oxide layer.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: July 23, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Che-Hua Chang, Shin-Hung Li, Tsung-Yu Yang, Ruei-Jhe Tsao
  • Publication number: 20240234335
    Abstract: An electronic package is provided, in which an electronic component and conductors are disposed on a substrate structure, and the electronic component and the conductors are covered by an encapsulation layer. A conductive layer is formed on side surfaces of the encapsulation layer and in contact with the conductors, where the conductors are bonding wires used in a wire bonding process. Therefore, a conventional heat sink is replaced by the conductors, thereby reducing a use area of the substrate structure.
    Type: Application
    Filed: May 2, 2023
    Publication date: July 11, 2024
    Inventors: Yen-Yu CHU, Tsung-Yu HUANG, Kuo-Hua TSENG, Tsung-Xin CHIEN, Chang-Ku-Yuan SIE
  • Publication number: 20240234223
    Abstract: A manufacturing method of a semiconductor package includes the following steps. A package structure is provided over a substrate. A thermal interface layer is provided over the package structure. A lid structure is provided over the substrate, wherein the lid structure comprises a main body in contact with the package structure through the thermal interface layer and surrounding the package structure and a plurality of rib portions protruded from the main body and extended toward the package structure.
    Type: Application
    Filed: February 6, 2024
    Publication date: July 11, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Shu Lin, Wensen Hung, Tsung-Yu Chen
  • Publication number: 20240213167
    Abstract: A package structure and method for forming the same are provided. The package structure includes a substrate having a front surface and a back surface, and a die formed on the back surface of the substrate. The package structure includes a first through via structure formed in the substrate, a conductive structure formed in a passivation layer) over the front surface of the substrate. The conductive structure includes a via portion in direct contact with the substrate. The package structure includes a connector (formed over the via portion, wherein the connector includes an extending portion directly on a recessed top surface of the via portion.
    Type: Application
    Filed: February 5, 2024
    Publication date: June 27, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Kai CHENG, Tsung-Shu LIN, Tsung-Yu CHEN, Hsien-Pin HU, Wen-Hsin WEI
  • Patent number: 12021006
    Abstract: An apparatus for manufacturing packaged semiconductor devices includes a lower plate having package platforms and clamp guide pins to align an upper plate with the lower plate, and a boat tray having windows configured to receive package devices, and a plurality of upper plates configured to be aligned to respective windows and respective package platforms. Clamping force can be applied by fasteners configured to generate a downward force upon the upper plate. Package devices on the platforms are thus subjected to a clamping force. Load cells measure the clamping force so adjustments can be made.
    Type: Grant
    Filed: July 28, 2023
    Date of Patent: June 25, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wensen Hung, Tsung-Yu Chen, Tsung-Shu Lin, Chen-Hsiang Lao, Wen-Hsin Wei, Hsien-Pin Hu
  • Patent number: 12019773
    Abstract: A collaborative session (e.g., a virtual time capsule) in which access to a collaborative object and added virtual content is selectively provided to participants/users. In one example of the collaborative session, a participant (the host) creates a new session and invites participants to join. The session creator (i.e., the host) and other approved participants can access the contents of a session (e.g., which may be recorded using an application such as lens cloud feature; available from Snap Inc. of Santa Monica, California). A timestamp is associated with each received virtual content, and the users are provided with a timelapse of the collaborative object as a function of the timestamps.
    Type: Grant
    Filed: August 31, 2022
    Date of Patent: June 25, 2024
    Assignee: Snap Inc.
    Inventors: Youjean Cho, Chen Ji, Fannie Liu, Andrés Monroy-Hernández, Tsung-Yu Tsai, Rajan Vaish
  • Publication number: 20240200364
    Abstract: A heavy duty lock case is mounted on a door and includes a latch coupled with a door frame for retaining the door in a closed position. An anti-theft latch can be operated to engage with the door frame. The latch cooperates with an anti-pick member to avoid the latch from being picked to disengage from the door frame when the door is in the closed position. When normally operated, an inner operating device or an outer operating device can be operated to disengage the latch from the door frame while disengaging the anti-theft latch from the door frame, permitting easy, convenient opening of the door.
    Type: Application
    Filed: January 6, 2023
    Publication date: June 20, 2024
    Inventor: Tsung-Yu Huang
  • Publication number: 20240180483
    Abstract: A sleep monitoring system and a sleep monitoring method are provided. The sleep monitoring system includes a receiver, a transmitter, a storage and a processing circuit. The receiver and the transmitter are disposed in the target field, and the transmitter transmits a wireless detection signal to the target field. The user is located between the receiver and the transmitter, and the receiver receives the wireless detection signal over multiple communication links. The processing circuit is electrically connected to the receiver and the storage, and analyzes a change of the wireless detection signal within a predetermined time, so as to detect a sleep time of a user within the predetermined time, and obtains a sleep quality of the user within the sleep time.
    Type: Application
    Filed: November 22, 2023
    Publication date: June 6, 2024
    Inventors: YI-AN CHEN, CHUI-CHU CHENG, TSUNG-YU HO
  • Patent number: 12002883
    Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a first drift region, a first source/drain region, and a gate oxide layer. The gate structure and the gate oxide layer are disposed on the semiconductor substrate. The first drift region is disposed in the semiconductor substrate. The first source/drain region is disposed in the first drift region. At least a part of a first portion of the gate oxide layer is disposed between the gate structure and the semiconductor substrate in a vertical direction. A second portion of the gate oxide layer is disposed between the first portion and the first source/drain region in a horizontal direction. The second portion includes a bottom extending downwards and a first depressed top surface located above the bottom. A part of the first drift region is located under the first portion and the second portion of the gate oxide layer.
    Type: Grant
    Filed: January 18, 2022
    Date of Patent: June 4, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Tsung-Yu Yang, Shin-Hung Li, Ruei-Jhe Tsao, Che-Hua Chang
  • Publication number: 20240178095
    Abstract: A semiconductor device includes a substrate, a first device, a second device, a ring structure, a lid structure, and a first adhesive layer. The first device is disposed on the substrate. The second device is adjacent to the first device and is disposed on the substrate. The ring structure is disposed over the substrate and the second device. The ring structure includes a cover and a leg extending out from the cover. The cover has a through opening. The lid structure is disposed over the ring structure and the first device. The lid structure includes a body and a protrusion protruding from the body. The protrusion of the lid structure is inserted into the through opening of the cover of the ring structure. The first adhesive layer is disposed between the body of the lid structure and the cover of the ring structure and includes phase change thermal interface material.
    Type: Application
    Filed: February 10, 2023
    Publication date: May 30, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wensen Hung, Tsung-Yu Chen, Meng-Tsan Lee
  • Patent number: 11990416
    Abstract: A semiconductor device includes a gate structure disposed in a first dielectric layer, a conductive segment disposed in the first dielectric layer and separated from the gate structure, a second dielectric layer disposed over the first dielectric layer, a first contact penetrating the second dielectric layer and electrically connected to the gate structure, a second contact penetrating the second dielectric layer and electrically connected to the conductive segment, and a silicon nitride-based layer surrounding at least one of the first and second contacts and connected between the second dielectric layer and the at least one of the first and second contacts. A method for making the semiconductor device is also provided.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsinhsiang Tseng, Chi-Ruei Yeh, Tsung-Yu Chiang
  • Publication number: 20240159080
    Abstract: A lock case interlockable with an anti-theft latch is mounted on a door. The lock case includes a latch coupled with a latch hole in a door frame for retaining the door in a closed position. The anti-theft latch can be operated to engage with the door frame. When the latch is picked, the anti-theft latch still remains engaged with the door frame to prevent opening of the door. When normally operated, an inner operating device or an outer operating device can be operated to disengage the latch from the latch hole while disengaging the anti-theft latch from the door frame, permitting easy, convenient opening of the door.
    Type: Application
    Filed: November 22, 2022
    Publication date: May 16, 2024
    Inventor: Tsung-Yu Huang
  • Publication number: 20240145319
    Abstract: A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the transparent plate, and a lid surrounding the transparent plate. The supporting element and the transparent plate define a channel.
    Type: Application
    Filed: January 2, 2024
    Publication date: May 2, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tsung-Yu LIN, Pei-Yu WANG, Chung-Wei HSU
  • Publication number: 20240142428
    Abstract: A water quality detection device including a detection tank, a sensor, the cleaner and a processor is provided. The sensor is disposed on the detection tank and is configured to sense a to-be-detected liquid within the detection tank. The cleaner is configured to clean the sensor. The processor is electrically connected to the sensor and the cleaner and is configured to: execute an initialization procedure, which includes driving the sensor to sense the to-be-detected liquid to obtain a number of initial sensing values and calculating a threshold value according to the initial sensing values; drive the sensor to sense the to-be-detected liquid to obtain a sensing value of the to-be-detected liquid, and determine whether the sensing value of the to-be-detected liquid reaches the threshold value; drive the cleaner to operate when the sensing value of the to-be-detected liquid reaches the threshold value.
    Type: Application
    Filed: February 17, 2023
    Publication date: May 2, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Tsung-Yu TSAI, Hung-Sheng LIN, Cheng-Da KO, Chun-Te CHUANG
  • Patent number: 11945156
    Abstract: A three-dimensional printing apparatus includes a liquid tank capable of accommodating a photosensitive liquid. The liquid tank includes a film, a plurality of side walls, a plate and a motor. The film has a workpiece curing area. The plurality of side walls surrounds the film. The plate is capable of supporting the film and having at least one fluid tunnel extending from a first surface of the plate contacting the film to a second surface of the plate. The motor is connected to the liquid tank to incline the liquid tank. A gap is formed between the plat and one of the plurality of side walls of the liquid tank, and the film is communicated with an outside space via the gap.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: April 2, 2024
    Assignee: YOUNG OPTICS INC.
    Inventors: Li-Han Wu, Chien-Hsing Tsai, Chao-Shun Chen, Tsung-Yu Liu
  • Publication number: 20240105530
    Abstract: In an embodiment, a device includes: an integrated circuit package including: a package component; and a package stiffener attached to the package component; and a heat spreader attached to the integrated circuit package, a main portion of the heat spreader disposed above the package stiffener, a protruding portion of the heat spreader extending through the package stiffener; an elastic adhesive material between the main portion of the heat spreader and the package stiffener; and a thermal interface material between the protruding portion of the heat spreader and the package component, the thermal interface material different from the elastic adhesive material.
    Type: Application
    Filed: January 6, 2023
    Publication date: March 28, 2024
    Inventors: Wensen Hung, Tsung-Yu Chen