Abstract: Disclosed herein is a composition that includes Lactobacillus plantarum LP28, Pediococcus pentosaceus PP4012, and Lactobacillus fermentum LF26 respectively deposited at the China General Microbiological Culture Collection Center (CGMCC) under accession numbers CGMCC 3346, 5235 and 14166. Also disclosed herein is a method of increasing dissolved oxygen in aquaculture water, including treating the aquaculture water with the composition.

Abstract: An electronic device package includes a first substrate, a second substrate and a conductive layer. The first substrate includes a first bonding pad, and a cavity exposing the first bonding pad. The second substrate is laminated on the first substrate. The second substrate includes a second bonding pad at least partially inserting into the cavity of the first substrate. The conductive layer is disposed in the cavity and at least between the first bonding pad and the second bonding pad to connect the first bonding pad and the second bonding pad.

Abstract: Systems and methods of forming such include method, forming a memory gate (MG) stack in a first region, forming a sacrificial polysilicon gate on a high-k dielectric in a second region, wherein the first and second regions are disposed in a single substrate. Then a select gate (SG) may be formed adjacent to the MG stack in the first region of the semiconductor substrate. The sacrificial polysilicon gate may be replaced with a metal gate to form a logic field effect transistor (FET) in the second region. The surfaces of the substrate in the first region and the second region are substantially co-planar.

Abstract: An electronic device package includes a first conductive substrate, a second conductive substrate and a dielectric layer. The first conductive substrate has a first coefficient of thermal expansion (CTE). The second conductive substrate is disposed on an upper surface of the first conductive substrate and electrically connected to the first conductive substrate. The second conductive substrate has a second CTE. The dielectric layer is disposed on the upper surface of the first conductive substrate and disposed on at least one sidewall of the second conductive substrate. The dielectric layer has a third CTE. A difference between the first CTE and the second CTE is larger than a difference between the first CTE and the third CTE.

Abstract: A semiconductor device and method of making the same are disclosed. The semiconductor device includes a memory gate on a charge storage structure formed on a substrate, a select gate on a gate dielectric on the substrate proximal to the memory gate, and a dielectric structure between the memory gate and the select gate, and adjacent to sidewalls of the memory gate and the select gate, wherein the memory gate and the select gate are separated by a thickness of the dielectric structure. Generally, the dielectric structure comprises multiple dielectric layers including a first dielectric layer adjacent the sidewall of the memory gate, and a nitride dielectric layer adjacent to the first dielectric layer and between the memory gate and the select gate. Other embodiments are also disclosed.

Abstract: In an example embodiment, a method comprises: forming first spacers adjacent to a memory cell formed on a substrate, each of the first spacers being formed in direct contact with the substrate, where forming the memory cell includes forming a control gate electrode and a tunnel oxide layer over the substrate and subsequently etching completely at least the control gate electrode and the tunnel oxide layer that are disposed beyond the memory cell; forming an interlayer dielectric layer over the memory cell and the first spacers; forming a contact hole through the interlayer dielectric layer to at least reach the substrate; subsequent to forming the contact hole, forming a second spacer adjacent to one of the first spacers, where a height of the second spacer is greater than a height of the first spacers, the second spacer substantially contacting the substrate and the interlayer dielectric layer; and forming a contact in the contact hole.

Abstract: A split gate device that includes a memory gate and a select gate disposed side by side, a dielectric structure having a first portion disposed between the memory gate and a substrate and a second portion disposed along an inner sidewall of the select gate to separate the select gate from the memory gate, and a spacer formed over the select gate along an inner sidewall of the memory gate. Other embodiments of embedded split gate devices including high voltage and low voltage transistors are also disclosed.

Abstract: Systems and methods of forming such include method, forming a memory gate (MG) stack in a first region, forming a sacrificial polysilicon gate on a high-k dielectric in a second region, wherein the first and second regions are disposed in a single substrate. Then a select gate (SG) may be formed adjacent to the MG stack in the first region of the semiconductor substrate. The sacrificial polysilicon gate may be replaced with a metal gate to form a logic field effect transistor (FET) in the second region. The surfaces of the substrate in the first region and the second region are substantially co-planar.

Abstract: A semiconductor device and method of making the same are disclosed. The semiconductor device includes a memory gate on a charge storage structure formed on a substrate, a select gate on a gate dielectric on the substrate proximal to the memory gate, and a dielectric structure between the memory gate and the select gate, and adjacent to sidewalls of the memory gate and the select gate, wherein the memory gate and the select gate are separated by a thickness of the dielectric structure. Generally, the dielectric structure comprises multiple dielectric layers including a first dielectric layer adjacent the sidewall of the memory gate, and a nitride dielectric layer adjacent to the first dielectric layer and between the memory gate and the select gate. Other embodiments are also disclosed.

Abstract: A ceramic and plastic composite and a method for fabricating the same are disclosed. A chemical cleaning treatment, a microetching treatment, a hole reaming treatment, and a surface activating treatment are performed on the surface of a ceramic matrix to form nanoholes with an average diameter ranging between 150 nm and 450 nm. Plastics are injected onto the surface of the baked ceramic matrix to form a plastic layer. The plastic layer more deeply fills the nanoholes to have higher adhesion. Thus, the higher combined strength and air tightness exist between the ceramic matrix and the plastic layer to improve the reliability and the using performance of the ceramic and plastic composite.

Abstract: A scratch-protective, air-permeable and waterproofed protective sheet includes a buffering air-permeable layer, and a first and second scratch-protective combining layer which are laminated respectively on a surface of the buffering air-permeable layer. The buffering air-permeable layer, and the first and second scratch-protective combining layer are air permeable. The buffering air-permeable layer is a non-woven fabric, a fiber material chosen among polyethylene fiber, polyolefin fiber, polyester fiber, cellulose fiber, regenerated cellulose fiber, polyamide fiber, mineral fiber and metallic fiber; whereas, the first and second scratch-protective combining layer are a plastic rubber elastomer chosen from PVC, polyolefin, TPU, TPO, SBS, SEBS, ABS, NBR, CR, Hypalon, natural rubber, IIR, cross-linking elastomer or blend thereof.

Abstract: Techniques for suppression of program disturb in flash memory devices are described herein. In an example embodiment, a method for suppression of program disturb in a flash memory array is provided. The flash memory array comprises rows and columns of memory cells, where the memory cells in each row are coupled to a source line and to a select-gate (SG) line, and the memory cells in each column are coupled to a respective bit line (BL). During a program memory operation, a first voltage, of a selected SG line, and a second voltage, of an unselected BL, are regulated independently of a power supply voltage of the flash memory array, where the first voltage is regulated in a first range of 0.9V to 1.1V and the second voltage is regulated in a second range of 0.4V to 1.2V.

Abstract: A testing method includes the following operations: performing a place and route procedure according to a netlist file corresponding to a chip to generate first layout data; determining whether to replace a flip-flop circuit in the chip with a gated flip-flop circuit according to the first layout data to generate second layout data; and running a test on the chip according to the second layout data.

Abstract: A disposable liquid-binding floor mat includes a water penetration layer, a water absorption layer, a water-proof layer and a self-adhesive layer. The water penetration layer is a thin piece of non-woven fabric and is superimposed on the water absorption layer. The water absorption layer is made of a hydrophilic thin plate and is superimposed between the water penetration layer and the water-proof layer. The water-proof layer is made of a water-proof film material and is superimposed between the water absorption layer and the self-adhesive layer. The self-adhesive layer is made of a self-adhesive material and is superimposed below the water-proof layer. The water penetration layer, the water absorption layer, the water-proof layer and the self-adhesive layer are bonded as an integrated non-sealed edge structure, and a deodorant is added into the water absorption layer.

Abstract: Disclosed herein is a composition that includes Lactobacillus plantarum LP28, Pediococcus pentosaceus PP4012, and Lactobacillus fermentum LF26 respectively deposited at the China General Microbiological Culture Collection Center (CGMCC) under accession numbers CGMCC 3346, 5235 and 14166. Also disclosed herein is a method of increasing dissolved oxygen in aquaculture water, including treating the aquaculture water with the composition.

Abstract: In an example embodiment, a method comprises: forming first spacers adjacent to a memory cell formed on a substrate, each of the first spacers being formed in direct contact with the substrate, where forming the memory cell includes forming a control gate electrode and a tunnel oxide layer over the substrate and subsequently etching completely at least the control gate electrode and the tunnel oxide layer that are disposed beyond the memory cell; forming an interlayer dielectric layer over the memory cell and the first spacers; forming a contact hole through the interlayer dielectric layer to at least reach the substrate; subsequent to forming the contact hole, forming a second spacer adjacent to one of the first spacers, where a height of the second spacer is greater than a height of the first spacers, the second spacer substantially contacting the substrate and the interlayer dielectric layer; and forming a contact in the contact hole.

Abstract: Techniques for suppression of program disturb in flash memory devices are described herein. In an example embodiment, a method for suppression of program disturb in a flash memory array is provided. The flash memory array comprises rows and columns of memory cells, where the memory cells in each row are coupled to a source line and to a select-gate (SG) line, and the memory cells in each column are coupled to a respective bit line (BL). During a program memory operation, a first voltage, of a selected SG line, and a second voltage, of an unselected BL, are regulated independently of a power supply voltage of the flash memory array, where the first voltage is regulated in a first range of 0.9V to 1.1V and the second voltage is regulated in a second range of 0.4V to 1.2V.

Abstract: This invention relates to a finger wearable interdental cleaning apparatus comprising finger hooks and attachable toothpick. The finger hooks are mounted on finger joint areas with the toothpick being attached to the body of the finger hooks. By using finger joint areas to control the movement of the toothpick, it frees up the finger tips for holding the toothpick such that all fingers can be used to cover the mouth area when using the toothpick. The mouth area is covered by the same hand operating the toothpick. It eliminates the need to use the second hand to cover the mouth area when the first hand is operating the toothpick. This makes the tooth cleaning more convenient and better etiquette.

Abstract: A ceramic and plastic composite includes a ceramic matrix and a plastic layer. Plastics are injected onto the surface of the baked ceramic matrix to form a plastic layer. The plastic layer more deeply fills nanoholes distributed on the surface of the ceramic matrix to have higher adhesion. Thus, the higher combined strength and air tightness exist between the ceramic matrix and the plastic layer to improve the reliability and the using performance of the ceramic and plastic composite.

Abstract: A testing method includes the following operations: performing a place and route procedure according to a netlist file corresponding to a chip, in order to generate first layout data; determining whether to replace a flip-flop circuit in the chip with a gated flip-flop circuit according to the first layout data, in order to generate second layout data; and running a test on the chip according to the second layout data.