Abstract: Structures and methods are provided for forming bottom source/drain contact regions for nanowire devices. A nanowire is formed on a substrate. The nanowire extends substantially vertically relative to the substrate and is disposed between a top source/drain region and a bottom source/drain region. A first dielectric material is formed on the bottom source/drain region. A second dielectric material is formed on the first dielectric material. A first etching process is performed to remove part of the first dielectric material and part of the second dielectric material to expose part of the bottom source/drain region. A second etching process is performed to remove part of the first dielectric material under the second dielectric material to further expose the bottom source/drain region. A first metal-containing material is formed on the exposed bottom source/drain region. Annealing is performed to form a bottom contact region.

Abstract: A pharmaceutical preparation containing polymeric compounds as shown in the specification. This preparation can be used to improve liver function and treat liver disease, and promoting liver tissue regeneration.

Abstract: According to an exemplary embodiment, a semiconductor device is provided. The semiconductor device includes: a substrate; a first vertical structure protruding from the substrate; a second vertical structure protruding from the substrate; an STI between the first vertical structure and the second vertical structure; wherein a first horizontal width between the first vertical structure and the STI is substantially the same as a second horizontal width between the second vertical structure and the STI.

Abstract: Some embodiments of the present disclosure provide a method of dissipating process exhaust from a chamber. The method includes conveying the process exhaust from the chamber through an inner tube of a pipeline to abatement. The process exhaust has a first temperature while exiting the chamber, and a second temperature while exiting the pipeline. The method maintains an outer tube of the pipeline at a vacuum state by a pump such that the inner tube is substantially thermal isolated from the atmosphere outside the pipeline. The second temperature is negative offset from the first temperature within a predetermined value.

Abstract: A light emitting diode including a first-type semiconductor layer, an emitting layer, a second-type semiconductor layer, a first electrode, a second electrode, and a Bragg reflector structure. The emitting layer is configured to emit a light beam and is located between the first-type semiconductor layer and the second-type semiconductor layer. The light beam has a peak wavelength in a light emitting wavelength range. The first-type semiconductor layer, the emitting layer, and the second-type semiconductor layer are located on a same side of the Bragg reflector structure. A reflectance of the Bragg reflector structure is greater than or equal to 95% in a reflective wavelength range at least covering 0.8X nm to 1.8X nm, and X is the peak wavelength of the light emitting wavelength range.

Abstract: Provided is a light emitting diode (LED) mounted on a carrier substrate and including a semiconductor epitaxial structure and at least one electrode pad structure. The semiconductor epitaxial structure is electrically connected to the carrier substrate. The electrode pad structure includes a eutectic layer, a blocking layer and an extension layer. The eutectic layer is adapted for eutectic bonding to the carrier substrate. The blocking layer is between the eutectic layer and the semiconductor epitaxial structure. The blocking layer blocks the diffusion of the material of the eutectic layer in the eutectic bonding process. The extension layer is between the eutectic layer and the semiconductor epitaxial structure. The extension layer reduces the stress on the LED produced by thermal expansion and contraction of the substrate during the eutectic bonding process, so as to prevent the electrode pad structure from cracking, and maintain the quality of the LED.

Abstract: A light emitting diode (LED) having distributed Bragg reflector (DBR) and a manufacturing method thereof are provided. The distributed Bragg reflector is used as a reflective element for reflecting the light generated by the light emitting layer to an ideal direction of light output. The distributed Bragg reflector has a plurality of through holes, such that the metal layer and the transparent conductive layer disposed on two sides of the distributed Bragg reflector may contact each other to conduct the current. Due to the distribution properties of the through holes, the current may be more uniformly diffused, and the light may be more uniformly emitted from the light emitting layer.

Abstract: A light emitting component includes an epitaxial structure, an adhesive layer, a first reflective layer, a second reflective layer, a block layer, a first electrode and a second electrode. The epitaxial structure includes a substrate, a first semiconductor layer, a light emitting layer and a second semiconductor layer. The adhesive layer is disposed on the second semiconductor layer of the epitaxial structure. The first reflective layer is disposed on the adhesive layer. The second reflective layer is disposed on the first reflective layer and extended onto the adhesive layer. A projection area of the second reflective layer is larger than a projection area of the first reflective layer. The block layer is disposed on the second reflective layer. The first electrode is electrically connected to the first semiconductor layer. The second electrode is electrically connected to the second semiconductor layer.

Abstract: The present disclosure relates to a semiconductor device having a delta doped sheet layer within a transistor's source/drain region to reduce contact resistance, and an associated method. In some embodiments, a dielectric layer is disposed over the transistor. A trench is disposed through the dielectric layer to the source/drain region and a conductive contact is disposed in the trench. The source/drain region comprises a delta doped sheet layer with a doping concentration that is higher than rest of the source/drain region.

Abstract: A semiconductor device includes a source/drain region, a barrier layer, and an interlayer dielectric. The barrier layer surrounds the source/drain region. The interlayer dielectric surrounds the barrier layer. As such, the source/drain region can be protected by the barrier layer from oxidation during manufacturing of the semiconductor device, e.g., the formation of the interlayer dielectric.

Abstract: A method for controlling an electronic device includes steps of: designating one of IoT devices as a master device, and the other IoT devices as slave devices; determining whether the slave device is connectable to the master device; connecting to the master device if affirmative; otherwise, connecting to at least one of the other slave devices which is not yet communicably connected to the slave device, so that at a signal transmission path exists between the master device and each slave device; receiving an operation control signal, and transmitting the same to the master device; and transmitting by the master device the operation control signal to a specific one of the IoT devices for controlling the electronic device.

Abstract: An internal fixation device is adapted for fixing a first bone fracture to a second bone fracture. The internal fixation device includes: a shank adapted to extend into the first and second bone fractures and including a connecting segment that is made of a shape-memory alloy, and a first threaded segment that is connected to a first end of the connecting segment and that is adapted to be fixed in the first bone fracture; and a fixing unit adapted to fasten the second bone fracture to the first bone fracture. When environmental temperature is increased to a predetermined temperature, the connecting segment is shortened such that the fracture surfaces of the first and second bone fractures are 15 pressed closely against each other.

Abstract: A semiconductor device and methods of formation are provided. A semiconductor device includes an annealed cobalt plug over a silicide in a first opening of the semiconductor device, wherein the annealed cobalt plug has a repaired lattice structure. The annealed cobalt plug is formed by annealing a cobalt plug at a first temperature for a first duration, while exposing the cobalt plug to a first gas. The repaired lattice structure of the annealed cobalt plug is more regular or homogenized as compared to a cobalt plug that is not so annealed, such that the annealed cobalt plug has a relatively increased conductivity or reduced resistivity.

Abstract: A computer system is provided. The computer system includes a USB connector, a voltage generator and a detection module coupled between the voltage generator and the USB connector. The USB connector includes a power pin. The voltage generator provides a first voltage to the power pin of the USB connector. The detection module generates a detection signal, and includes an impedance device coupled between the voltage generator and the power pin of the USB connector and a determining unit. The determining unit determines whether a USB device is coupled to the USB connector according to a cross voltage of the impedance device, and provides the detection signal.

Abstract: An apparatus for performing communication control includes a control module implemented with at least one integrated circuit (IC) whose package includes a plurality of sets of terminals, each set of the plurality of sets of terminals corresponding to one of a plurality of sub-modules of the control module, and within the sets of terminals, a set of terminals corresponding to a specific sub-module of the sub-modules include a power-input terminal arranged to input power from outside the control module. For example, on a printed circuit board (PCB) of the apparatus, arrangement of some modules is similar to that of some contact pads associated to the sets of terminals. In another example, the control module includes a power distribution system including at least one power distribution wire. In another example, a PCB within the apparatus includes at least one signal transmission wire and at least one set of co-plane ground wires.

Abstract: Systems and methods for application identification in accordance with embodiments of the invention are disclosed. In one embodiment, a user device includes a processor and memory configured to store an application, a session manager, an application identifier, and at least one shared library, and the processor is configured by the session manager to communicate the application identifier and the application identifier data to an authentication server and permit the execution of the application in response to authentication of the application by the authentication server.

Abstract: The present disclosure is directed to a bondply adhesive. The bondply adhesive contains 85 to 99.5 wt % maleic anhydride grafted styrene ethylene butadiene styrene copolymer having greater than 1 wt % maleic anhydride, 0.4 to 3.0 wt % 3-glycidyloxypropyl-trimethoxysilane, and optionally up to 14 wt % organic flame retardant.

Abstract: The present disclosure is directed to a coverlay adhesive. The coverlay adhesive contains 40 to 80 wt % maleic anhydride grafted styrene ethylene butadiene styrene copolymer having greater than 1 wt % maleic anhydride, 3 to 14 wt % epoxy resin, 0.5 to 1.5 wt % hardener, 0.05 to 0.1 wt % catalyst, 10 to 26 wt % organic flame retardant, and optionally polypheneylene ether.

Abstract: The present disclosure is directed to a bondply adhesive. The bondply adhesive contains 65 to 80 wt % maleic anhydride grafted styrene ethylene butadiene styrene copolymer having greater than 1 wt % maleic anhydride, 7 to 24 wt % epoxy resin, 0.3 to 3.0 wt % hardener, 0.05 to 0.1 wt % catalyst, 8 to 15 wt % organic flame retardant and 0.3 to 2.9 wt % 3-glycidyloxypropyl-trimethoxysilane, wherein a combined total of epoxy resin and organic flame retardant is less than 35 wt %.

Abstract: According to an exemplary embodiment, a method of forming a vertical device is provided. The method includes: providing a protrusion over a substrate; forming an etch stop layer over the protrusion; laterally etching a sidewall of the etch stop layer; forming an insulating layer over the etch stop layer; forming a film layer over the insulating layer and the etch stop layer; performing chemical mechanical polishing on the film layer and exposing the etch stop layer; etching a portion of the etch stop layer to expose a top surface of the protrusion; forming an oxide layer over the protrusion and the film layer; and performing chemical mechanical polishing on the oxide layer and exposing the film layer.