Patents by Inventor Tung Lin

Tung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9700397
    Abstract: An implant carrier assembly, including a first housing, a second housing, a mixing pot for receiving powder, and a sealed container for receiving liquid, is provided. The first housing and the second housing are detachably assembled to each other to form a receiving space. An implant is received therein or removed therefrom. The second housing has a hole communicating with the receiving space. The sealed container is inserted into the mixing pot, and the mixing pot is assembled to the second housing, such that the sealed container is packed and squeezed inside the mixing pot and broken and the liquid flows out of the sealed container. The powder and the liquid are mixed and flow into the receiving space through the hole.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: July 11, 2017
    Assignee: Metal Industries Research & Development Centre
    Inventors: Tung-Lin Tsai, I-Wen Huang, Bo-Wei Pan, Hsien-Ju Wu, Pei-Hua Wang
  • Publication number: 20170151050
    Abstract: An implant carrier assembly, including a first housing, a second housing, a mixing pot for receiving powder, and a sealed container for receiving liquid, is provided. The first housing and the second housing are detachably assembled to each other to form a receiving space. An implant is received therein or removed therefrom. The second housing has a hole communicating with the receiving space. The sealed container is inserted into the mixing pot, and the mixing pot is assembled to the second housing, such that the sealed container is packed and squeezed inside the mixing pot and broken and the liquid flows out of the sealed container. The powder and the liquid are mixed and flow into the receiving space through the hole.
    Type: Application
    Filed: November 30, 2015
    Publication date: June 1, 2017
    Inventors: Tung-Lin Tsai, I-Wen Huang, Bo-Wei Pan, Hsien-Ju Wu, Pei- Hua Wang
  • Publication number: 20170154807
    Abstract: According to an exemplary embodiment, a method of forming a semiconductor device is provided. The method includes: providing a vertical structure over a substrate; forming an etch stop layer over the vertical structure; forming an oxide layer over the etch stop layer; performing chemical mechanical polishing on the oxide layer and stopping on the etch stop layer; etching back the oxide layer and the etch stop layer to expose a sidewall of the vertical structure and to form an isolation layer; oxidizing the sidewall of the vertical structure and doping oxygen into the isolation layer by using a cluster oxygen doping treatment.
    Type: Application
    Filed: February 13, 2017
    Publication date: June 1, 2017
    Inventors: Cheng-Tung Lin, Teng-Chun Tsai, Li-Ting Wang, De-Fang Chen, Bing-Hung Chen, Huang-Yi Huang, Hui-Cheng Chang, Huan-Just Lin, Ming-Hsing Tsai
  • Patent number: 9667684
    Abstract: Systems and methods for saving encoded media streamed using adaptive bitrate streaming in accordance with embodiments of the invention are disclosed. In one embodiment of the invention, a playback device configured to perform adaptive bitrate streaming of media includes a video decoder application and a processor, where the video decoder application configures the processor to select a download stream from a set of alternative streams of video data, measure streaming conditions and request a stream of video data from the alternative streams of video data, receive portions of video data from the requested stream of video data, decode the received video data, save the received video data to memory, when the received video data is from the download stream and separately download and save the corresponding portion of video data from the download stream to memory, when the received video data is not from the download stream.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: May 30, 2017
    Assignee: Sonic IP, Inc.
    Inventors: Ben Ziskind, Song Cen, Tung Lin, Jason Braness, Kourosh Soroushian
  • Patent number: 9657757
    Abstract: Some embodiments of the present disclosure provide a method of dissipating process exhaust from a chamber. The method includes conveying the process exhaust from the chamber through an inner tube of a pipeline to abatement. The process exhaust has a first temperature while exiting the chamber, and a second temperature while exiting the pipeline. The method maintains an outer tube of the pipeline at a vacuum state by a pump such that the inner tube is substantially thermal isolated from the atmosphere outside the pipeline. The second temperature is negative offset from the first temperature within a predetermined value.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: May 23, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tung-Lin Yang, Chun-Hung Chang, Rouh Jier Wang
  • Publication number: 20170128897
    Abstract: A nail polish shaker is disclosed. In the nail polish shaker, a support member supporting a nail polish bottle is driven by a motor to move upward and downward for shaking the nail polish bottle, so as to uniformly mix the nail polish contained in the nail polish bottle. In addition, the support member can be rotated leftward or rightward by a desired angle, to facilitate take or place the nail polish bottle.
    Type: Application
    Filed: March 17, 2016
    Publication date: May 11, 2017
    Inventor: Tung-Lin LU
  • Patent number: 9624576
    Abstract: Systems and methods are provided for contact formation. A semiconductor structure is provided. The semiconductor structure includes an opening formed by a bottom surface and one or more side surfaces. A first conductive material is formed on the bottom surface and the one or more side surfaces to partially fill the opening, the first conductive material including a top portion and a bottom portion. Ion implantation is formed on the first conductive material, the top portion of the first conductive material being associated with a first ion density, the bottom portion of the first conductive material being associated with a second ion density lower than the first ion density. At least part of the top portion of the first conductive material is removed. A second conductive material is formed to fill the opening.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: April 18, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chi-Yuan Chen, Li-Ting Wang, Teng-Chun Tsai, Chun-I Tsai, Wei-Jung Lin, Huang-Yi Huang, Cheng-Tung Lin, Hong-Mao Lee
  • Patent number: 9614054
    Abstract: According to an exemplary embodiment, a method of forming a vertical device is provided. The method includes: providing a protrusion over a substrate; forming an etch stop layer over the protrusion; laterally etching a sidewall of the etch stop layer; forming an insulating layer over the etch stop layer; forming a film layer over the insulating layer and the etch stop layer; performing chemical mechanical polishing on the film layer and exposing the etch stop layer; etching a portion of the etch stop layer to expose a top surface of the protrusion; forming an oxide layer over the protrusion and the film layer; and performing chemical mechanical polishing on the oxide layer and exposing the film layer.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: April 4, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: De-Fang Chen, Teng-Chun Tsai, Cheng-Tung Lin, Li-Ting Wang, Chun-Hung Lee, Ming-Ching Chang, Huan-Just Lin
  • Patent number: 9577093
    Abstract: According to an exemplary embodiment, a method of forming a semiconductor device is provided. The method includes: providing a vertical structure over a substrate; forming an etch stop layer over the vertical structure; forming an oxide layer over the etch stop layer; performing chemical mechanical polishing on the oxide layer and stopping on the etch stop layer; etching back the oxide layer and the etch stop layer to expose a sidewall of the vertical structure and to form an isolation layer; oxidizing the sidewall of the vertical structure and doping oxygen into the isolation layer by using a cluster oxygen doping treatment.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: February 21, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Cheng-Tung Lin, Teng-Chun Tsai, Li-Ting Wang, De-Fang Chen, Bing-Hung Chen, Huang-Yi Huang, Hui-Cheng Chang, Huan-Just Lin, Ming-Hsing Tsai
  • Patent number: 9541967
    Abstract: A hard disk includes a first cover member including a first cover plate and a pair of first lateral walls extended from edges of thereof, each of the first lateral wall is formed with a support piece and a latch hook respectively protruded towards inward, the support piece and the latch hook are not arranged at same horizontal level in a direction perpendicular to the first cover plate; a second cover member, disposed at the outer side of the first cover member and engaged with the first cover member; and a storage module, accommodated inside the first cover member and including a circuit board having edges thereof clamped between distal ends of the latch hooks and the support pieces. Accordingly, the assembly can be easily achieved through fastening the storage module in the first cover member then sleeving the first cover member and the second cover member.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: January 10, 2017
    Assignee: CompTake Technology Inc.
    Inventors: Wei-Hau Chen, Tung-Lin Liu
  • Patent number: 9520296
    Abstract: According to an exemplary embodiment, a method of forming vertical structures is provided. The method includes the following operations: providing a substrate; forming a first oxide layer over the substrate; forming a first dummy layer over the first oxide layer; etching the first oxide layer and the first dummy layer to form a recess; forming a second dummy layer in the recess (and further performing CMP on the second dummy layer and stop on the first dummy layer); removing the first dummy layer; removing the first oxide layer; and etching the substrate to form the vertical structure. According to an exemplary embodiment, a semiconductor device is provided. The semiconductor device includes: a substrate; an STI embedded in the substrate; and a vertical transistor having a source substantially aligned with the STI.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: December 13, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: De-Fang Chen, Teng-Chun Tsai, Cheng-Tung Lin, Li-Ting Wang, Chih-Tang Peng
  • Patent number: 9510462
    Abstract: A method for fabricating a circuit board structure is provided. The method includes providing a first circuit board and a second circuit board, wherein the area of the second circuit board is less than the area of the first circuit board. The first circuit board and the second circuit board are combined by a surface mount technology to form the circuit board structure having a portion with a different number of layers.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: November 29, 2016
    Assignee: QUANTA COMPUTER INC.
    Inventors: Tung-Lin Chuang, Chi-Yi Yen
  • Patent number: 9504540
    Abstract: A dental prosthesis includes an implanting end, a coupling end, and a screw portion between the implanting end and the coupling end. The dental prosthesis further includes a positioning marker portion located adjacent to the coupling end of the dental prosthesis. The dental prosthesis can be precisely located in an alveolar bone of a patient. A dental implant includes the dental prosthesis and an abutment. The abutment includes a prosthesis coupling end. The prosthesis coupling end of the abutment is coupled to the coupling end of the dental prosthesis.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: November 29, 2016
    Assignee: Metal Industries Research & Development Centre
    Inventors: Tung-Lin Tsai, Bo-Wei Pan, Yi-Chin Chen, Pei-Hua Wang
  • Patent number: 9508716
    Abstract: Semiconductor devices and methods of manufacture thereof are disclosed. In some embodiments, a method of manufacturing a semiconductor device includes providing a workpiece including an n-type field effect transistor (N-FET) region, a p-type FET (P-FET) region, and an insulating material disposed over the N-FET region and the P-FET region. The method includes patterning the insulating material to expose a portion of the N-FET region and a portion of the P-FET region, and forming an oxide layer over the exposed portion of the N-FET region and the exposed portion of the P-FET region. The oxide layer over the P-FET region is altered, and a metal layer is formed over a portion of the N-FET region and the P-FET region. The workpiece is annealed to form a metal-insulator-semiconductor (MIS) tunnel diode over the N-FET region and a silicide or germinide material over the P-FET region.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: November 29, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Tung Lin, Teng-Chun Tsai, Li-Ting Wang, Chi-Yuan Chen, Kuo-Yin Lin, Wan-Chun Pan, Ming-Liang Yen, Ching-Wei Tsai, Kuo-Cheng Ching, Huicheng Chang, Chih-Hao Wang
  • Publication number: 20160329461
    Abstract: The invention provides an LED including a first-type semiconductor layer, an emitting layer, a second-type semiconductor layer, a first electrode, a second electrode, a Bragg reflector structure, a conductive layer and insulation patterns. The first electrode and the second electrode are located on the same side of the Bragg reflector structure. The conductive layer is disposed between the Bragg reflector structure and the second-type semiconductor layer. The insulation patterns are disposed between the conductive layer and the second-type semiconductor layer. Each insulating layer has a first surface facing toward the second-type semiconductor layer, a second surface facing away from the second-type semiconductor layer, and an inclined surface. The inclined surface connects the first surface and the second surface and is inclined with respect to the first surface and the second surface.
    Type: Application
    Filed: April 22, 2016
    Publication date: November 10, 2016
    Inventors: Yi-Ru Huang, Tung-Lin Chuang, Yan-Ting Lan, Sheng-Tsung Hsu, Chih-Ming Shen, Jing-En Huang, Teng-Hsien Lai, Hung-Chuan Mai, Kuan-Chieh Huang, Shao-Ying Ting, Cheng-Pin Chen, Wei-Chen Chien, Chih-Chin Cheng, Chih-Hung Tseng
  • Patent number: 9482250
    Abstract: A packing set includes a stop block and a packing. The stop block is penetrated by and installed with an abutment device and the packing includes a main body and a packing kit. Both ends of the main body extend downward with a protruding part. Each protruding part has a transverse rib stretching outward from the side thereof and the other end of the transverse rib has a vertical rib extending perpendicularly. The main body has a screw for placing the packing kit. The packing kit includes a stud that penetrates the screw. The stud has an operating rod installed in one end and an abutment board installed in the other end. The stop block can be installed in both sides of any water retaining column and is used as a clamp incorporated with the packing for performing the packing action on the gate boards.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: November 1, 2016
    Inventor: Tung-Lin Wu
  • Patent number: 9478631
    Abstract: Structures and methods are provided for forming bottom source/drain contact regions for nanowire devices. A nanowire is formed on a substrate. The nanowire extends substantially vertically relative to the substrate and is disposed between a top source/drain region and a bottom source/drain region. A first dielectric material is formed on the bottom source/drain region. A second dielectric material is formed on the first dielectric material. A first etching process is performed to remove part of the first dielectric material and part of the second dielectric material to expose part of the bottom source/drain region. A second etching process is performed to remove part of the first dielectric material under the second dielectric material to further expose the bottom source/drain region. A first metal-containing material is formed on the exposed bottom source/drain region. Annealing is performed to form a bottom contact region.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: October 25, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Cheng-Tung Lin, Teng-Chun Tsai, Li-Ting Wang, De-Fang Chen, Chih-Tang Peng, Hung-Ta Lin, Chien-Hsun Wang, Huang-Yi Huang
  • Patent number: 9474735
    Abstract: A pharmaceutical preparation containing polymeric compounds as shown in the specification. This preparation can be used to improve liver function and treat liver disease, and promoting liver tissue regeneration.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: October 25, 2016
    Assignee: Industrial Technology Research Institute (ITRI)
    Inventors: Shau-Feng Chang, Chun-Hsien Ma, Kuo-Yi Yang, Chien-Tung Lin, Shyh-Horng Lin, Kai-Wen Huang
  • Patent number: 9460956
    Abstract: According to an exemplary embodiment, a semiconductor device is provided. The semiconductor device includes: a substrate; a first vertical structure protruding from the substrate; a second vertical structure protruding from the substrate; an STI between the first vertical structure and the second vertical structure; wherein a first horizontal width between the first vertical structure and the STI is substantially the same as a second horizontal width between the second vertical structure and the STI.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: October 4, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: De-Fang Chen, Teng-Chun Tsai, Ching-Feng Fu, Cheng-Tung Lin, Li-Ting Wang, Chih-Tang Peng
  • Publication number: 20160273541
    Abstract: Some embodiments of the present disclosure provide a method of dissipating process exhaust from a chamber. The method includes conveying the process exhaust from the chamber through an inner tube of a pipeline to abatement. The process exhaust has a first temperature while exiting the chamber, and a second temperature while exiting the pipeline. The method maintains an outer tube of the pipeline at a vacuum state by a pump such that the inner tube is substantially thermal isolated from the atmosphere outside the pipeline. The second temperature is negative offset from the first temperature within a predetermined value.
    Type: Application
    Filed: March 16, 2015
    Publication date: September 22, 2016
    Inventors: TUNG-LIN YANG, CHUN-HUNG CHANG, ROUH JIER WANG