Patents by Inventor Ward Parkinson

Ward Parkinson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100091561
    Abstract: A memory element, a threshold switching element, or the series combination of a memory element and a threshold switching element may be used for coupling conductive lines in an electrically programmable matrix array. Leakage may be reduced by optionally placing a breakdown layer in series with the phase-change material and/or threshold switching material between the conductive lines. The matrix array may be used in a programmable logic device.
    Type: Application
    Filed: December 17, 2009
    Publication date: April 15, 2010
    Inventors: Tyler Lowrey, Ward Parkinson, Guy Wicker
  • Patent number: 7692958
    Abstract: A phase change memory cells including a memory element or a threshold device is read using a read current which does not threshold either the memory element or the threshold device in the case of both a set and a reset memory element. As a result, higher currents may be avoided, increasing read endurance. A sensing circuit includes a charging rate detector coupled to a selected address line and sensing a rate of change of a voltage on the selected address line.
    Type: Grant
    Filed: August 31, 2007
    Date of Patent: April 6, 2010
    Assignee: STMicroelectronics S.r.l.
    Inventor: Ward Parkinson
  • Patent number: 7684225
    Abstract: An array of non-volatile memory cells arranged in logical columns and logical rows, and associated circuitry to enable reading or writing one or more memory cells on a row in parallel. In some embodiments, the array of memory cells may include a phase change material. In some embodiments, the circuitry may include a write driver, a read driver, a sense amplifier, and circuitry to isolate the memory cells from the sense amplifier with extended refresh. In some embodiments, the circuitry may further include shift registers and one or more arithmetic logic units to provide a video memory.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: March 23, 2010
    Assignee: Ovonyx, Inc.
    Inventor: Ward Parkinson
  • Publication number: 20100020595
    Abstract: A memory employs a low-level current source to access a phase change memory cell. The current source charges an access capacitor in order to store sufficient charge for an ensuing access. When a memory cell is accessed, charge stored on the capacitor is discharged through the phase change memory, supplying a current to the phase change memory cell that is sufficient for the intended access operation and greater than that provided directly by the current source.
    Type: Application
    Filed: October 6, 2009
    Publication date: January 28, 2010
    Inventors: Ward Parkinson, Tyler Lowrey
  • Publication number: 20100012918
    Abstract: A three-dimensional memory array formed of one or more two-dimensional memory arrays of one-time programmable memory elements arranged in horizontal layers and stacked vertically upon one another; and a two-dimensional memory array of reprogrammable phase change memory elements stacked on the one or more two-dimensional memory arrays as the top layer of the three-dimensional memory array.
    Type: Application
    Filed: September 23, 2009
    Publication date: January 21, 2010
    Inventor: Ward Parkinson
  • Publication number: 20100009522
    Abstract: A three-dimensional memory array formed of one or more two-dimensional memory arrays of one-time programmable memory elements arranged in horizontal layers and stacked vertically upon one another; and a two-dimensional memory array of reprogrammable phase change memory elements stacked on the one or more two-dimensional memory arrays as the top layer of the three-dimensional memory array.
    Type: Application
    Filed: September 22, 2009
    Publication date: January 14, 2010
    Inventor: Ward Parkinson
  • Patent number: 7646626
    Abstract: An array of non-volatile memory cells arranged in logical columns and logical rows, and associated circuitry to enable reading or writing one or more memory cells on a row in parallel. In some embodiments, the array of memory cells may include a phase change material. In some embodiments, the circuitry may include a write driver, a read driver, a sense amplifier, and circuitry to isolate the memory cells from the sense amplifier with extended refresh.
    Type: Grant
    Filed: March 3, 2008
    Date of Patent: January 12, 2010
    Assignee: Ovonyx, Inc.
    Inventors: Ward Parkinson, Yukio Fuji
  • Patent number: 7646630
    Abstract: A memory element, a threshold switching element, or the series combination of a memory element and a threshold switching element may be used for coupling conductive lines in an electrically programmable matrix array. Leakage may be reduced by optionally placing a breakdown layer in series with the phase-change material and/or threshold switching material between the conductive lines. The matrix array may be used in a programmable logic device.
    Type: Grant
    Filed: August 22, 2005
    Date of Patent: January 12, 2010
    Assignee: Ovonyx, Inc.
    Inventors: Tyler Lowrey, Ward Parkinson, Guy Wicker
  • Publication number: 20090310402
    Abstract: A thin-film memory may include a thin-film transistor-free address decoder in conjunction with thin-film memory elements to yield an all-thin-film memory. Such a thin-film memory excludes all single-crystal electronic devices and may be formed, for example, on a low-cost substrate, such as fiberglass, glass or ceramic. The memory may be configured for operation with an external memory controller.
    Type: Application
    Filed: June 17, 2008
    Publication date: December 17, 2009
    Inventor: Ward Parkinson
  • Publication number: 20090244962
    Abstract: Disturb from the reset to the set state may be reduced by creating an amorphous phase that is substantially free of crystal nuclei when programming the reset state in a phase change memory. In some embodiments, this can be achieved by using a current or a voltage to program that exceeds the threshold voltage of the phase change memory element, but does not exceed a safe current voltage which would cause a disturb.
    Type: Application
    Filed: March 31, 2008
    Publication date: October 1, 2009
    Inventors: George Gordon, Semyon D. Savransky, Ward Parkinson, Sergey A. Kostylev, James Reed, Tyler Lowrey, Ilya V. Karpov, Gianpaolo Spadini
  • Publication number: 20090213645
    Abstract: A memory is configurable among a plurality of operational modes and types of interfaces. The operational modes may dictate the number of storage levels to be associated with each cell within the memory's storage matrix. Individual operational modes may be matched to individual interfaces, operated one at a time or in parallel.
    Type: Application
    Filed: March 13, 2008
    Publication date: August 27, 2009
    Inventors: Ward Parkinson, Stefan Lai
  • Publication number: 20090213644
    Abstract: A memory is configurable among a plurality of operational modes. The operational modes may dictate the number of storage levels to be associated with each cell within the memory's storage matrix.
    Type: Application
    Filed: February 26, 2008
    Publication date: August 27, 2009
    Inventor: Ward Parkinson
  • Publication number: 20090207645
    Abstract: A bidirectional memory cell includes an ovonic threshold switch (OTS) and a bidirectional memory element. The OTS is configured to select the bidirectional memory element and to prevent inadvertent accesses to the memory element.
    Type: Application
    Filed: February 20, 2008
    Publication date: August 20, 2009
    Inventor: Ward Parkinson
  • Publication number: 20090116280
    Abstract: A memory employs a low-level current source to access a phase change memory cell. The current source charges an access capacitor in order to store sufficient charge for an ensuing access. When a memory cell is accessed, charge stored on the capacitor is discharged through the phase change memory, supplying a current to the phase change memory cell that is sufficient for the intended access operation and greater than that provided directly by the current source.
    Type: Application
    Filed: November 7, 2007
    Publication date: May 7, 2009
    Inventors: Ward Parkinson, Tyler Lowrey
  • Patent number: 7499315
    Abstract: A chalcongenide material is proposed for programming the cross-connect transistor coupling interconnect lines of an electrically programmable matrix array. Leakage may be reduced by optionally placing a thin insulating breakdown layer in series with the select device or a phase change material. The matrix array may be used in a programmable logic device.
    Type: Grant
    Filed: December 24, 2005
    Date of Patent: March 3, 2009
    Assignee: Ovonyx, Inc.
    Inventors: Tyler Lowrey, Ward Parkinson, Guy Wicker
  • Publication number: 20090034325
    Abstract: A chalcogenide material is proposed for programming the cross-connect transistor coupling interconnect lines of an electrically programmable matrix array. Leakage may be reduced by optionally placing a thin insulating breakdown layer in series with the select device or a phase change material. The matrix array may be used in a programmable logic device.
    Type: Application
    Filed: October 2, 2008
    Publication date: February 5, 2009
    Inventors: Tyler Lowrey, Ward Parkinson, Guy Wicker
  • Patent number: 7466584
    Abstract: An electronic system includes a control device in combination with an ovonic threshold switch (OTS). The control device, which may be a field effect transistor, a bipolar junction transistor, or a three-terminal ovonic threshold switch, for example, is configured to trigger the OTS. The OTS, a high current-density device, may be configured to drive greater loads than the control device itself would be capable of driving.
    Type: Grant
    Filed: January 2, 2008
    Date of Patent: December 16, 2008
    Assignee: Ovonyx, Inc.
    Inventors: Ward Parkinson, John Peters
  • Publication number: 20080225625
    Abstract: An array of non-volatile memory cells arranged in logical columns and logical rows, and associated circuitry to enable reading or writing one or more memory cells on a row in parallel. In some embodiments, the array of memory cells may include a phase change material. In some embodiments, the circuitry may include a write driver, a read driver, a sense amplifier, and circuitry to isolate the memory cells from the sense amplifier with extended refresh.
    Type: Application
    Filed: March 3, 2008
    Publication date: September 18, 2008
    Inventors: Ward Parkinson, Yukio Fuji
  • Publication number: 20080211539
    Abstract: A phase-change material is proposed for coupling interconnect lines an electrically programmable matrix array. Leakage may be reduced by optionally placing a thin insulating breakdown layer between the phase change material and at least one of the lines. The matrix array may be used in a programmable logic device. The logic portions of the programmable logic device may be tri-stated.
    Type: Application
    Filed: February 6, 2008
    Publication date: September 4, 2008
    Inventor: Ward Parkinson
  • Patent number: 7391664
    Abstract: An array of non-volatiel memory cells arranged in logical columns and logical rows, and associated circuitry to enable reading or writing one or more memory cells on a row in parallel. In some embodiments, the array of memory cells may include a phase change material. In some embodiments, the circuitry may include a write driver, a read driver, a sense amplifier, and circuitry to isolate the memory cells from the sense amplifier with extended refresh.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: June 24, 2008
    Assignee: Ovonyx, Inc.
    Inventors: Ward Parkinson, Yukio Fuji