Patents by Inventor Wei Lu
Wei Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240119862Abstract: A method, computer system, and a computer program product for syllable-based pronunciation help are provided. An input text in a first language may be received. A selection of a target language that is different from the first language may be received. From the target language, syllables with a pronunciation most closely matching a pronunciation of the input text in the first language are obtained. The obtaining is based on a comparison of one or more spectrograms for the input text with one or more spectrograms for text of the target language. The obtained syllables in the target language are presented.Type: ApplicationFiled: September 28, 2022Publication date: April 11, 2024Inventors: Wei Jun Zheng, Xiao Xia Mao, QING LU, Yuan Jin, Xiao Feng Ji
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Patent number: 11951589Abstract: A chemical mechanical polishing system includes a platen to hold a polishing pad, a carrier head to hold a substrate against a polishing surface of the polishing pad, and a controller. The polishing pad has a polishing control groove. The carrier is laterally movable by a first actuator across the polishing pad and rotatable by a second actuator. The controller synchronizes lateral oscillation of the carrier head with rotation of the carrier head such that over a plurality of successive oscillations of the carrier head such that when a first angular swath of an edge portion of the substrate is at an azimuthal angular position about an axis of rotation of the carrier head the first angular swath overlies the polishing surface and when a second angular swath of the edge portion of the substrate is at the azimuthal angular position the second angular swath overlies the polishing control groove.Type: GrantFiled: November 19, 2020Date of Patent: April 9, 2024Assignee: Applied Materials, Inc.Inventors: Jimin Zhang, Jianshe Tang, Brian J. Brown, Wei Lu, Priscilla Diep
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Patent number: 11955459Abstract: A package structure is provided. The package structure includes a first die and a second die, a dielectric layer, a bridge, an encapsulant, and a redistribution layer structure. The dielectric layer is disposed on the first die and the second die. The bridge is electrically connected to the first die and the second die, wherein the dielectric layer is spaced apart from the bridge. The encapsulant is disposed on the dielectric layer and laterally encapsulating the bridge. The redistribution layer structure is disposed over the encapsulant and the bridge. A top surface of the bridge is in contact with the RDL structure.Type: GrantFiled: March 7, 2022Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shu-Hang Liao, Chih-Wei Wu, Jing-Cheng Lin, Szu-Wei Lu, Ying-Ching Shih
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Patent number: 11951864Abstract: A charging station monitoring system including: a sensing device, a digital camera and a communication device which are arranged at a charging apparatus of a charging station, the sensing device and the digital camera each having a sensing range covering a parking lot associated with the charging apparatus and an area around the parking lot; a controller configured to determine an occupation state of the parking lot and/or detect and record an action of a third party or foreign object based on sensed information from the sensing device and the digital camera; and a charging assistance device configured to recommend an environmentally friendly charging station if an energy storage device of the electric vehicle has not been fully charged and needs to be further charged.Type: GrantFiled: September 28, 2021Date of Patent: April 9, 2024Assignee: Volvo Car CorporationInventors: Wei Li, Huapeng Lu, Xuming Yao, Youjia Zhou, Jie Lei
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Patent number: 11957022Abstract: A display panel includes a first base substrate, a plurality of light sources on the first base substrate, a second base substrate opposite to the first base substrate, a light conversion structure on the second base substrate, a plurality of extinction structures on a side of the light conversion structure facing the first base substrate, a first channel formed between any two adjacent extinction structures, a plurality of first optical structures on a side of the light conversion structure facing the first base substrate, wherein the plurality of first optical structures are respectively located in the first channels each between any two adjacent extinction structures, and a filler portion between the plurality of light sources and the plurality of first optical structures. The filler portion contains a material with a refractive index greater than that of a material of the first optical structure, and the extinction structure contains light-absorbing material.Type: GrantFiled: June 25, 2021Date of Patent: April 9, 2024Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Dejiang Zhao, Wei Huang, Yang Li, Yu Tian, Tianhao Lu, Qian Jin
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Publication number: 20240113195Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of first nanostructures formed over a substrate, and a dielectric wall adjacent to the first nanostructures. The semiconductor structure also includes a first liner layer between the first nanostructures and the dielectric wall, and the first liner layer is in direct contact with the dielectric wall. The semiconductor structure also includes a gate structure surrounding the first nanostructures, and the first liner layer is in direct contact with a portion of the gate structure.Type: ApplicationFiled: February 22, 2023Publication date: April 4, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jia-Ni YU, Lung-Kun CHU, Chun-Fu LU, Chung-Wei HSU, Mao-Lin HUANG, Kuo-Cheng CHIANG, Chih-Hao WANG
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Publication number: 20240112880Abstract: Provided is a method of ion beam processing based on optical microscopy imaging, including: marking a surface of a sample using the ion beam, so as obtain a registration reference pattern; performing a three-dimensional optical imaging on the sample to obtain a first three-dimensional light microscopy image; projecting the first three-dimensional light microscopy image to a cutting angle of the ion beam, and determining a first position of a to-be-researched target in the first three-dimensional light microscopy image based on the registration reference pattern; performing an ion beam imaging on the sample to obtain an image excited by the ion beam, and determining, according to the first position, a second position of the to-be-researched target in the image excited by the ion beam; and thinning the sample according to the second position to obtain a first slice containing the to-be-researched target.Type: ApplicationFiled: June 14, 2023Publication date: April 4, 2024Inventors: Tao XU, Wei JI, Weixing LI, Jing LU, Ke XIAO
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Publication number: 20240113061Abstract: An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.Type: ApplicationFiled: December 5, 2023Publication date: April 4, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Mei-Ju LU, Chi-Han CHEN, Chang-Yu LIN, Jr-Wei LIN, Chih-Pin HUNG
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Publication number: 20240110965Abstract: The present application discloses an insulation sampling circuit. The insulation sampling circuit includes: a first sampling circuit composed of a first sampling module, a first resistor, and a first switch module; a second sampling circuit composed of a second sampling module, a second resistor, and a second switch module; and a voltage withstand module. The first resistor is connected in parallel to the first sampling module; the first switch module is configured to control the first sampling module and/or the first resistor to be connected between a positive bus and a ground wire; the second resistor is connected in parallel to the second sampling module; the second switch module is configured to control the second sampling module and/or the second resistor to be connected between a negative bus and the ground wire; and the voltage withstand module is disposed on the ground wire to disconnect the ground wire.Type: ApplicationFiled: December 4, 2023Publication date: April 4, 2024Inventors: Xingchang WANG, Wei TIAN, Zhiwei YAN, Hang MA, Fangyou LU
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Publication number: 20240113234Abstract: An integrated chip including a gate layer. An insulator layer is over the gate layer. A channel structure is over the insulator layer. A pair of source/drains are over the channel structure and laterally spaced apart by a dielectric layer. The channel structure includes a first channel layer between the insulator layer and the pair of source/drains, a second channel layer between the insulator layer and the dielectric layer, and a third channel layer between the second channel layer and the dielectric layer. The first channel layer, the second channel layer, and the third channel layer include different semiconductors.Type: ApplicationFiled: January 4, 2023Publication date: April 4, 2024Inventors: Ya-Yun Cheng, Wen-Ling Lu, Yu-Chien Chiu, Chung-Wei Wu, Zhiqiang Wu
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Publication number: 20240114703Abstract: A package structure and a formation method are provided. The method includes providing a semiconductor substrate and bonding a first chip structure on the semiconductor substrate through metal-to-metal bonding and dielectric-to-dielectric bonding. The method also includes bonding a second chip structure over the semiconductor substrate through solder-containing bonding structures. The method further includes forming a protective layer surrounding the second chip structure. A portion of the protective layer is between the semiconductor substrate and a bottom of the second chip structure.Type: ApplicationFiled: February 2, 2023Publication date: April 4, 2024Inventors: Tsung-Fu TSAI, Szu-Wei LU, Shih-Peng TAI, Chen-Hua YU
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Patent number: 11949591Abstract: The present disclosure provides a method (100) in a network node advertising a Binding Segment Identifier, BSID. The method (100) includes: receiving (110) a first echo request packet containing a first target Forwarding Equivalence Class, FEC, stack including an FEC associated with the BSID; and transmitting (120), in response to a Time To Live, TTL, expiration associated with the first echo request packet, a first echo reply packet to an initiating network node initiating the first echo request packet, the first echo reply packet containing an indicator indicating that the FEC is to be replaced by a set of FECs.Type: GrantFiled: September 9, 2019Date of Patent: April 2, 2024Assignee: Telefonaktiebolaget LM Ericsson (publ)Inventors: Ying Lu, Shuo Yang, Wei Sun, Jinfeng Zhao, Yun Lin
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Patent number: 11947923Abstract: Implementations relate to managing multimedia content that is obtained by large language model(s) (LLM(s)) and/or generated by other generative model(s). Processor(s) of a system can: receive natural language (NL) based input that requests multimedia content, generate a response that is responsive to the NL based input, and cause the response to be rendered. In some implementations, and in generating the response, the processor(s) can process, using a LLM, LLM input to generate LLM output, and determine, based on the LLM output, at least multimedia content to be included in the response. Further, the processor(s) can evaluate the multimedia content to determine whether it should be included in the response. In response to determining that the multimedia content should not be included in the response, the processor(s) can cause the response, including alternative multimedia content or other textual content, to be rendered.Type: GrantFiled: November 27, 2023Date of Patent: April 2, 2024Assignee: GOOGLE LLCInventors: Sanil Jain, Wei Yu, Ágoston Weisz, Michael Andrew Goodman, Diana Avram, Amin Ghafouri, Golnaz Ghiasi, Igor Petrovski, Khyatti Gupta, Oscar Akerlund, Evgeny Sluzhaev, Rakesh Shivanna, Thang Luong, Komal Singh, Yifeng Lu, Vikas Peswani
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Patent number: 11948896Abstract: A package structure is provided. The package structure includes a through substrate via structure, a first stacked die package structure, an underfill layer, and a package layer. The through substrate via structure is formed over a substrate. The first stacked die package structure is over the through substrate via structure, wherein the first stacked die package structure comprises a plurality of memory dies. The underfill layer is over the first stacked die package structure. the package layer is over the underfill layer, wherein the package layer has a protruding portion that extends below a top surface of the through substrate via structure.Type: GrantFiled: July 26, 2022Date of Patent: April 2, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Fu Tsai, Kung-Chen Yeh, I-Ting Huang, Shih-Ting Lin, Szu-Wei Lu
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Patent number: 11948930Abstract: A method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. First connectors are formed over the set of through-vias on a first side of the substrate. The first side of the substrate is attached to a carrier. The substrate is thinned from the second side to expose the set of through-vias. Second connectors are formed over the set of through-vias on the second side of the substrate. A device die is bonded to the second connectors. The substrate is singulated into multiple packages.Type: GrantFiled: November 13, 2020Date of Patent: April 2, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chin-Chuan Chang, Szu-Wei Lu, Chen-Hua Yu
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Publication number: 20240105444Abstract: Methods for reducing contact resistance include performing a selective titanium silicide (TiSi) deposition process on a middle of the line (MOL) contact structure that includes a cavity in a substrate of dielectric material. The contact structure also includes a silicon-based connection portion at a bottom of the cavity. The selective TiSi deposition process is selective to silicon-based material over dielectric material. The methods also include performing a selective deposition process of a metal material on the MOL contact structure. The selective deposition process is selective to TiSi material over dielectric material and forms a silicide capping layer on the silicon-based connection portion. The methods further include performing a seed layer deposition process of the metal material on the contact structure.Type: ApplicationFiled: April 26, 2023Publication date: March 28, 2024Inventors: Jiang LU, Liqi WU, Wei DOU, Weifeng YE, Shih Chung CHEN, Rongjun WANG, Xianmin TANG, Yiyang WAN, Shumao ZHANG, Jianqiu GUO
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Publication number: 20240107414Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for switching a secondary cell to a primary cell. A user equipment (UE) monitors a first radio condition of the UE for beams of a primary cell and a second radio condition for beams of one or more secondary cells configured for the UE in carrier aggregation. The UE transmits a request to configure a candidate beam of at least one candidate secondary cell as a new primary cell in response to the first radio condition not satisfying a first threshold and the second radio condition for the at least one candidate secondary cell satisfying a second threshold. A base station determines to reconfigure at least one secondary cell as the new primary cell. The base station and the UE perform a handover of the UE to the new primary cell.Type: ApplicationFiled: September 23, 2022Publication date: March 28, 2024Inventors: Yu-Chieh HUANG, Kuhn-Chang LIN, Jen-Chun CHANG, Wen-Hsin HSIA, Chia-Jou LU, Sheng-Chih WANG, Chenghsin LIN, Yeong Leong CHOO, Chun-Hsiang CHIU, Chihhung HSIEH, Kai-Chun CHENG, Chung Wei LIN
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Publication number: 20240107628Abstract: Method, device and computer program product for wireless communication are provided. A method includes: receiving, by a wireless communication terminal, a first release message; and releasing, by the wireless communication terminal, at least one small data transmission, SDT, configuration stored in the wireless communication terminal according to a cell where the first release message is received or according to information of SDT configuration carried by the first release message.Type: ApplicationFiled: October 5, 2023Publication date: March 28, 2024Applicant: ZTE CORPORATIONInventors: Wei MA, Hongjun LIU, Boshan ZHANG, Wu WEN, Dongmei LI, Zijiang MA, Chen LU
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Publication number: 20240107804Abstract: A display substrate and a display device are provided. The display substrate includes a display region including light emitting units; the light emitting units are arranged into light emitting unit rows, and the light emitting units in one of the light emitting unit rows are arranged along a first direction; the light emitting units include first light emitting units. In at least part of the display region: distances, in the first direction, between a light emitting region of one first light emitting unit and light emitting regions of two of the first light emitting units adjacent to the one first light emitting units are different, and/or distances, in a second direction, between a light emitting region of one first light emitting units and the light emitting regions of two of the first light emitting units adjacent to the one first light emitting units are different.Type: ApplicationFiled: May 31, 2021Publication date: March 28, 2024Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Mingwen WANG, Yao HUANG, Xingliang XIAO, Zhong LU, Yuan CHEN, Yamei ZHOU, Yu SONG, Wei HU, Fuqiang LIN
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Publication number: 20240105629Abstract: A semiconductor package includes a first semiconductor die, a second semiconductor die, a semiconductor bridge, an integrated passive device, a first redistribution layer, and connective terminals. The second semiconductor die is disposed beside the first semiconductor die. The semiconductor bridge electrically connects the first semiconductor die with the second semiconductor die. The integrated passive device is electrically connected to the first semiconductor die. The first redistribution layer is disposed over the semiconductor bridge. The connective terminals are disposed on the first redistribution layer, on an opposite side with respect to the semiconductor bridge. The first redistribution layer is interposed between the integrated passive device and the connective terminals.Type: ApplicationFiled: November 30, 2023Publication date: March 28, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hsuan Tsai, Chin-Chuan Chang, Szu-Wei Lu, Tsung-Fu Tsai