Patents by Inventor Wen Hung (Steven) Lu

Wen Hung (Steven) Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10790241
    Abstract: A wiring structure includes a conductive structure, a surface structure and at least one through via. The conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The surface structure is disposed adjacent to a top surface of the conductive structure. The through via extends through the surface structure and extending into at least a portion of the conductive structure.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: September 29, 2020
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wen Hung Huang, Yan Wen Chung, Huei-Shyong Cho
  • Patent number: 10788646
    Abstract: A lens driving apparatus is for driving a lens assembly and includes a base, a metal cover, a carrier, a first coil, at least one first magnet, at least one second magnet, a frame and a spring set. At least one lower leaf spring of the spring set includes a frame connecting section, a carrier connecting section and a resilient section. The carrier connecting section and the second magnet are arranged along the first direction. The carrier connecting section includes an opening portion and a shielding portion, and the opening portion and the shielding portion both corresponding to the second magnet along the first direction are respectively for a part of the second magnet to be exposed through the opening portion and another part of the second magnet to be shielded by the shielding portion.
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: September 29, 2020
    Assignee: LARGAN DIGITAL CO., LTD.
    Inventors: Te-Sheng Tseng, Wen-Hung Hsu, Yung-Chun Kang
  • Publication number: 20200303394
    Abstract: Provided is a semiconductor memory device including a substrate, an isolation structure, a first gate dielectric layer, a first conductive layer, a second gate dielectric layer, a second conductive layer, and a protective layer. The substrate has an array region and a periphery region. The isolation structure is disposed in the substrate between the array and periphery regions. The first gate dielectric layer is disposed on the substrate in the array region. The first conductive layer is disposed on the first gate dielectric layer. The second gate dielectric layer is disposed on the substrate in the periphery region. The second conductive layer is disposed on the second dielectric layer. The second conductive layer extends to cover a portion of a top surface of the isolation structure. The protective layer is disposed between the second conductive layer and the isolation structure.
    Type: Application
    Filed: March 20, 2019
    Publication date: September 24, 2020
    Applicant: Winbond Electronics Corp.
    Inventors: Wen Hung, Yu-Kai Liao, Chiang-Hung Chen
  • Publication number: 20200295233
    Abstract: A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first contact layer on the first semiconductor layer; a second contact layer on the second semiconductor layer, wherein the first contact layer and the second contact layer comprise a metal material other than gold (Au) or copper (Cu); a first pad on the semiconductor stack; a second pad on the semiconductor stack.
    Type: Application
    Filed: June 3, 2020
    Publication date: September 17, 2020
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Bo-Jiun HU, Tsung-Hsun CHIANG, Wen-Hung CHUANG, Kuan-Yi LEE, Yu-Ling LIN, Chien-Fu SHEN, Tsun-Kai KO
  • Publication number: 20200290179
    Abstract: A socket is provided, including a first member, a second member and a third member. The second member is movably inserted within the first member. The third member is movably sleeved with the first member.
    Type: Application
    Filed: March 13, 2019
    Publication date: September 17, 2020
    Inventor: WEN-HUNG CHIANG
  • Publication number: 20200286782
    Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A first conductive feature and a second conductive feature are provided. A first hard mask (HM) is formed on the first conductive feature. A patterned dielectric layer is formed over the first and the second conductive features, with first openings to expose the second conductive features. A first metal plug is formed in the first opening to contact the second conductive features. A second HM is formed on the first metal plugs and another patterned dielectric layer is formed over the substrate, with second openings to expose a subset of the first metal plugs and the first conductive features. A second metal plug is formed in the second openings.
    Type: Application
    Filed: May 21, 2020
    Publication date: September 10, 2020
    Inventors: Ming-Feng Shieh, Hung-Chang Hsieh, Wen-Hung Tseng
  • Patent number: 10770512
    Abstract: A stacked resistive random access memory (ReRAM) structure is provided. The stacked ReRAM structure includes a channel, a ReRAM cell sub-structure and a contact via sub-structure. The ReRAM cell structure includes ReRAM cell, drain, gate and source layers, which are insulated from one another and respectively disposed in operative contact with the channel. The contact via sub-structures includes first, second, third and fourth contact vias, which are separate from one another. The first contact via is disposed in exclusive operative contact with the ReRAM cell layer. The second contact via is disposed in exclusive operative contact with the drain layer. The third contact via is disposed in exclusive operative contact with the gate layer. The fourth contact via is disposed in exclusive operative contact with the source layer.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: September 8, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Reinaldo Vega, Takashi Ando, Hari Mallela, Li-Wen Hung
  • Patent number: 10766922
    Abstract: A compound and pharmaceutically acceptable salts thereof for treating cancer, having a structure represented by the following formula (I) or formula (II): in which X and Y each individually represent: R1, R2, R3, R4, and R5 individually represents hydrogen atom, acyl having 20 or less carbon atoms, alkyl having 20 or less carbon atoms, alkanoyl having 20 or less carbon atoms, aroyl having 20 or less carbon atoms, aryl having 20 or less carbon atoms, aralkyl having 20 or less carbon atoms, sulfonyl having 20 or less carbon atoms, phosphonyl having 20 or less carbon atoms, or haloacyl having 20 or less carbon atoms.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: September 8, 2020
    Assignee: AQUAVAN TECHNOLOGY CO., LTD.
    Inventors: Kuo-Tang Tseng, Hsin Ju Wang, Wen-Hung Chen
  • Publication number: 20200279804
    Abstract: A wiring structure includes an upper conductive structure, a lower conductive structure, an intermediate layer and at least one lower through via. The upper conductive structure includes at least one upper dielectric layer and at least one upper circuit layer in contact with the upper dielectric layer. The lower conductive structure includes at least one lower dielectric layer and at least one lower circuit layer in contact with the lower dielectric layer. The intermediate layer is disposed between the upper conductive structure and the lower conductive structure and bonds the upper conductive structure and the lower conductive structure together. The lower through via extends through at least a portion of the lower conductive structure and the intermediate layer, and is electrically connected to the upper circuit layer of the upper conductive structure.
    Type: Application
    Filed: February 28, 2019
    Publication date: September 3, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wen Hung HUANG, Huei-Shyong CHO, Jhao-Yang CHEN
  • Publication number: 20200279815
    Abstract: A wiring structure includes a conductive structure, a surface structure and at least one through via. The conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The surface structure is disposed adjacent to a top surface of the conductive structure. The through via extends through the surface structure and extending into at least a portion of the conductive structure.
    Type: Application
    Filed: February 28, 2019
    Publication date: September 3, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wen Hung HUANG, Yan Wen CHUNG, Huei-Shyong CHO
  • Publication number: 20200279683
    Abstract: An integrated driving module with energy conversion function includes a patterned conductive circuit layer, an integrated electromagnetic induction component layer, a second dielectric layer, an embedded electrical component and a conductive component. The integrated electromagnetic induction component layer, which has a plurality of conductive coil layer, a plurality of conductive connecting component and a first dielectric layer, is disposed on the patterned conductive circuit layer. The conductive coil layers are stacked. Each conductive connecting component is electrically connected between the two conductive coil layers and between the corresponding conductive coil layer and the patterned conductive circuit layer. The first dielectric layer covers the conductive coil layers and the conductive connecting components. The second dielectric layer covers the patterned conductive circuit layer.
    Type: Application
    Filed: May 20, 2020
    Publication date: September 3, 2020
    Inventors: Wen-Hung Hu, Tsung-Yueh Chen
  • Publication number: 20200279814
    Abstract: A wiring structure includes an upper conductive structure, a lower conductive structure, an intermediate layer and at least one through via. The upper conductive structure includes at least one upper dielectric layer and at least one upper circuit layer in contact with the upper dielectric layer. The lower conductive structure includes at least one lower dielectric layer and at least one lower circuit layer in contact with the lower dielectric layer. The intermediate layer is disposed between the upper conductive structure and the lower conductive structure and bonds the upper conductive structure and the lower conductive structure together. The through via extends through the upper conductive structure, the intermediate layer and the lower conductive structure.
    Type: Application
    Filed: February 28, 2019
    Publication date: September 3, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wen Hung HUANG, Meng-Kai SHIH, Wei-Hong LAI, Wei Chu SUN
  • Publication number: 20200279976
    Abstract: A light-emitting device comprises a semiconductor structure comprising a surface and a side wall inclined to the surface, wherein the semiconductor structure comprises a first semiconductor layer, a second semiconductor layer on the first semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, and the second semiconductor layer comprises a first edge and a first area; a reflective layer located on the second semiconductor layer and comprising an outer edge and a second area, wherein a distance between the first edge and the outer edge is greater than 0 ?m and is not greater than 10 ?m; and a first contact part comprising a metal formed on the reflective layer and the first semiconductor layer, wherein the first contact part comprises a first periphery comprising a first periphery length larger than a periphery length of the active layer from a top-view of the light-emitting device.
    Type: Application
    Filed: May 19, 2020
    Publication date: September 3, 2020
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Wen-Hung CHUANG, Tzu-Yao TSENG, Cheng-Lin LU
  • Patent number: 10763357
    Abstract: A semiconductor device includes a substrate, a first dielectric layer on the substrate, a hard mask layer on the first dielectric layer, a trench in the hard mask layer and the first dielectric layer, a first source/drain electrode layer on a sidewall of the trench, a second dielectric layer on the first source/drain electrode layer in the trench, a second source/drain electrode layer on the second dielectric layer in the trench, a third dielectric layer on the second source/drain electrode layer in the trench, an ILD layer overlying the trench, an nFET disposed over the trench, and a pFET disposed over the trench and spaced apart from the nFET.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: September 1, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventor: Ching-Wen Hung
  • Publication number: 20200271945
    Abstract: A lens driving module includes a holder, a cover, a carrier, at least one first magnet, a first coil, at least two second magnets, at least one first sensor and at least one second sensor. The holder includes an opening hole. The cover is made of metal material and coupled to the holder. The carrier is movably disposed in the cover and for coupling to a lens. The first magnet is movably disposed in the cover. The first coil is wound around an outer side of the carrier. The second magnets are disposed on one end of the carrier. The first sensor is for detecting a magnetic field of the second magnets. The second sensor is for detecting a magnetic field of the first magnet.
    Type: Application
    Filed: May 13, 2020
    Publication date: August 27, 2020
    Inventors: Chun-Yi LU, Te-Sheng TSENG, Wen-Hung HSU
  • Publication number: 20200273722
    Abstract: A semiconductor package structure includes a first insulating layer, a first conductive layer, a multi-layered circuit structure, a protection layer, and a semiconductor chip electrically connected to the multi-layered circuit structure. The first insulating layer defines a first through hole extending through the first insulating layer. The first conductive layer includes a conductive pad disposed in the first through hole and a trace disposed on an upper surface of the first insulating layer. The multi-layered circuit structure is disposed on an upper surface of the first conductive layer. The multi-layered circuit structure includes a bonding region disposed on the conductive pad of the first conductive layer and an extending region disposed on the trace of the first conductive layer. The protection layer covers the upper surface of the first insulating layer and the extending region of the multi-layered circuit structure, and exposes the bonding region of the multi-layered circuit structure.
    Type: Application
    Filed: May 8, 2020
    Publication date: August 27, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wen Hung HUANG, Yan Wen CHUNG
  • Patent number: 10756054
    Abstract: A semiconductor package includes a core layer having a first surface and a second surface opposite to the first surface. The core layer includes a cavity. A first die is in the cavity. A first gap is between a sidewall of the cavity and a sidewall of the first die. A filling material is in the first gap. The filling material includes a first dimple in proximal to the second surface of the core layer. A first buffer layer on the second surface of the core layer. The first buffer layer has a bottom surface in proximal to the first die and a top surface opposite to the bottom surface. The first buffer layer filling the first dimple. A method for manufacturing a semiconductor package is also disclosed.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: August 25, 2020
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen Hung Huang
  • Patent number: 10748935
    Abstract: A MOSFET structure including stacked vertically isolated MOSFETs and a method for forming the same are disclosed.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: August 18, 2020
    Assignees: Taiwan Semiconductor Manufacturing Company, Ltd., National Taiwan University
    Inventors: Yu-Shiang Huang, Hung-Yu Yeh, Wen Hung Huang, Chee-Wee Liu
  • Patent number: 10749075
    Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer; a plurality of first trenches penetrating the second semiconductor layer and the active layer to expose the first semiconductor layer; a second trench penetrating the second semiconductor layer and the active layer to expose the first semiconductor layer, wherein the second trench is disposed near an outmost edge of the active layer, and surrounds the active layer and the plurality of first trenches; a patterned metal layer formed on the second semiconductor layer and formed in one of the plurality of first trenches or the second trench; and a first pad portion and a second pad portion both formed on the second semiconductor layer and electrically connecting the second semiconductor layer and the first semiconductor layer respectively.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: August 18, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Tsung-Hsun Chiang, Bo-Jiun Hu, Wen-Hung Chuang, Yu-Ling Lin
  • Patent number: 10740667
    Abstract: Apparatus, systems, and methods for determining a temperature excursion are provided. In one example, a system can comprise a temperature switch component that experiences a temperature excursion associated with a metal alloy of the temperature switch component and one or more electrodes, wherein the temperature excursion is based on a temperature of the metal alloy exceeding a defined threshold value. Additionally, the system can comprise a radio frequency identification tag component that receives a signal, from an external reader device, utilized to determine that the temperature excursion has occurred based on a parameter change, associated with the temperature excursion, from a first parameter to a second parameter different than the first parameter.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: August 11, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Li-Wen Hung, Jae-Woong Nah