Abstract: A method of connecting device adapted to an interactive whiteboard system and a host device thereof are provided. The host device has an interactive display device. The method includes the following steps. A scanning process is executed to receive a notification signal which is continuously broadcast by a first client device. A representative icon is obtained from an icon base, and the representative icon is set according to device information of the first client device in the notification signal, such that the representative icon is related to the first client device. The representative icon is displayed on the interactive display device, and then a broadcast termination signal is transmitted back to the first client device after the representative icon is displayed. After receiving the broadcast termination signal, the first client device stops broadcasting the notification signal.

Abstract: A memory cell and method including a first electrode formed through a first opening in a first dielectric layer, a resistive layer formed on the first electrode, a spacing layer formed on the resistive layer, a second electrode formed on the resistive layer, and a second dielectric layer formed on the second electrode, the second dielectric layer including a second opening. The first dielectric layer formed on a substrate including a first metal layer. The first electrode and the resistive layer collectively include a first lip region that extends a first distance beyond the first opening. The second electrode and the second dielectric layer collectively include a second lip region that extends a second distance beyond the first opening. The spacing layer extends from the second distance to the first distance. The second electrode is coupled to a second metal layer using a via that extends through the second opening.

Abstract: An RFID device includes: at least one solar cell including a substrate, a first conductive layer, an electron supplying layer, an electron receiving layer and a second conductive layer sequentially stacked thereon; and a RFID tag coupled to the solar cell through a telecommunication connection structure, and including a first antenna, a second antenna and a RFID chip, and the RFID chip includes a first RFID module, a second RFID module and a radio frequency determination module. The first antenna and the first RFID module are capable of passively receiving a driving signal of an external device and returning tag data, and the radio frequency determination module is capable of automatically determining the external driving signal, and the second RFID module and the second antenna actively transmit the tag data to the external device according to the electric power supplied by the solar CELL.

Abstract: The present invention relates to a monoclonal antibody that inhibits immunosuppressive functions of pathogens, antigen-binding fragment thereof, and hybridomas producing such antibody. The monoclonal antibody or antigen-binding fragment thereof bind to a peptide consisting an amino acid sequence represented by MEKVGKDGVITVE (SEQ ID NO: 1). The present invention also discloses use of the invented monoclonal antibody or antigen-binding fragment thereof, and method of preparation for such hybridomas.

Abstract: The present invention provides a method for blocking immunosuppressive functions of pathogens, comprising: applying to an environment where the pathogens exist a composition that blocks immunosuppressive functions of the pathogens. The immunosuppressive functions are provided by an immunosuppressive substance secreted or produced by the pathogens. The composition includes a function inhibitor that comprises an antibody identifying the immunosuppressive substance or a fragment thereof. Use of the function inhibitor composition is also disclosed.

Abstract: An RFID device includes: at least one solar cell including a substrate, a first conductive layer, an electron supplying layer, an electron receiving layer and a second conductive layer sequentially stacked thereon; and a RFID tag coupled to the solar cell through a telecommunication connection structure, and including a first antenna, a second antenna and a RFID chip, and the RFID chip includes a first RFID module, a second RFID module and a radio frequency determination module. The first antenna and the first RFID module are capable of passively receiving a driving signal of an external device and returning tag data, and the radio frequency determination module is capable of automatically determining the external driving signal, and the second RFID module and the second antenna actively transmit the tag data to the external device according to the electric power supplied by the solar CELL.

Abstract: A display device having a light adjusting module and a control method thereof are provided. The display device includes a light source module, a light adjusting module, a display panel, and an eye detection device. The light source module has a light emitting surface. The light adjusting module has a plurality of predetermined positions, which is disposed on one side of the light source module corresponding to the light emitting surface. The display panel is disposed on the other side of the light adjusting module with respect to the light source module and has a display surface. The eye detection device is adjacent to the display surface for detecting an eye position of a user located in front of the display panel. The light adjusting module is capable of adjusting an optical property of the plurality of predetermined positions in accordance with the detected eye position and a light field of the light source module.

Abstract: A method of forming a semiconductor structure includes depositing a first electrode material over a conductive structure and a dielectric layer, patterning the first electrode material to form a first electrode contacting the conductive structure, depositing a resistance variable layer over the first electrode and the dielectric layer, depositing a second electrode material over the resistance variable layer, and etching a portion of the second electrode material and the resistance variable layer to form a second electrode over a remaining portion of the resistance variable layer.

Abstract: The present disclosure relates to an integrated circuit having an interconnect wire contacting an upper electrode of the RRAM (resistive random access memory) device, and a method of formation. In some embodiments, the integrated circuit comprises an RRAM device having a dielectric data storage layer disposed between a lower electrode and an upper electrode. An interconnect wire contacts an upper surface of the upper electrode, and an interconnect via is arranged onto the interconnect wire. The interconnect via is set back from one or more outermost sidewalls of the interconnect wire. The interconnect wire has a relatively large size that provides for a good electrical connection between the interconnect wire and the upper electrode, thereby increasing a process window of the RRAM device.

Abstract: Some embodiments relate to an integrated circuit device. The integrated circuit device includes a resistive random access memory (RRAM) cell, which includes a top electrode and a bottom electrode that are separated by a RRAM dielectric layer. The top electrode of the RRAM cell has a recess in its upper surface. A via is disposed over the RRAM cell and contacts the top electrode within the recess.

Abstract: A resistive random access memory (RRAM) cell comprises a transistor having a gate and a source/drain region, a bottom electrode coplanar with the gate, a resistive material layer over the bottom electrode, a top electrode over the resistive material layer, and a conductive material electrically connecting the bottom electrode to the source/drain region.

Abstract: In some embodiments, the present disclosure relates to a method of operating an RRAM cell having a PMOS access transistor. The method may be performed by forming an initial conductive filament within a dielectric data storage layer of an RRAM cell having a bottom electrode connected to a drain terminal of a PMOS transistor and a top electrode separated from the bottom electrode by the dielectric data storage layer. The initial conductive filament is formed by turning on the PMOS transistor by providing a substantially zero first forming voltage to a gate terminal of the PMOS transistor, by providing a substantially zero second forming voltage to a source terminal of the PMOS transistor, by providing a first non-zero forming voltage to a bulk terminal of the PMOS transistor, and by providing a second non-zero forming voltage to the top electrode.

Abstract: A semiconductor structure includes a memory region. A memory structure is disposed on the memory region. The memory structure includes a first electrode, a resistance variable layer, a protection material and a second electrode. The first electrode has a top surface on the memory region. The resistance variable layer has at least a first portion and a second portion. The first portion is disposed over the top surface of the first electrode and the second portion extends upwardly from the first portion. The protection material surrounds the second portion of the resistance variable layer. The protection material is configurable to protect at least one conductive path in the resistance variable layer. The second electrode is disposed over the resistance variable layer.

Abstract: A limb rehabilitation and training system includes a horizontal position adjuster movably mounted at a bottom side of a base, an expansion rotary member mounted at the horizontal position adjuster, a shoulder joint traction mechanism linked to the expansion rotary member through a first arm segment robotic arm and a height adjuster, and an upper-limb rehabilitation device linked to the shoulder joint traction mechanism. The upper-limb rehabilitation device is able to rapidly be adjusted to fit the left arm or right arm through the horizontal position adjuster, the expansion rotary member, the first arm segment robotic arm and a shoulder positioning-lifting rotary member and. Further, by means of the shoulder joint traction mechanism, the user's stiffened shoulder joint can be timely moved for a separation distance, achieving the function of loosening the joint and facilitating performance of successive rehabilitation treatment or training.

Abstract: An active RFID device includes at least one solar cell, and the solar cell includes: a substrate; a first conductive layer, disposed on the substrate; an electron supplying layer, disposed on the first conductive layer; an electron receiving layer, disposed on the electron supplying layer; and a second conductive layer, disposed on the electron receiving layer; and a RFID tag, including a RFID chip and an antenna, and installed on the substrate, and coupled to the solar cell through a telecommunication connection structure.

Abstract: A photoelectric resonance chip includes a chip main body further including an absorption portion, strengthening device, emission portion, and a light wave generating element and electric wave generating element are configured on one side of the chip main body. When a user carry the chip on their body, the strengthening device enlarge the power of external microwaves absorbed by the absorption portion, and the emission portion further feeds the microwaves with the enlarged power back to the human body. Thereafter, the fed-back microwaves carry the light wave energy and electric wave energy to flow around the whole body to strengthen human body's bioelectrical and the effect of the light wave energy and electric wave energy to the human body.

Abstract: The present disclosure relates to an integrated circuit, which includes a semiconductor substrate and an interconnect structure disposed over the semiconductor substrate. The interconnect structure includes a lower metal layer, an intermediate metal layer disposed over the lower metal layer, and an upper metal layer disposed over the intermediate metal layer. An upper surface of the lower metal layer and a lower surface of the intermediate metal layer are spaced vertically apart by a first distance. A resistive random access memory (RRAM) cell is arranged between the lower metal layer and the upper metal layer. The RRAM cell includes a bottom electrode and a top electrode which are separated by a data storage layer having a variable resistance. The data storage layer vertically spans a second distance that is greater than the first distance.

Abstract: A coating apparatus for forming a coating film over a substrate includes a spin chuck for holding and rotating the substrate, a central coating nozzle over a central portion of the substrate, a plurality of first coating nozzles surrounding the central coating nozzle and spaced apart from the central coating nozzle by substantially a same first distance, and a plurality of second coating nozzles surrounding the central coating nozzle and spaced apart from the central coating nozzle by substantially a same second distance, wherein the second distance is greater than the first distance.

Abstract: A method includes forming a protection material over a conductive structure, an opening over the structure is partially filled with a first electrode material to form a first electrode; a resistance variable layer and a second electrode material are also formed in the opening. The second electrode material and the resistance variable layer are patterned to form a memory element. The method includes forming an interlayer dielectric over the memory element and the periphery region of the substrate and disposing contacts in the interlayer dielectric.

Abstract: In some embodiments, the present disclosure relates to a method of operating an RRAM cell having a PMOS access transistor. The method may be performed by forming an initial conductive filament within a dielectric data storage layer of an RRAM cell having a bottom electrode connected to a drain terminal of a PMOS transistor and a top electrode separated from the bottom electrode by the dielectric data storage layer. The initial conductive filament is formed by turning on the PMOS transistor by providing a substantially zero first forming voltage to a gate terminal of the PMOS transistor, by providing a substantially zero second forming voltage to a source terminal of the PMOS transistor, by providing a first non-zero forming voltage to a bulk terminal of the PMOS transistor, and by providing a second non-zero forming voltage to the top electrode.