Abstract: A manufacturing method of a semiconductor structure is provided. A first semiconductor die includes a first semiconductor substrate, a first interconnect structure formed thereon, a first bonding conductor formed thereon, and a conductive via extending from the first interconnect structure toward a back surface of the first semiconductor substrate. The first semiconductor substrate is thinned to accessibly expose the conductive via to form a through semiconductor via (TSV). A second semiconductor die is bonded to the first semiconductor die. The second semiconductor die includes a second semiconductor substrate including an active surface facing the back surface of the first semiconductor substrate, a second interconnect structure between the second and the first semiconductor substrates, and a second bonding conductor between the second interconnect structure and the first semiconductor substrate and bonded to the TSV.

Abstract: A display apparatus includes a display panel and an emission time control chip. The display panel has a plurality of sub-pixels, and each sub-pixel includes a light emitting device, a pixel driving circuit, and an emission time control circuit. The pixel driving circuit is configured to provide a driving signal for driving the light emitting device to emit light. The emission time control circuit is configured to connect the pixel driving circuit to the light emitting device in response to an emission control signal to control a duration of transmission of the driving signal to the light emitting device. The light emitting time control chip includes at least one output terminal. The emission time control chip is configured to transmit emission time control signals to the light emitting time control circuits of the plurality of sub-pixels through the at least one output terminal.

Abstract: An electrostatic discharge (ESD) protection circuit is provided. The protection circuit includes a MOS transistor and a resistor. The MOS transistor is electrically coupled to a core circuit. The resistor is electrically coupling to a gate of the MOS transistor for creating a bias on the gate to directing an ESD current to a ground when an ESD event occurs on the core circuit. A layout of the MOS transistor is spaced apart from a layout of the core circuit by a layout of a dummy structure. The resistor is formed by utilizing a portion of the dummy structure.

Abstract: An electrostatic discharge (ESD) protection circuit is provided. The protection circuit includes a MOS transistor and a resistor. The MOS transistor is electrically coupled to a core circuit. The resistor is electrically coupling to a gate of the MOS transistor for creating a bias on the gate to directing an ESD current to a ground when an ESD event occurs on the core circuit. A layout of the MOS transistor is spaced apart from a layout of the core circuit by a layout of a dummy structure. The resistor is formed by utilizing a portion of the dummy structure.

Abstract: A composite material structure includes a first metal member and a second metal member bonding to the first metal member. A bonding surface is formed therebetween. A first hole is through the first metal member. A circular bonding line is formed at a junction of a wall of the first hole and the bonding surface. A sleeve protrudes from the second metal member into the first hole, and covers the bonding line. A groove indents from the first metal member. The groove has a bottom surface located in the same plane with a top surface of the sleeve. A processing method of the composite material structure is also provided. The sleeve covers the bonding line between the first metal member and the second metal member, which allows the composite material structure to provide an improved sealing performance.

Abstract: A process tool including a polishing pad on a top surface of a wafer platen. A wafer carrier is configured to hold a wafer over the polishing pad. A slurry dispenser is configured to dispense an abrasive slurry including a plurality of charged abrasive particles having a first polarity onto the polishing pad. A first conductive rod is within the wafer platen and coupled to a first voltage supply. A wafer roller is configured to support the wafer. A first wafer brush is arranged beside the wafer roller. A second conductive rod is within the first wafer brush and coupled to a second voltage supply. The first voltage supply is configured to apply a first charge having a second polarity, opposite the first polarity, to the first conductive rod. The second voltage supply is configured to apply a second charge having the second polarity to the second conductive rod.

Abstract: A call record synchronization method includes detecting, by a first terminal, an input operation for requesting to display a call record. The method further includes, after the first terminal detects the input operation, displaying, by the first terminal, a merged call record, where the merged call record is a call record obtained after merging of a call record of the first terminal and a call record of a second terminal. The merged call record includes a device identifier of the first terminal and/or a device identifier of the second terminal.

Abstract: The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a first region and a second region; a first semiconductor mesa formed on the semiconductor substrate within the first region; a second semiconductor mesa formed on the semiconductor substrate within the second region; and a field effect transistor (FET) formed on the semiconductor substrate. The FET includes a first doped feature of a first conductivity type formed in a top portion of the first semiconductor mesa; a second doped feature of a second conductivity type formed in a bottom portion of the first semiconductor mesa, the second semiconductor mesa, and a portion of the semiconductor substrate between the first and second semiconductor mesas; a channel in a middle portion of the first semiconductor mesa and interposed between the source and drain; and a gate formed on sidewall of the first semiconductor mesa.

Abstract: A substrate has a first side and a second side opposite the first side. A first transistor has a first gate, a second transistor has a second gate, and a third transistor has a third gate. The first gate, the second gate, and the third gate are each disposed over the first side of the substrate. The second gate is disposed between the first gate and the third gate. The first gate and the third gate have different material compositions. A structure is disposed over the second side of the substrate. The structure includes a first opening aligned with the first transistor, a second opening aligned with the second transistor, and a third opening aligned with the third transistor. A sensing film is disposed over the second side of the substrate. The sensing film is configured to attach to one or more predefined miniature targets.

Abstract: An interconnect structure is disposed over a semiconductor substrate. The interconnect structure includes a plurality of interconnect layers. A first thin-film transistor (TFT) and a second TFT disposed over the semiconductor substrate. The first TFT and the second TFT each vertically extend through at least a subset of the interconnect layers. An opening is formed in the interconnect structure. The opening is disposed between the first TFT and the second TFT. A sensing film is disposed over a bottom surface and side surfaces of the opening.

Abstract: A substrate has a first side and a second side vertically opposite to the first side. A sensing transistor is disposed at least in part over the first side of the substrate. A plurality of voltage reference transistors is disposed at least in part over the first side of the substrate. The voltage reference transistors are disposed on different lateral sides of the sensing transistor. A structure is disposed over the second side of the substrate. The structure defines one or more openings configured to collect a fluid. A sensing film is disposed over the second side of the substrate, wherein the sensing transistor is configured to detect, at least in part through capacitive coupling, a presence of one or more predefined miniature targets in the fluid that attach to the sensing film in the opening that is vertically aligned with the sensing transistor.

Abstract: A heating device includes a main body, a first member, a second member, a third member, an induction coil, a support member, and a magnetic induction element. The main body has an accommodating space and is configured to accommodate a fluid. The main body includes a first end part and a second end part opposite to the first end part. The first member is connected to the first end part of the main body. The second member is connected to the second end part of the main body. The third member is connected to the second member. The induction coil surrounds an outside of the main body. The support member includes base and a plurality of extension parts connected to the base. The magnetic induction element is disposed in the accommodating space.

Abstract: The present invention provides a contrast agent which is efficiently and specifically absorbed by tumor cells, suitable for use in single photon emission computed tomography for the diagnosis, efficacy assessment and tumor tracking of neuroblastoma, pheochromocytoma or congestive heart failure.

Abstract: The present disclosure relates to the technical field of automobile part processing, and specifically provides a spray head device and a sandblasting device for automobile part processing. The spray head device comprises a spray head body and a connecting pipe. A conical through hole is penetratingly arranged in the spray head body, one end of the conical through hole forms a discharge port, the other end of the conical through hole forms a feed port, the caliber of the feed port is greater than that of the discharge port, the connecting pipe is fixedly connected to one end of the feed port of the spray head body, and the connecting pipe is coaxially arranged with the conical through hole; the conical through hole is penetratingly provided in the spray head body.

Abstract: The present disclosure relates to the technical field of automobile part processing, and specifically provides a clamping device and a sandblasting device for automobile part processing. The clamping device comprises a clamping component for clamping an automobile part, and an auxiliary component; the auxiliary component comprises a supporting part, a pull rod, a protective pad, and a return spring, wherein the pull rod is movably provided on the supporting part, one end of the pull rod is connected to the protective pad having deformation performance, and the protective pad is used for being arranged between the automobile part and the clamping component; the return spring is used for being installed between the supporting part and the protective pad; the pull rod is pulled so that the pull rod pulls the protective pad to move towards the direction close to the supporting part.

Abstract: The present invention discloses an easy-to-process, opaque and high-impact methyl methacrylate-butadiene-styrene (MBS) polymer for polyvinyl chloride (PVC) and a preparation method thereof, and relates to the technical field of preparation of PVC additives. The easy-to-process, opaque and high-impact MBS for PVC has a core-kernel-shell (three-layer) structure, and includes the following components by mass: 1-20% of core, 70-85% of kernel and 5-20% of shell. The core is a semi-hard, lightly crosslinked copolymer of a styrene (St) monomer and an acrylate monomer. The kernel is a soft, lightly crosslinked butadiene (BD)-St polymer with a low glass transition temperature. The shell is a copolymer of St, butyl acrylate and methyl methacrylate (MMA) with a high glass transition temperature. The present invention solves the problems of low impact strength and poor processing fluidity of the existing MBS for opaque PVC products.

Abstract: The invention provides a radio frequency (RF) module and associated method with envelope tracking (ET) power supply in a device. The RF module may comprise a plurality of transmitters, an ET output, and an ET multiplexer. Each said transmitter may comprise an ET port and one or more RF outputs, and may be configured for providing an RF signal to one of said one or more RF outputs, and providing an ET signal, which reflects an envelope of the RF signal, to the ET port. The ET multiplexer may be coupled between said ET ports of the plurality of transmitters and the ET output, for selectively relaying one of said ET ports to the ET output.

Abstract: Methods for improving joinder between a surface-mount package and a printed circuit board are disclosed. The warpage at a corner of the surface-mount package and at a corresponding corner of a joint area on the printed circuit board are measured to determine the degree of mismatch. A mini-pad is applied to the corner between the surface-mount package and the joint area on the printed circuit board. The thickness of the mini-pad pushes against the surface-mount package and the printed circuit board, reducing the degree of mismatch below a critical dimension of a ball grid array of the surface-mount package. The surface-mount package can then be soldered to the joint area, reducing or preventing the formation of solder bridges and short circuits.

Abstract: A fin field effect transistor (FinFET), and a method of forming, is provided. The FinFET has a fin having one or more semiconductor layers epitaxially grown on a substrate. A first passivation layer is formed over the fins, and isolation regions are formed between the fins. An upper portion of the fins are reshaped and a second passivation layer is formed over the reshaped portion. Thereafter, a gate structure may be formed over the fins and source/drain regions may be formed.

Abstract: A semiconductor structure includes a sensor, a patterned dielectric layer, and a cover disposed on the patterned dielectric layer. The sensor includes a bio-sensing device and at least one voltage-reference device disposed in proximity to the bio-sensing device. The bio-sensing device includes a first field effect transistor (FET) and a first sensing portion of a sensing film capacitively coupled to the first FET, and the first sensing portion is concave toward the first FET. The at least one voltage-reference device includes a second FET and a second sensing portion of the sensing film capacitively coupled to the second FET. The patterned dielectric layer is disposed on the sensing film and includes at least one sensing well located above the at least one voltage-reference device and the bio-sensing device. The cover includes fluid channels communicating with the at least one sensing wells.