Abstract: An electronic device includes a circuit board and a metal reflective structure. The metal reflective structure is disposed on the circuit board. The metal reflective structure includes a protective layer and a metal layer. The metal layer is located between the protective layer and the circuit board. The protective layer includes transparent materials.

Abstract: A semiconductor device and method of manufacture are provided which utilize an air gap to help isolate conductive structures within a dielectric layer. A first etch stop layer is deposited over the conductive structures, and the first etch stop layer is patterned to expose corner portions of the conductive structures. A portion of the dielectric layer is removed to form an opening. A second etch stop layer is deposited to line the opening, wherein the second etch stop layer forms a stepped structure over the corner portions of the conductive structures. Dielectric material is then deposited into the opening such that an air gap is formed to isolate the conductive structures.

Abstract: A semiconductor structure with an improved metal structure is described. The semiconductor structure can include a substrate having an upper surface, an interconnect layer over the upper surface, and an additional structure deposited over the interconnect layer. The interconnect layer can include a patterned seed layer over the substrate, at least two metal lines over the seed layer, and a dielectric material between adjacent metal lines. A barrier layer can be deposited over the at least two metal lines. Methods of making the semiconductor structures are also described.

Abstract: The disclosure provides a single antenna system comprising a ground element, a feeding metal part, at least one shorting metal part, a radiating metal part, a decoupling circuit, a first feed source, and a second feed source. The single antenna system with an integrated decoupled circuit not only effectively achieves size reduction, but achieve high antenna isolation. Moreover, the single antenna system is applied for narrow-bezel notebooks and small-size antenna systems in future.

Abstract: A loop-like dual-antenna system is provided. The loop-like dual-antenna system includes a dielectric substrate having a first surface and a second surface opposite to each other. The loop radiating element includes a first radiating part with two ends and a second radiating part opposite to the first radiating part. A first signal source is disposed on the first surface of the dielectric substrate and electrically connected to two ends of the first radiating part. A grounding part is disposed on the second surface of the dielectric substrate and disposed on one side of the dielectric substrate away from the first signal source. A coupling matching element is disposed on the second surface of the dielectric substrate and adjacent to the grounding part, for coupling to and exciting the second radiating part. A second signal source, disposed on the second surface of the dielectric substrate, and electrically connected to the coupling matching element and the grounding part.

Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary method comprises forming first and second semiconductor fins in first and second regions of a substrate, respectively; forming first and second dummy gate stacks over the first and second semiconductor fins, respectively, and forming a spacer layer over the first and the second dummy gate stacks; forming a first pattern layer with a thickness along the spacer layer in the first region; form a first source/drain (S/D) trench along the first pattern layer and epitaxially growing a first epitaxial feature therein; removing the first pattern layer to expose the spacer layer; forming a second pattern layer with a different thickness along the spacer layer in the second region; form a second S/D trench along the second pattern layer and epitaxially growing a second epitaxial feature therein; and removing the second pattern layer to expose the spacer layer.

Abstract: Methods of forming a semiconductor device are provided. A method according to the present disclosure includes forming, over a workpiece, a dummy gate stack comprising a first semiconductor material, depositing a first dielectric layer over the dummy gate stack using a first process, implanting the workpiece with a second semiconductor material different from the first semiconductor material, annealing the dummy gate stack after the implanting, and replacing the dummy gate stack with a metal gate stack.

Abstract: An electronic device casing adapted to cover an antenna is provided. The electronic device casing includes a supporting layer and a carbon fiber layer. The carbon fiber layer is disposed on a surface of the supporting layer and includes a signal passing region having a plurality of slits and a plurality of microstructures separated by the slits. The signal passing region is adapted to cover the antenna, and a signal excited by the antenna is adapted to pass through the supporting layer and the slits so as to pass through the electronic device casing. An electronic device having the electronic device casing is further provided.

Abstract: A display device includes a backlight module, and the backlight module includes a light-guiding plate, a light-emitting assembly, and an adhesive member. The light-emitting assembly is disposed correspondingly to the light-guiding plate and includes a substrate and a plurality of light-emitting elements. The substrate includes a first surface, and the first surface includes a component arrangement region and a planar region. A first gap is formed between the planar region and the component arrangement region, and the planar region and the component arrangement region are electrically isolated from each other. The light-emitting elements are disposed on the component arrangement region. The adhesive member connects the light-guiding plate and the planar region. An assembling method of the display device is also provided. This disclosure can improve the non-uniform brightness issue (hotspots) or enhance the optical performance.

Abstract: The present disclosure relates to structures and associated systems for connecting a hub apparatus to a wheel. In some embodiments, the hub apparatus includes (1) a housing assembly having an outer radius; and (2) a mounting portion circumferentially provided on at least one side surface of the housing assembly. The mounting portion is formed with a plurality of coupling structures configured to couple the hub apparatus to a wheel rim. The mounting portion defines a first radius smaller than the outer radius.

Abstract: Methods, systems and computer program products for flagging abnormal videos are provided. Aspects include training an image recognition model based on a plurality of images that depict one or more of a plurality of subjects. Aspects also include generating a normal subject relationship graph representing normal relationships between the plurality of subjects by applying the image recognition model to a plurality of training videos and a test subject relationship graph representing test relationships between subjects depicted in a test video by applying the image recognition model to the test video. Each normal relationship is associated with a strength value. Responsive to determining that a difference between a strength value associated with a first normal relationship and a strength value associated with a corresponding first test relationship exceeds a predetermined threshold, aspects include flagging the test video as being abnormal.

Abstract: An electronic device is provided. The electronic device includes a backlight module. The backlight module includes a light-guiding plate and a light-guiding element, and the light-guiding element is disposed under the light-guiding plate. In addition, the light-guiding element has a protruding structure, and the protruding structure faces the light-guiding plate.

Abstract: The invention provides a scroll wheel module, which includes an adjustment wheel, a scroll wheel and a transmission mechanism. The adjustment wheel includes an adjustment portion. The scroll wheel includes a contact portion. The transmission mechanism has a first end and a second end opposite to each other, the first end is connected to the adjustment portion of the adjustment wheel, and the second end is adjacent to the scroll wheel. When the adjustment wheel is rotated, the first end of the transmission mechanism produces a displacement relative to the adjustment portion such that the second end of the transmission mechanism applies a force to the contact. A magnitude of the force is proportional to a rotational force of the scroll wheel.

Abstract: Embodiments disclosed herein relate generally to capping processes and structures formed thereby. In an embodiment, a conductive feature, formed in a dielectric layer, has a metallic surface, and the dielectric layer has a dielectric surface. The dielectric surface is modified to be hydrophobic by performing a surface modification treatment. After modifying the dielectric surface, a capping layer is formed on the metallic surface by performing a selective deposition process. In another embodiment, a surface of a gate structure is exposed through a dielectric layer. A capping layer is formed on the surface of the gate structure by performing a selective deposition process.

Abstract: An electronic device includes a circuit board and a metal reflective structure. The metal reflective structure is disposed on the circuit board. The metal reflective structure includes a protective layer and a metal layer. The metal layer is located between the protective layer and the circuit board. The protective layer includes transparent materials.

Abstract: A semiconductor device includes a memory macro having first and second well pick-up (WPU) areas along first and second edges of the memory macro, respectively, and memory bit areas between the first and the second WPU areas. The first and second WPU areas are oriented lengthwise generally along a first direction. In each of the first and second WPU areas, the memory macro includes n-type wells and p-type wells arranged alternately along the first direction with a well boundary between each of the n-type wells and the adjacent p-type well. The memory macro further includes active regions; an isolation structure; gate structures, and a first dielectric layer that is disposed at each of the well boundaries. From a top view, the first dielectric layer extends generally along a second direction perpendicular to the first direction and through all the gate structures in the first and the second WPU areas.