Patents by Inventor Wen Su

Wen Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180204801
    Abstract: A semiconductor device and method of manufacture are provided which utilize an air gap to help isolate conductive structures within a dielectric layer. A first etch stop layer is deposited over the conductive structures, and the first etch stop layer is patterned to expose corner portions of the conductive structures. A portion of the dielectric layer is removed to form an opening. A second etch stop layer is deposited to line the opening, wherein the second etch stop layer forms a stepped structure over the corner portions of the conductive structures. Dielectric material is then deposited into the opening such that an air gap is formed to isolate the conductive structures.
    Type: Application
    Filed: March 12, 2018
    Publication date: July 19, 2018
    Inventors: Szu-Ping Tung, Chih-Chien Chi, Hung-Wen Su
  • Patent number: 10026827
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a first organic layer on the substrate; patterning the first organic layer to form an opening; forming a second organic layer in the opening; and removing the first organic layer to form a patterned second organic layer on the substrate.
    Type: Grant
    Filed: April 10, 2016
    Date of Patent: July 17, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Zhen Wu, Chiu-Hsien Yeh, Po-Wen Su, Kuan-Ying Lai
  • Publication number: 20180191249
    Abstract: A switching regulator includes a first switch; a second switch coupled between the first switch and ground; an inductor coupled to a common node between the first and second switches; a capacitor coupled between the inductor and ground; a controller receiving a disable signal, and generating first and second control signals respectively for the first and second switches; and a crossing detector comparing an auxiliary voltage at the common node with a negative reference voltage to generate a comparison signal, and generating the disable signal based on the first control signal and the comparison signal. The second control signal switches into an inactive state upon the disable signal indicating a reference-crossing of the auxiliary voltage.
    Type: Application
    Filed: January 3, 2017
    Publication date: July 5, 2018
    Inventors: Ting-Wen Su, Yuh-Shyan Hwang
  • Patent number: 10013076
    Abstract: An input device includes at least one key structure and a film circuit board disposed below the key structure. The key structure includes a top cover, a plunger, a sleeve, a rod, a first elastic element, a second elastic element and a bottom cover. The plunger is assembled on the top cover and has a protruding portion protruding from a first opening of the top cover and a guiding portion. The sleeve is assembled inside the plunger. The rod is movably disposed in the sleeve. The first elastic element is disposed in the rod, wherein the guiding portion passes through the first elastic element so that a first end of the first elastic element leans against the plunger. The bottom cover having a second opening locks the top cover. A second end and a third end of the second elastic element respectively lean against the sleeve and the bottom cover.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: July 3, 2018
    Assignees: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, Lite-On Technology Corporation
    Inventors: Chih-Wen Su, Rong-Shu Li
  • Publication number: 20180175486
    Abstract: A wearable electronic device includes a device body, a wearable body, a circuit board, an antenna system and a conductive extension portion. The device body includes an upper casing and a lower casing. A feeding portion, a first grounding portion and a second grounding portion are disposed on a periphery of the circuit board. The second grounding portion is electrically connected to the upper casing. The antenna system is disposed on the inner surface of the lower casing. The feeding terminal of the antenna system is electrically connected to the feeding portion of the circuit board. The grounding terminal of the antenna system is electrically connected to the first grounding portion of the circuit board. An end of the conductive extension portion is electrically connected to the upper casing, the other end of the conductive extension portion is extended into the wearable body.
    Type: Application
    Filed: December 1, 2017
    Publication date: June 21, 2018
    Inventors: Yi-Ting Hsieh, Saou-Wen Su, Cheng-Tse Lee
  • Publication number: 20180174898
    Abstract: A device comprises a semiconductor substrate; a dielectric layer deposited over the semiconductor substrate, the dielectric layer including a trench; and a structure in the trench. The structure includes a chemical vapor deposition (CVD) TaN layer formed on a side wall of the trench; a physical vapor deposition (PVD) Ta layer formed over the CVD TaN layer; and a metal-containing layer formed over the PVD Ta layer.
    Type: Application
    Filed: February 12, 2018
    Publication date: June 21, 2018
    Inventors: Ya-Lien Lee, Hung-Wen Su, Kuei-Pin Lee, Yu-Hung Lin, Yu-Min Chang
  • Patent number: 9997925
    Abstract: A power supplying method is adapted to supply power to any one of external electronic devices with voltage-stabilized capacitors of different specifications. The power supplying method includes: generating a periodic signal; periodically turning on and off a load-switch circuit by the periodic signal to enable the load-switch circuit to periodically charge and discharge the voltage-stabilized capacitor; generating an enable signal following the periodic signal; continuously turning on the load-switch circuit by the enable signal to enable the load-switch circuit to supply the power to the external electronic device according to a flag signal; and detecting the amount of a current supplied to the external electronic device by the load-switch circuit to determine a level of the flag signal. During periodically charging and discharging the voltage-stabilized capacitor, the amount of the current supplied to the external electronic device is gradually decreased.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: June 12, 2018
    Assignee: GETAC TECHNOLOGY CORPORATION
    Inventor: Huang-Wen Su
  • Publication number: 20180151685
    Abstract: A method of forming a semiconductor device includes the following steps. A substrate is provided, and the substrate has a first region. A barrier layer is then formed on the first region of the substrate. A first work function layer is formed on the barrier layer. An upper half portion of the first work function layer is converted into a non-volatile material layer. The non-volatile material layer is removed and a lower half portion of the first work function layer is kept.
    Type: Application
    Filed: January 8, 2018
    Publication date: May 31, 2018
    Inventors: Po-Wen Su, Zhen Wu, Hsiao-Pang Chou, Chiu-Hsien Yeh, Shui-Yen Lu, Jian-Wei Chen
  • Patent number: 9978681
    Abstract: Semiconductor devices and methods for forming the same in which damages to a low-k dielectric layer therein can be reduced or even prevented are provided. A semiconductor device is provided, comprising a substrate. A dielectric layer with at least one conductive feature therein overlies the substrate. An insulating cap layer overlies the top surface of the low-k dielectric layer adjacent to the conductive feature, wherein the insulating cap layer includes metal ions.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: May 22, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Hung-Wen Su, Shih-Wei Chou, Ming-Hsing Tsai
  • Patent number: 9972461
    Abstract: A key structure with mechanical switch includes a keycap, a support plate board disposed under the keycap, a scissor unit, a receiving housing, a guiding outer cylinder, a rotating inner cylinder and an elastic element. The scissor unit guides the keycap up or down along a pressing direction. The receiving housing has a plurality of sectional boards and a plurality of sectional cutouts. The guiding outer cylinder is movably received in the receiving housing along the pressing direction, and abuts against a bottom surface of the keycap. The guiding outer cylinder has a plurality of positioning bumps and a plurality of lodging recesses. The rotating inner cylinder is received in the guiding outer cylinder and has a plurality of sliding bumps. The elastic element is located in the rotating inner cylinder to provide elasticity toward the keycap. The present disclosure also provides a mechanical switch.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: May 15, 2018
    Assignees: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, LITE-ON TECHNOLOGY CORPORATION
    Inventors: Chun-Lin Chen, Ko-Hsiang Lin, Chih-Wen Su
  • Patent number: 9953868
    Abstract: A method of forming a conductive structure includes forming a first opening and a second opening in a dielectric layer on a substrate, wherein the first opening is narrower than the second opening. The method further includes depositing a diffusion barrier layer to line the first opening and the second opening. The method further includes forming a metal layer over the diffusion barrier layer to fill at least portions of the first opening and the second opening, wherein a maximum thickness of the metal layer in the first opening is greater than a maximum thickness of the metal layer in the second opening.
    Type: Grant
    Filed: January 5, 2016
    Date of Patent: April 24, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-An Chen, Wen-Jiun Liu, Chun-Chieh Lin, Hung-Wen Su, Ming Hsing Tsai, Syun-Ming Jang
  • Publication number: 20180095544
    Abstract: An input device includes at least one key structure and a film circuit board disposed below the key structure. The key structure includes a top cover, a plunger, a sleeve, a rod, a first elastic element, a second elastic element and a bottom cover. The plunger is assembled on the top cover and has a protruding portion protruding from a first opening of the top cover and a guiding portion. The sleeve is assembled inside the plunger. The rod is movably disposed in the sleeve. The first elastic element is disposed in the rod, wherein the guiding portion passes through the first elastic element so that a first end of the first elastic element leans against the plunger. The bottom cover having a second opening locks the top cover. A second end and a third end of the second elastic element respectively lean against the sleeve and the bottom cover.
    Type: Application
    Filed: February 8, 2017
    Publication date: April 5, 2018
    Applicants: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, Lite-On Technology Corporation
    Inventors: Chih-Wen Su, Rong-Shu Li
  • Publication number: 20180090286
    Abstract: A key structure with mechanical switch includes a keycap, a support plate board disposed under the keycap, a scissor unit, a receiving housing, a guiding outer cylinder, a rotating inner cylinder and an elastic element. The scissor unit guides the keycap up or down along a pressing direction. The receiving housing has a plurality of sectional boards and a plurality of sectional cutouts. The guiding outer cylinder is movably received in the receiving housing along the pressing direction, and abuts against a bottom surface of the keycap. The guiding outer cylinder has a plurality of positioning bumps and a plurality of lodging recesses. The rotating inner cylinder is received in the guiding outer cylinder and has a plurality of sliding bumps. The elastic element is located in the rotating inner cylinder to provide elasticity toward the keycap. The present disclosure also provides a mechanical switch.
    Type: Application
    Filed: July 21, 2017
    Publication date: March 29, 2018
    Inventors: CHUN-LIN CHEN, KO-HSIANG LIN, CHIH-WEN SU
  • Patent number: 9917058
    Abstract: A semiconductor device and method of manufacture are provided which utilize an air gap to help isolate conductive structures within a dielectric layer. A first etch stop layer is deposited over the conductive structures, and the first etch stop layer is patterned to expose corner portions of the conductive structures. A portion of the dielectric layer is removed to form an opening. A second etch stop layer is deposited to line the opening, wherein the second etch stop layer forms a stepped structure over the corner portions of the conductive structures. Dielectric material is then deposited into the opening such that an air gap is formed to isolate the conductive structures.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: March 13, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Szu-Ping Tung, Chih-Chien Chi, Hung-Wen Su
  • Publication number: 20180061963
    Abstract: A fabricating method of a semiconductor structure includes the following steps. A gate material layer is formed on a semiconductor substrate. A patterned mask layer is formed on the gate material layer. The pattern mask layer includes at least one opening exposing a part of the gate material layer. An impurity treatment is performed to the gate material layer partially covered by the pattern mask layer for forming at least one doped region in the gate material layer. An etching process is performed to remove the gate material layer including the doped region. A dummy gate may be formed by patterning the gate material layer, and the impurity treatment may be performed after the step of forming the dummy gate. The performance of the etching processes for removing the gate material layer and/or the dummy gate may be enhanced, and the gate material residue issue may be solved accordingly.
    Type: Application
    Filed: August 30, 2016
    Publication date: March 1, 2018
    Inventors: Wen-Chien Hsieh, En-Chiuan Liou, Chih-Wei Yang, Yu-Cheng Tung, Po-Wen Su
  • Publication number: 20180053988
    Abstract: A wireless communication device is provided. The wireless communication device comprises a circuit board and a loop antenna. The circuit board includes a wireless communication circuit. The wireless communication circuit includes a signal transmitting end and a ground terminal. The loop antenna includes a conductive loop, a feed portion, a first short-circuit portion and a second short-circuit portion. The feed portion is connected between the conductive loop and the signal transmitting end. The first short-circuit portion and the second short-circuit portion are connected between the conductive loop and the ground terminal, respectively.
    Type: Application
    Filed: August 1, 2017
    Publication date: February 22, 2018
    Inventors: Cheng-Tse Lee, Yi-Ting Hsieh, Saou-Wen Su
  • Patent number: 9899491
    Abstract: A semiconductor device and a method of forming the same, the semiconductor device include a substrate, and a first gate structure and a second gate structure disposed on the substrate. The first gate structure includes a barrier layer, a first work function layer, a second work function layer and a conductive layer stacked one over another on the substrate. The second gate structure includes the barrier layer, a portion of the first work function layer and the conductive layer stacked one over another on the substrate, wherein the portion of the first work function layer has a smaller thickness than a thickness of the first work function layer.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: February 20, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Wen Su, Zhen Wu, Hsiao-Pang Chou, Chiu-Hsien Yeh, Shui-Yen Lu, Jian-Wei Chen
  • Patent number: 9898258
    Abstract: A method includes collecting information corresponding to a build environment in which a build result of a source code is generated, the collected information including one or more predefined build environment factors, and storing, in a repository, the collected information as a version of the build environment.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: February 20, 2018
    Assignee: International Business Machines Corporation
    Inventors: Si Bin Fan, Chan Gao, Peng Hui Jiang, Miao Liu, Su Liu, Chih-Wen Su, Yan Sun, Wen Yin
  • Patent number: 9891979
    Abstract: A method dynamically adjusts a log level of a transaction. The method includes: buffering the most detailed logs of a transaction having highest log level into a memory; checking if all dependency-defined transactions within a dependency list/tree for the transaction are completed; and, in response to the completion of all dependency-defined transactions within the dependency list/tree for the transaction, obtaining a log filter level for the transaction in association with the transaction results (success/failure) of dependency-defined transactions, wherein the log filter level is a new log level for the transaction.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: February 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey C H Liu, Chih-Wen Su, Ivan Nestlerode, Johnson Y S Chiang, Giant H M Tu
  • Patent number: D819578
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: June 5, 2018
    Assignee: ENERMAX TECHNOLOGY CORPORATION
    Inventor: Yen-Wen Su