Patents by Inventor Wen Su

Wen Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9600007
    Abstract: A regulator for converting a DC input voltage into a DC output voltage includes: a control module generating a predetermined regulated voltage associated with the DC output voltage, and further generating a control signal based on a feedback voltage associated with the DC output voltage; a switching module outputting, in response to the control signal, one of the reference voltage and the regulated voltage as a switching voltage; and a conversion module generating the DC output voltage and the feedback voltage based on the DC input voltage, a reference voltage output from the reference voltage generation module and the switching voltage.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: March 21, 2017
    Assignee: NATIONAL TAIPEI UNIVERSITY OF TECHNOLOGY
    Inventors: Ting-Wen Su, Yuh-Shyan Hwang
  • Publication number: 20170061120
    Abstract: Embodiments relate to an isolated program execution environment. An aspect includes receiving, by the isolated program execution environment on a computer comprising a processor and a memory, a request to run a program. Another aspect includes wrapping program code corresponding to the program as a function. Another aspect includes cloning a real global object of the isolated program execution environment to create a fake global object. Another aspect includes passing the fake global object to the function. Another aspect includes executing the function, such that the function executes the program.
    Type: Application
    Filed: November 11, 2016
    Publication date: March 2, 2017
    Inventors: Anthony Ffrench, Libra C. Huang, Timothy J. Smith, Chih-Wen Su, Yi-Hong Wang
  • Publication number: 20170062341
    Abstract: A semiconductor device and method of manufacture are provided which utilize an air gap to help isolate conductive structures within a dielectric layer. A first etch stop layer is deposited over the conductive structures, and the first etch stop layer is patterned to expose corner portions of the conductive structures. A portion of the dielectric layer is removed to form an opening. A second etch stop layer is deposited to line the opening, wherein the second etch stop layer forms a stepped structure over the corner portions of the conductive structures. Dielectric material is then deposited into the opening such that an air gap is formed to isolate the conductive structures.
    Type: Application
    Filed: November 14, 2016
    Publication date: March 2, 2017
    Inventors: Szu-Ping Tung, Chih-Chien Chi, Hung-Wen Su
  • Patent number: 9582661
    Abstract: Embodiments relate to an isolated program execution environment. An aspect includes receiving, by the isolated program execution environment on a computer comprising a processor and a memory, a request to run a program. Another aspect includes wrapping program code corresponding to the program as a function. Another aspect includes cloning a real global object of the isolated program execution environment to create a fake global object. Another aspect includes passing the fake global object to the function. Another aspect includes executing the function, such that the function executes the program.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: February 28, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Anthony Ffrench, Libra C. Huang, Timothy J. Smith, Chih-Wen Su, Yi-Hong Wang
  • Patent number: 9564398
    Abstract: A semiconductor structure with an improved metal structure is described. The semiconductor structure can include a substrate having an upper surface, an interconnect layer over the upper surface, and an additional structure deposited over the interconnect layer. The interconnect layer can include a patterned seed layer over the substrate, at least two metal lines over the seed layer, and a dielectric material between adjacent metal lines. A barrier layer can be deposited over the at least two metal lines. Methods of making the semiconductor structures are also described.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: February 7, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Jiun Liu, Chen-Yuan Kao, Hung-Wen Su, Mingh-Hsing Tsai, Syun-Ming Jang
  • Publication number: 20170031374
    Abstract: A regulator for converting a DC input voltage into a DC output voltage includes: a control module generating a predetermined regulated voltage associated with the DC output voltage, and further generating a control signal based on a feedback voltage associated with the DC output voltage; a switching module outputting, in response to the control signal, one of the reference voltage and the regulated voltage as a switching voltage; and a conversion module generating the DC output voltage and the feedback voltage based on the DC input voltage, a reference voltage output from the reference voltage generation module and the switching voltage.
    Type: Application
    Filed: July 28, 2015
    Publication date: February 2, 2017
    Inventors: Ting-Wen SU, Yuh-Shyan HWANG
  • Publication number: 20170016736
    Abstract: One or more processors analyze at least one first user input. One or more processors determine one or more interests of a first user based, at least in part, on the at least one first user input. One or more processors determine a proximity of the first user to one or more points of interest within a first threshold distance of the first user while the first user is mobile. One or more processors match at least one interest of the first user with one or more interests associated with a point of interest of the one or more points of interest. One or more processors provide a notification that the first user is within the first threshold distance of the point of interest.
    Type: Application
    Filed: July 17, 2015
    Publication date: January 19, 2017
    Inventors: Li-Ju Chen, Jeff HC Kuo, Chih-Wen Su, Ying-Chen Yu
  • Publication number: 20170010934
    Abstract: A method dynamically adjusts a log level of a transaction. The method includes: buffering the most detailed logs of a transaction having highest log level into a memory; checking if all dependency-defined transactions within a dependency list/tree for the transaction are completed; and, in response to the completion of all dependency-defined transactions within the dependency list/tree for the transaction, obtaining a log filter level for the transaction in association with the transaction results (success/failure) of dependency-defined transactions, wherein the log filter level is a new log level for the transaction.
    Type: Application
    Filed: September 20, 2016
    Publication date: January 12, 2017
    Inventors: JEFFREY CH LIU, CHIH-WEN SU, IVAN NESTLERODE, JOHNSON YS CHIANG, GIANT HM TU
  • Patent number: 9541921
    Abstract: A computer program product and apparatus measure performance of an information appliance. The computer program product comprises code for: a test module receiving, from a client, and recording a request for processing of a sample data by an information appliance. The test module sends the sample data received from the client to the information appliance for processing. If a request to a backend application is present, the test module also sends the request to the backend application for processing and receives and records a response from the backend application. The test module sends the response from the backend application to the information appliance for processing. A generated correlation ID is used to update a performance data table with start time and a stop time of a response for transaction sample data processed by the information appliance.
    Type: Grant
    Filed: December 30, 2012
    Date of Patent: January 10, 2017
    Assignee: International Business Machines Corporation
    Inventors: Ta-Wei Lin, Jeffrey CH Liu, Lin Chan Hsiao, Shu-Hao Liang, Chih-Wen Su
  • Patent number: 9536082
    Abstract: Embodiments relate to an isolated program execution environment. An aspect includes receiving, by the isolated program execution environment on a computer comprising a processor and a memory, a request to run a program. Another aspect includes wrapping program code corresponding to the program as a function. Another aspect includes cloning a real global object of the isolated program execution environment to create a fake global object. Another aspect includes passing the fake global object to the function. Another aspect includes executing the function, such that the function executes the program.
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: January 3, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Anthony Ffrench, Libra C. Huang, Timothy J. Smith, Chih-Wen Su, Yi-Hong Wang
  • Patent number: 9520362
    Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a patterned dielectric layer having a plurality of first openings. The method includes forming a conductive liner layer over the patterned dielectric layer, the conductive liner layer partially filling the first openings. The method includes forming a trench mask layer over portions of the conductive liner layer outside the first openings, thereby forming a plurality of second openings, a subset of which are formed over the first openings. The method includes depositing a conductive material in the first openings to form a plurality of vias and in the second openings to form a plurality of metal lines. The method includes removing the trench mask layer.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: December 13, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Chieh Lin, Hung-Wen Su, Ming-Hsing Tsai, Syun-Ming Jang
  • Patent number: 9518334
    Abstract: A method of plating a metal layer on a work piece includes exposing a surface of the work piece to a plating solution, and supplying a first voltage at a negative end of a power supply source to an edge portion of the work piece. A second voltage is supplied to an inner portion of the work piece, wherein the inner portion is closer to a center of the work piece than the edge portion. A positive end of the power supply source is connected to a metal plate, wherein the metal plate and the work piece are spaced apart from each other by, and are in contact with, the plating solution.
    Type: Grant
    Filed: April 26, 2013
    Date of Patent: December 13, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Yuan Kao, Hung-Wen Su, Minghsing Tsai
  • Patent number: 9496169
    Abstract: A semiconductor device and method of manufacture are provided which utilize an air gap to help isolate conductive structures within a dielectric layer. A first etch stop layer is deposited over the conductive structures, and the first etch stop layer is patterned to expose corner portions of the conductive structures. A portion of the dielectric layer is removed to form an opening. A second etch stop layer is deposited to line the opening, wherein the second etch stop layer forms a stepped structure over the corner portions of the conductive structures. Dielectric material is then deposited into the opening such that an air gap is formed to isolate the conductive structures.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: November 15, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Szu-Ping Tung, Chih-Chien Chi, Hung-Wen Su
  • Patent number: 9489234
    Abstract: A method dynamically adjusts a log level of a transaction. The method includes: buffering the most detailed logs of a transaction having highest log level into a memory; checking if all dependency-defined transactions within a dependency list/tree for the transaction are completed; and, in response to the completion of all dependency-defined transactions within the dependency list/tree for the transaction, obtaining a log filter level for the transaction in association with the transaction results (success/failure) of dependency-defined transactions, wherein the log filter level is a new log level for the transaction.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: November 8, 2016
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey Ch Liu, Chih-Wen Su, Ivan Nestlerode, Johnson Ys Chang, Giant H M Tu
  • Patent number: 9484756
    Abstract: A battery includes a casing, a battery pack, and at least two electrical connecting assemblies. The casing includes an inner space and plural contact planes. Vertical directions of the contact planes are different. The battery pack includes a battery cell disposed in the inner space, and the battery cell includes a positive and a negative electrodes. The electrical connecting assemblies are electrically connected to the positive electrode and the negative electrode respectively, so as to transmit power between the battery pack and an electronic device. The electrical connecting assembly electrically connected to the positive electrode is arranged on at least two of the contact planes, and the electrical connecting assembly electrically connected to the negative electrode is arranged on at least two of the contact planes. If power supply in one certain direction is interrupted, the battery transmits power in the other directions, thereby avoiding power supply from being interrupted.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: November 1, 2016
    Assignee: Getac Technology Corporation
    Inventors: Huang-Wen Su, Hung-Hsiang Chen
  • Patent number: 9476135
    Abstract: The present disclosure relates to an electro-chemical plating (ECP) process which utilizes a dummy electrode as a cathode to perform plating for sustained idle times to mitigate additive dissociation. The dummy electrode also allows for localized plating function to improve product gapfill, and decrease wafer non-uniformity. A wide range of electroplating recipes may be applied with this strategy, comprising current plating up to approximately 200 Amps, localized plating with a resolution of approximately 1 mm, and reverse plating to remove material from the dummy electrode accumulated during the dummy plating process and replenish ionic material within the electroplating solution.
    Type: Grant
    Filed: April 9, 2013
    Date of Patent: October 25, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Yi Chang, Liang-Yueh Ou Yang, Chen-Yuan Kao, Hung-Wen Su
  • Patent number: 9459911
    Abstract: A computer system and program product dynamically adjusts a log level of a transaction by: buffering the most detailed logs of a transaction having highest log level into a memory; checking if all dependency-defined transactions within a dependency list/tree for the transaction are completed; and, in response to the completion of all dependency-defined transactions within the dependency list/tree for the transaction, obtaining a log filter level for the transaction in association with the transaction results (success/failure) of dependency-defined transactions, wherein the log filter level is a new log level for the transaction.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: October 4, 2016
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey Ch Liu, Chih-Wen Su, Ivan Nestlerode, Johnson Ys Chang, Giant HM Tu
  • Publication number: 20160283437
    Abstract: A system for improving memory management in a hybrid programming environment where a server program receives a request to execute a script. The server program instructs an embedded script engine to execute the script. The server program creates a session manager to manage objects associated with the script. The objects are comprised of host objects that reside in a program memory space, and script objects that reside in an embedded script engine memory space. The session manager creates a session associated with the execution of the script, and associated objects created during the execution of the script. Upon receiving notification of completion and/or termination of the execution of the script, the server program requests invalidation and/or deletion of the objects associated with the session. Deletion of host objects immediately releases memory in the program memory space without waiting for the scheduled garbage collection.
    Type: Application
    Filed: March 25, 2015
    Publication date: September 29, 2016
    Inventors: Tony Ffrench, Libra C. Huang, Mei-Jiuang Juang, Timothy J. Smith, Chih-Wen Su, Yi-hong Wang
  • Patent number: D770354
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: November 1, 2016
    Assignee: GOGORO INC.
    Inventors: Hok-Sum Horace Luke, Chien-Chih Weng, Hsin-Wen Su, Song-Fu Wang, Chi-Wang Lien
  • Patent number: D774985
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: December 27, 2016
    Assignee: GOGORO INC.
    Inventors: Hok-Sum Horace Luke, Chien-Chih Weng, Hsin-Wen Su, Song-Fu Wang