Abstract: The present invention relates to an apparatus and a method thereof for adjusting a luminance of an image signal. The apparatus includes a complementary circuit, a statistical circuit, a calculating circuit, and a blending circuit. The complementary circuit receives an image signal to generate a complementary luminance according to the luminance of the image signal. The statistical circuit receives the image signal to generate a statistical signal according to the luminance of the image signal. The calculating circuit receives the image signal, the complementary luminance, and the statistical signal to generate a calculated luminance of the image signal. The blending circuit generates an output image signal according to the calculated luminance and the luminance of the image signal. A video display device can thereby displays optimum pictures according to the output image signal.

Abstract: A passive fuel cell system including at least one cell unit, an anode fuel supplying unit, a cathode fuel supplying unit, and a heat-conductive material layer is provided. The cell unit includes a cathode current collector, an anode current collector, and a membrane electrode assembly disposed between them. The anode fuel supplying unit is disposed on a side of the anode current collector, and the cathode fuel supplying unit is disposed on a side of the cathode current collector. The heat-conductive material layer is disposed between the cathode current collector and the cathode fuel supplying unit and/or between the anode current collector and the anode fuel supplying unit. And, a portion of the heat-conductive material layer extends to the outside of a cell system reaction area defined by the cell unit, the anode fuel supplying unit, and the cathode fuel supplying unit along a direction parallel to the cell unit.

Abstract: A method of chip manufacturing, comprises of a design stage; a simulation stage; a foundry stage; a testing/packaging stage; a cutting stage; and a final coating stage. The present invention provides a method of chip testing comprises of disposing a substrate layer on a wafer having a plurality of chips; exposing a plurality of pads on the chips of the wafer; forming bumps on the pads of the chips of the wafer; performing tests from the bumps on the chips of the wafer. Alternatively, the present invention provides a method of chip testing comprises of disposing a substrate layer on a wafer having a plurality of chips; connecting a plurality of pads on the chips of the wafer to a plurality of corresponding pads on the substrate layer; planting bumps on the pads on the opposite side of the substrate layer; performing tests from the bumps on the substrate layer.

Abstract: A ball circulation system for linear guide way includes a slide rail, a slider coupled with the slide rail, and two end covers of the slider with an oil scraper. A cross-wise circulation passage and a separated circulation passage respectively formed at two side of the end cover are integrally combined in one structure so as to form two independent and opposite ball circulations. By so space in the circulation system is able to accommodate more rolling balls by twice filling procedure thereby improving the efficiency of assembly work. Besides, up and down motion of the rolling balls during circulation causes a uniform lubrication effect. Allowing accommodation of more rolling balls means substantially improving load carrying ability of the linear guide way.

Abstract: A Mixed-voltage input and output (I/O) buffer including a pre-driver unit, a bulk-voltage generating unit, a first to a third transistors and an input stage unit is provided. The pre-driver unit outputs a first source/drain and a second signal. The bulk-voltage generating unit determines whether a first voltage or a pad voltage is used as a bulk voltage according to the pad voltage level. A gate of the first transistor receives the first signal, and a bulk, a first source/drain and a second source/drain of the first transistor are respectively coupled to the bulk voltage, the first voltage and the pad. A gate of the third transistor receives the second signal, and a first source/drain and a second source/drain of the third transistor are respectively coupled to the input stage unit for receiving an input signal from the pad and a second voltage.

Abstract: A semiconductor layout includes a p substrate, a first semiconductor cell formed over the p substrate, and a second semiconductor cell formed over the p substrate adjacent to the first semiconductor cell. A total height of the first semiconductor cell and the second semiconductor cell is twice a height of a standard semiconductor cell, and the height of the second semiconductor cell is adjusted according to the height of the first semiconductor cell.

Abstract: A semiconductor structure having improved adhesion between a low-k dielectric layer and the underlying layer and a method for forming the same are provided. The semiconductor substrate includes a dielectric layer over a semiconductor substrate, an adhesion layer on the dielectric layer wherein the adhesion layer comprises a transition sub-layer over an initial sub-layer, and wherein the transition sub-layer has a composition that gradually changes from a lower portion to an upper portion. A low-k dielectric layer is formed on the adhesion layer. Damascene openings are formed in the low-k dielectric layer. A top portion of the transition sub-layer has a composition substantially similar to a composition of the low-k dielectric layer. A bottom portion of the transition sub-layer has a composition substantially similar to a composition of the initial sub-layer.

Abstract: A pigment-adhering apparatus for the printer device is provided. The pigment-adhering apparatus includes a pressing roller having two contacting components and a feeding component between the two contacting components. The feeding component transports an printed object to be printed and the pressing roller provides a pressure to a heat conducting film. The contacting components make the heat conducting film move with the pressing roller at the same speed.

Abstract: Bond pad structures are presented. Some embodiments of the structure include a conductive conductor-insulator layer overlying a substrate. The conductive conductor-insulator layer includes a composite region having a conductor sub-region and insulator sub-region, which neighbor each other, and a single material region. The insulator is harder than the conductor.

Abstract: A linear motion guide device includes a slider and two end caps attached to side portions of the slider, one or more guide beams attached to the slider and engaged between the end caps for retaining a ball bearing device to the slider, and one or more retaining devices attached to the end caps and engaged with the guide beam for attaching the guide beam to the slider without fasteners or tools, one of the end caps includes a latch device for engaging with one end of the retaining device and for securing the retaining device to the end cap, and the retaining device may include one or more protrusions for engaging with the other end cap.

Abstract: A method for forming a cap layer for an interconnect structure is provided. The method includes providing a substrate; depositing a low-k dielectric layer comprising a first porogen over the substrate; depositing a low-k cap layer comprising a second porogen on the low-k dielectric layer; and curing the low-k dielectric layer and the low-k cap layer simultaneously to remove the first and the second porogens, so that a first porosity in the low-k dielectric layer and a second porosity in the low-k cap layer are created. The second porosity is preferably less than the first porosity. Preferably, the low-k dielectric layer and the low-k cap layer comprise a common set of precursors and porogens, and are in-situ performed.

Abstract: A fuser assembly for an electrophotographic device includes a tubular roller, a pressing member, a pressing roller, and a heater. The pressing member is disposed in the tubular roller, and includes a tubular part that has a flat surface. The pressing roller presses the tubular roller against the flat surface of the tubular part of the pressing member. The heater is disposed in the tubular part of the pressing member.

Abstract: A fuser assembly for an electrophotographic device includes a tubular roller, a pressing member that is disposed in the tubular roller and that has a flat surface, a pressing roller that presses the tubular roller against the flat surface of the pressing member, and a heater that is disposed in the tubular roller and that is separated from the pressing member.

Abstract: A method for testing power switches using a logic gate tree, the method includes providing a logic gate tree electrically connected to a plurality of power switches, each output node of the plurality of power switches being electrically connected to a corresponding input node of a logic gate of the logic gate tree; applying a pattern of control signals to the plurality of power switches for controlling on-off states of the plurality of power switches; and determining whether an output voltage signal of an output node of the logic gate tree matches a predetermined value corresponding to the pattern of control signals.

Abstract: A cap cover suitable for a furnace for semiconductor process is provided. The furnace includes a plurality of injectors and a base, and the cap cover is disposed on the base of the furnace. The cap cover includes a circular plate and an outer ring. The outer ring is disposed on the outer edge of the circular plate and extends upward from a surface of the circular plate not facing the base. The outer ring has a gap, and the gap is sufficient to accommodate the injectors.

Abstract: A linear motion guide device includes a slide having a housing, and two end caps secured to sides of the housing and each including a space aligned with a chamber of the housing, for slidably receiving an elongate track rail. One or more dust shields each includes one end detachably anchored to one of the end caps with such as one or more catches, and the other end detachably anchored to the other end cap with such as one or more latches or fingers, for detachably securing the dust shield to the end caps and the housing without additional fasteners. The end caps and the housing each includes a recess for receiving and seating the dust shield.

Abstract: Methods and apparatuses for motion detection are disclosed. One proposed method includes: detecting at least a field to generate a plurality of statistical values; determining at least one threshold value according to the plurality of statistical values; and performing motion detection on pixel positions of a subsequent field according to the determined threshold value.

Abstract: An integrated circuit includes an etch stop layer over a substrate; a UV blocker layer on the etch stop layer, wherein the UV blocker layer has a high extinction coefficient; and a low-k dielectric layer on the UV blocker layer.

Abstract: A roller circulating device for a linear guideway is formed with a plurality of grooves for enabling a plurality of rollers to circulate therein. The roller circulating device is characterized in that: the respective return paths are connected to the forward path through a tapered surface. And along a direction of a radial surface of the respective rollers, the tapered surface is tapered from the respective return paths to the forward path, thus preventing the rollers from tilting and being jammed, so that the rollers can circulate smoothly.

Abstract: A method of chip manufacturing, comprises of a design stage; a simulation stage; a foundry stage; a testing/packaging stage; a cutting stage; and a final coating stage. The present invention provides a method of chip testing comprises of disposing a substrate layer on a wafer having a plurality of chips; exposing a plurality of pads on the chips of the wafer; forming bumps on the pads of the chips of the wafer; performing tests from the bumps on the chips of the wafer. Alternatively, the present invention provides a method of chip testing comprises of disposing a substrate layer on a wafer having a plurality of chips; connecting a plurality of pads on the chips of the wafer to a plurality of corresponding pads on the substrate layer; planting bumps on the pads on the opposite side of the substrate layer; performing tests from the bumps on the substrate layer.