Abstract: A method for fabricating semiconductor device includes the steps of first forming a gate structure on a substrate, forming a spacer adjacent to the gate structure, forming a recess adjacent to the spacer, trimming part of the spacer, and then forming an epitaxial layer in the recess. Preferably, the semiconductor device includes a first protrusion adjacent to one side of the epitaxial layer and a second protrusion adjacent to another side of the epitaxial layer, the first protrusion includes a V-shape under the spacer and an angle included by the V-shape is greater than 30 degrees and less than 90 degrees.

Abstract: A first gate and a second gate are formed on a substrate with a gap between the first and second gates. The first gate has a first sidewall. The second gate has a second sidewall directly facing the first sidewall. A first sidewall spacer is disposed on the first sidewall. A second sidewall spacer is disposed on the second sidewall. A contact etch stop layer is deposited on the first and second gates and on the first and second sidewall spacers. The contact etch stop layer is subjected to a tilt-angle plasma etching process to trim a corner portion of the contact etch stop layer. An inter-layer dielectric layer is then deposited on the contact etch stop layer and into the gap.

Abstract: A method for aligning to a pattern on a wafer is disclosed. The method includes the steps of obtaining a first inline image from a first sample wafer, obtaining a first contour pattern of an alignment mark pattern from the first inline image, using the first contour pattern to generate a first synthetic image in black and white pixels, using the first synthetic image as a reference to recognize the alignment mark pattern on a tested wafer, and aligning to a tested pattern on the tested wafer according to a position of the alignment mark pattern on the tested wafer and a coordinate information.

Abstract: The invention provides a deposition machine, which comprises a chamber, a first pipeline and a second pipeline, wherein one end of the first pipeline and one end of the second pipeline are connected to the chamber, and a part of the second pipeline passes through a sidewall of the first pipeline and extends into the interior of the first pipeline. The deposition machine has the advantages of reducing the risk of pipeline blockage.

Abstract: A method of manufacturing a metal mask includes calendering a metal material, so as to form a metal mask substrate, where the metal mask substrate includes a surface and a plurality of grooves formed in the surface, and the grooves all extend in a direction. The surface has at least one sampling region, while at least two grooves are distributed in the sampling region, where an average area ratio of the area of the grooves within the sampling region to the area of the sampling region ranges between 45% and 68%.

Abstract: The present application relates to the field of semiconductor manufacturing technologies, and in particular to a method and an apparatus for automatically processing wafers. The method for automatically processing the wafers includes the following steps: providing several wafers, wherein the wafers operate on a primary path, and the primary path is a path for forming semiconductor structures on the surfaces of the wafers; determining whether there is a need for detecting defects of the wafers, and if yes, automatically switching an operating path of the wafers to a secondary path; detecting the defects of the wafers in the secondary path; and determining whether the defect detection on the wafers is finished, and if yes, automatically switching the operating path of the wafers to the primary path. The application makes it possible to automatically detect the defects of the wafers with different SWR conditions, thereby improving the automation degree of machines.

Abstract: The present application relates to a grinding machine for tungsten electrode, which includes a driving device and a grinding device arranged on a driving end of the driving device. The grinding device includes a mounting assembly and an adjusting assembly. The mounting assembly is mounted on the driving device, the driving end of the driving device passes through the mounting assembly, the mounting assembly is provided with a grinding chamber, a grinding plate is provided at the driving end of the driving device, and the grinding plate is positioned in the grinding chamber. The adjusting assembly is rotatably connected to the mounting assembly, the adjusting assembly is provided with a clamping component, and the adjusting assembly is configured to adjust a grinding angle of the tungsten electrode on the grinding plate.

Abstract: The present disclosure provides a biomaterial and a method for promoting tissue regeneration by using the biomaterial.

Abstract: A method for fabricating semiconductor device includes the steps of first forming a gate structure on a substrate, forming a spacer adjacent to the gate structure, forming a recess adjacent to the spacer, trimming part of the spacer, and then forming an epitaxial layer in the recess. Preferably, the semiconductor device includes a first protrusion adjacent to one side of the epitaxial layer and a second protrusion adjacent to another side of the epitaxial layer, the first protrusion includes a V-shape under the spacer and an angle included by the V-shape is greater than 30 degrees and less than 90 degrees.

Abstract: Methods and apparatus are provided for eyeglass lens made using a solution casting process. The method may include providing a first soluble polymer solution. The method may include providing a first dye solution including at least one dye. The method may include adding the first dye solution to the first soluble polymer solution to form a first dyed solution. The method may include casting the first dyed solution to form a first film. The method may include providing a second soluble polymer solution. The method may include providing a second dye solution comprising at least one dye. The method may include adding the second dye solution to the second soluble polymer solution to form a second dyed solution. The method may include casting the second dyed solution onto the first film to form a two-layer film. The method may include laminating or casting the two-layer film to the eyeglass lens.

Abstract: A semiconductor device includes a resistor disposed on a second etching stop layer in the resistor forming region. A fourth interlayer dielectric layer covers the resistor and the second etch stop layer. A first via is located in the fourth interlayer dielectric layer and is electrically connected to a terminal of the resistor. By forming the resistor in BEOL process, the problem of the contact stop depth difference that affects the process window and causes the reduced yield can be improved.

Abstract: An apparatus for thermally processing a substrate includes a substrate support for holding the substrate and lamps disposed above the substrate support. The lamps are grouped into concentric lamp zones including a center zone comprised of a center lamp and peripheral lamps surrounding the center lamp. A center sleeve is coupled to the center lamp and peripheral sleeves are coupled to the peripheral lamps, respectively, for directing radiated heat to the substrate during thermal processing. The center sleeve has a higher surface roughness than that of the peripheral sleeves.

Abstract: A method for forming a semiconductor structure includes forming a gate structure on a substrate, performing a deposition process to form a nitride layer to cover the substrate and the gate structure, performing an in-situ annealing process to the nitride layer, and performing an anisotropic etching process to the nitride layer after the in-situ annealing process to form a spacer on a sidewall of the gate structure.

Abstract: A cleaning process of wafer polishing pad, the process includes providing a wafer polishing pad, performing a planarization process with the wafer polishing pad, leaving a residue on the wafer polishing pad after the planarization process, and performing a cleaning step with a cleaning nozzle to remove the residue, the cleaning nozzle comprises at least one Y-shaped pipe, one end of which is a water outlet, and the other two ends are respectively a water inlet and an air inlet, wherein a cleaning liquid flows from the water inlet to the water outlet, and a pressurized gas flows in from the air inlet.

Abstract: A method for fabricating a semiconductor transistor is disclosed. A substrate of a first conductivity type is provided. An ion well of a second conductivity type is formed in the substrate. An epitaxial channel layer of the first conductivity type is grown from the main surface of the substrate. A gate dielectric layer is formed on the epitaxial channel layer. A gate is formed on the gate dielectric layer. A source region and a drain region are then formed in the substrate. The source region and the drain region have the first conductivity type.

Abstract: The invention provides a correction and compensation method in a semiconductor manufacturing process. The method includes the following steps: providing a machine, the machine is at least used for exposure manufacturing of a first product and a second product, performing period maintenance (PM) on the machine, recording an original offset map before and after the period maintenance of the machine is performed, the original offset map has an original exposure size, and adjusting the original exposure size of the original offset map to correspond to a first exposure size of the first product, and performing a first offset compensation correction on the first product. And adjusting the original exposure size of the original offset map to correspond to a second exposure size of the second product, and performing a second offset compensation correction on the second product.

Abstract: The inhibition device includes a micro-controller configured with a triggering condition including a number of intervals and, for each interval, a corresponding duration and a corresponding threshold. Each interval is a range specifying how much the vehicle's acceleration pedal has changed its position in terms of percentages of a pedal stroke. Each duration specifies the fastest time duration allowable for the acceleration pedal to attain a corresponding interval of pedal position change. The micro-controller converts progress signals of the acceleration pedal to corresponding percentages, obtains a difference DEF between the successive percentages, records a time duration RES between successive progress signals, and calculates DEF/RES=X. When X is greater than or equal to a threshold of a corresponding interval, the micro-controller sends an idle signal to the vehicle's engine control unit or intercepts the progress signals to prevent them from reaching the engine control unit.

Abstract: Aspects of the invention include splitting a first file retrieved from a first cloud computing environment of a hybrid cloud computing environment into multiple chunks. A respective chunk signature is calculated for each chunk of the multiple chunks, wherein the calculation is based at least in part on static metadata and the dynamic metadata retrieved from the first file. The respective chunk signatures are compared to chunk signatures from a metadata repository to identify a duplicate second file, wherein the first file is a variant of a second file stored in a second cloud computing environment of the hybrid cloud computing environment. Either the first file or the second file is selected as candidate for deletion. The candidate for deletion is deleted.

Abstract: A method of forming semiconductor device is disclosed. A substrate having a logic circuit region and a memory cell region is provided. A first transistor with a first gate is formed in the logic circuit region and a second transistor with a second gate is formed in the memory cell region. A stressor layer is deposited to cover the first transistor in the logic circuit region and the second transistor in the memory cell region. The first transistor and the second transistor are subjected to an annealing process under the influence of the stressor layer to recrystallize the first gate and the second gate.

Abstract: A probe head structure is provided. The probe head structure includes a flexible substrate having a top surface and a bottom surface. The probe head structure includes a first probe pillar passing through the flexible substrate. The first probe pillar has a first protruding portion protruding from the bottom surface. The probe head structure includes a redistribution structure on the top surface of the flexible substrate and the first probe pillar. The redistribution structure is in direct contact with the flexible substrate and the first probe pillar. The redistribution structure includes a dielectric structure and a wiring structure in the dielectric structure. The wiring structure is electrically connected to the first probe pillar. The probe head structure includes a wiring substrate over the redistribution structure. The probe head structure includes a first conductive bump connected between the wiring substrate and the redistribution structure.