Abstract: An LCD having a plurality of test pads applied with a common voltage, covered with respective shielding conductor or located sufficiently far from pixels. A gate wire including pluralities of gate lines and test pads disconnected from the gate lines and located near one ends of the gate lines, and a common electrode wire including a plurality of common electrodes and a common electrode pad connected to the common electrode electrodes are formed on a substrate, and covered with a gate insulating film. A data wire and a pixel electrode wire are formed thereon and covered with a passivation film. The passivation film and the gate insulating film have contact holes exposing the test pads and the common electrode pad. A plurality of connecting members which are connected to the test pads and the common electrode pad through the contact holes are formed on the passivation film.

Abstract: A thin film transistor array substrate for a liquid crystal display includes an insulating substrate with a display area and a peripheral area surrounding the display area. The peripheral area has an upper region above the display area and a lower region below the display area. Signal lines are formed on the substrate such that the signal lines are bundled into a plurality of blocks. Each block has a predetermined number of signal lines. A plurality of first upper repair lines is formed at the upper peripheral region of the substrate, crossing one or more blocks of the signal lines. A plurality of second upper repair lines is formed at the upper peripheral region of the substrate, crossing all of the signal lines. A plurality of first lower repair lines are formed at the lower peripheral region of the substrate, connected to the corresponding first upper repair lines. The first lower repair lines cross the signal lines crossed by the first upper repair lines.

Abstract: A plurality of gate lines and a plurality of data lines intersecting each other are formed on a first insulating substrate having a plurality of first cutouts are formed on the respective pixel areas defined by the data lines and the gate lines. A thin film transistor is connected to each pixel electrode. A reference electrode having a plurality of second cutouts is formed on a second substrate opposite the first substrate. The first cutouts and the second cutouts in the adjacent two pixel areas opposite each other with respect to one data line have an inversion symmetry with respect to the data line.

Abstract: A method for fabricating a thin film array substrate for a liquid crystal display includes steps of forming a gate line assembly and a common electrode line assembly on a first substrate. The gate line assembly includes a plurality of gate lines and gate pads, and the common electrode line assembly includes common signal lines and common electrodes. Thereafter, a gate insulating layer is formed on the first substrate, and a semiconductor pattern and an ohmic contact pattern are formed on the gate insulating layer. A data line assembly and pixel electrodes are then formed on the first substrate. The data line assembly includes a plurality of data lines, data pads, and source and drain electrodes. The pixel electrodes are connected to the drain electrodes while proceeding parallel to the common electrodes. A passivation layer is formed on the substrate. The passivation layer and the gate insulating layer are etched such that the gate pads and the data pads are exposed to the outside.

Abstract: A thin film transistor array substrate for a liquid crystal display includes an insulating substrate with a display area and a peripheral area surrounding the display area. The peripheral area has an upper region above the display area and a lower region below the display area. Signal lines are formed on the substrate such that the signal lines are bundled into a plurality of blocks. Each block has a predetermined number of signal lines. A plurality of first upper repair lines is formed at the upper peripheral region of the substrate, crossing one or more blocks of the signal lines. A plurality of second upper repair lines is formed at the upper peripheral region of the substrate, crossing all of the signal lines. A plurality of first lower repair lines are formed at the lower peripheral region of the substrate, connected to the corresponding first upper repair lines. The first lower repair lines cross the signal lines crossed by the first upper repair lines.

Abstract: A method for fabricating a thin film array substrate for a liquid crystal display includes steps of forming a gate line assembly and a common electrode line assembly on a first substrate. The gate line assembly includes a plurality of gate lines and gate pads, and the common electrode line assembly includes common signal lines and common electrodes. Thereafter, a gate insulating layer is formed on the first substrate, and a semiconductor pattern and an ohmic contact pattern are formed on the gate insulating layer. A data line assembly and pixel electrodes are then formed on the first substrate. The data line assembly includes a plurality of data lines, data pads, and source and drain electrodes. The pixel electrodes are connected to the drain electrodes while proceeding parallel to the common electrodes. A passivation layer is formed on the substrate. The passivation layer and the gate insulating layer are etched such that the gate pads and the data pads are exposed to the outside.

Abstract: A matrix-type display capable of being repaired by pixel unit, Two or more of signal lines such as scanning lines, image signal lines and auxiliary signal lines and a pixel electrode are overlapped via an insulating layer, so that a defect such as the disconnection of the image signal lines and scanning lines, the short of the pixel electrode and the signal line, and the loss of electrode of a switching element, and a pixel defect can be repaired. Here, the layout of the auxiliary gate line and dual gate line can be modified.

Abstract: The invention is directed to simultaneously etching thin films to different uniform depths depending on positions by using a photoresist pattern having different thickness depending on positions as an etch mask in order to form a contact hole for a gate pad along with at least one other layer, or a data wire and a semiconductor pattern, via a single photolithography step.

Abstract: A method for fabricating a thin film array substrate for a liquid crystal display includes steps of forming a gate line assembly and a common electrode line assembly on a first substrate. The gate line assembly includes a plurality of gate lines and gate pads, and the common electrode line assembly includes common signal lines and common electrodes. Thereafter, a gate insulating layer is formed on the first substrate, and a semiconductor pattern and an ohmic contact pattern are formed on the gate insulating layer. A data line assembly and pixel electrodes are then formed on the first substrate. The data line assembly includes a plurality of data lines, data pads, and source and drain electrodes. The pixel electrodes are connected to the drain electrodes while proceeding parallel to the common electrodes. A passivation layer is formed on the substrate. The passivation layer and the gate insulating layer are etched such that the gate pads and the data pads are exposed to the outside.

Abstract: Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched.

Abstract: An LCD has a storage electrode wire between long sides of partitions of a pixel electrode and gate lines or data lines. A gate wire and a storage electrode wire are formed on a substrate and covered with a gate insulating layer. A data wire is formed on the gate insulating layer and covered with a passivation layer. A thin film transistor including gate, source and drain electrodes are provided on the substrate. A pixel electrode is formed on the passivation layer and connected to the drain electrode. The pixel electrode is divided into three partitions, a first one having long and short sides parallel to data lines and gate lines, respectively, and second and third ones vice versa. A storage electrode line and some storage electrodes are disposed between the long sides of the partitions and the gate or the data lines, and between the long sides of the partitions. Other storage electrodes disposed between the short sides of the partitions and the gate or the data lines are covered by the pixel electrode.

Abstract: A method for fabricating a thin film array substrate for a liquid crystal display includes steps of forming a gate line assembly and a common electrode line assembly on a first substrate. The gate line assembly includes a plurality of gate lines and gate pads, and the common electrode line assembly includes common signal lines and common electrodes. Thereafter, a gate insulating layer is formed on the first substrate, and a semiconductor pattern and an ohmic contact pattern are formed on the gate insulating layer. A data line assembly and pixel electrodes are then formed on the first substrate. The data line assembly includes a plurality of data lines, data pads, and source and drain electrodes. The pixel electrodes are connected to the drain electrodes while proceeding parallel to the common electrodes. A passivation layer is formed on the substrate. The passivation layer and the gate insulating layer are etched such that the gate pads and the data pads are exposed to the outside.

Abstract: A mask for fabricating a liquid crystal display with a substrate includes a first mask pattern placed at the center of the substrate with the center line to expose the center of the substrate to light. A second mask pattern is placed to the left of the first mask pattern to expose the left side of the substrate to light. The second mask pattern is spaced apart from the first mask pattern with a first distance. A third mask pattern is placed to the right of the first mask pattern to expose the right side of the substrate to light. The third mask pattern is spaced apart from the first mask pattern with a second distance.

Abstract: A passivation layer is deposited and a photoresist is formed. The photoresist includes first to third portions with decreased thickness, the second portions located on portions of drain electrodes and data lines and the third portions located on portions of gate lines. A mask for forming the photoresist has rectilinear slits with width and distance of about 0.8-2.0 microns on an area corresponding to the second portions. The passivation layer and an underlying semiconductor layer as well as the photoresist are etched to expose portions of the gate insulating layer under the third portions of the photoresist as well as portions of the passivation layer under the second portions of the photoresist. The exposed portions of the passivation layer and the gate insulating layer are removed to expose the drain electrodes, the gate lines and the data lines as well as portions of the semiconductor layer, which are subsequently removed.

Abstract: A liquid crystal display includes: a first substrate; a first signal line formed on the first substrate and extending in a direction; a second signal line intersecting the first signal line while being insulated; a pixel electrode formed in a pixel area defined by intersections of the first signal line and the second signal line, the pixel electrode having a plurality of partitions; a switching element connected to the first signal line, the second signal line, and the pixel electrode; a second substrate opposite the first substrate; a black matrix formed on the second substrate; and a common electrode formed over the second substrate having a plurality of domain defining members, wherein each domain is enclosed by the partitions of the pixel electrode and the domain defining members and has at least one long side parallel or perpendicular to the first signal line and at least one short side curved at an angle of about 30 to about 60 degrees with the first signal line.

Abstract: A plurality of gate lines extending in a horizontal direction are formed on an insulating substrate, and a data line is formed perpendicular to the gate line thereby defining a pixel of a matrix array. Pixel electrodes receiving image signals through the data line are formed in a pixel, and a thin film transistor having a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode connected to the pixel electrode is formed on the portion where the gate lines and the data lines intersect. A storage wire including a storage electrode line is formed in the horizontal direction, and a storage electrode connected to the storage electrode line and forming a storage capacitance by overlapping the pixel electrode is formed in the pixel. A redundant repair line both ends of which overlap the storage wire of the neighboring pixel, and a storage wire connection line connecting the storage wires of a neighboring pixel are formed.

Abstract: In a method of manufacturing a liquid crystal display using a divisional exposure for a substrate, an overlapping area at the boundary between adjacent shots is provided and the shots left and right to the boundary are exposed in a way that the areas of the shots gradually decreases and gradually increases, respectively, to reduce the brightness difference due to stitch errors between the two shots. For example, the number of unit stitch areas assigned to the left gradually decreases and the number of unit stitch areas assigned to the right shot gradually increases as it goes to the right along the transverse direction in the stitch area. A unit stitch includes an area obtained by dividing a pixel into at least two parts.

Abstract: The present invention relates to the formation, on a substrate having a display area and a peripheral area, of a gate wire including a plurality of gate lines and gate electrodes in a display area and gate pads in the peripheral area, and of a common wire, including a common signal line and a plurality of common electrodes in the display area. The substrate is fabricated by using less number of steps of photo masks. A photo mask having multiple thickness is used for a photolithography step with less number of masks.

Abstract: An LCD has a storage electrode wire between long sides of partitions of a pixel electrode and gate lines or data lines. A gate wire and a storage electrode wire are formed on a substrate and covered with a gate insulating layer. A data wire is formed on the gate insulating layer and covered with a passivation layer. A thin film transistor including gate, source and drain electrodes are provided on the substrate. A pixel electrode is formed on the passivation layer and connected to the drain electrode. The pixel electrode is divided into three partitions, a first one having long and short sides parallel to data lines and gate lines, respectively, and second and third ones vice versa. A storage electrode line and some storage electrodes are disposed between the long sides of the partitions and the gate or the data lines, and between the long sides of the partitions. Other storage electrodes disposed between the short sides of the partitions and the gate or the data lines are covered by the pixel electrode.

Abstract: An ITO (indium tin oxide) layer and a negative photoresist are deposited sequentially on the substrate 100 having a gate wire, a storage wire, a data wire and a storage electrode. The negative photoresist is developed through front exposure and the ITO layer is etched to form a pixel electrode. Because the portions of negative photoresist exposed to light remain after development, pixel defects due to particles placed between pixel regions are reduced. Both the rear exposure and the front exposure may be used. In the rear exposure, it is difficult to remain the portions of the ITO layer at the positions corresponding to the contact portion of the drain electrode and the pixel electrode, the storage line, the gate pads and the data pads. Accordingly, the front exposure is then executed by using the first mask having openings thereon. The negative photoresist is developed, and the ITO layer is patterned.