Patents by Inventor Woon-Yong Park

Woon-Yong Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6787809
    Abstract: Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched.
    Type: Grant
    Filed: August 21, 2003
    Date of Patent: September 7, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Mun-Pyo Hong, Woon-Yong Park, Jong-Soo Yoon
  • Patent number: 6771343
    Abstract: An LCD has a storage electrode wire between long sides of partitions of a pixel electrode and gate lines or data lines. A gate wire and a storage electrode wire are formed on a substrate and covered with a gate insulating layer. A data wire is formed on the gate insulating layer and covered with a passivation layer. A thin film transistor including gate, source and drain electrodes are provided on the substrate. A pixel electrode is formed on the passivation layer and connected to the drain electrode. The pixel electrode is divided into three partitions, a first one having long and short sides parallel to data lines and gate lines, respectively, and second and third ones vice versa. A storage electrode line and some storage electrodes are disposed between the long sides of the partitions and the gate or the data lines, and between the long sides of the partitions. Other storage electrodes disposed between the short sides of the partitions and the gate or the data lines are covered by the pixel electrode.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: August 3, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Il-Gon Kim, Woon-Yong Park, Byoung-Sun Na, Yu-Ri Song, Seung-Soo Baek, Young-Mi Tak, Sahng-Ik Jun
  • Publication number: 20040141099
    Abstract: A gate line is formed on a substrate in a horizontal direction and a data repair line is formed on the same layer as the gate line in a vertical direction. The repair line is divided into two portions with respect to the gate line. A gate insulating film is formed on the gate line and the data repair line, and a data line is formed on the gate insulating film along the repair line having a smaller width than the repair line, a passivation film being deposited thereon. Contact holes are formed in the passivation film, and contact holes to expose both ends of the divided repair line are formed in the passivation film and gate insulating film. A transparent connecting pattern formed on the passivation film contacts the data line and the repair line through the contact holes. Both ends of the repair line are extended from the data line. A pixel electrode is formed on the passivation film, and the pixel electrode overlaps the edges of the repair line at a predetermined width.
    Type: Application
    Filed: December 19, 2003
    Publication date: July 22, 2004
    Inventors: Sang-Soo Kim, Dong-Gyu Kim, Woon-Yong Park
  • Publication number: 20040095518
    Abstract: The present invention relates to a method of forming a pattern on a substrate and a method of manufacturing a liquid crystal display panel using the same. In order to decrease stitch defect, the shot boundary lines for respective layers of patterns do not overlap each other to be dispersed. Specifically, according to a method of forming patterns of the present invention, after a first material layer is first formed on a substrate, a first pattern is formed by performing a first photo etching including divisional light exposure with at least two areas across at least one shot boundary line on the first material layer. Subsequently, after a second material layer is formed on the first pattern, a second pattern is formed by performing a second photo etching including divisional light exposure with at least two areas across at least one shot boundary line on the second material layer. The shot boundary line in the second photo etching is spaced apart from the shot boundary line in the first photo etching.
    Type: Application
    Filed: November 28, 2003
    Publication date: May 20, 2004
    Inventors: Young-Mi Tak, Woon-Yong Park, Jung-Ho Lee, Mun-Pyo Hong, Kyuha Chung
  • Publication number: 20040090566
    Abstract: A gate line extending in a horizontal direction is formed on an insulating substrate, and a data line is formed perpendicular to the gate line defining a pixel of a matrix array. Pixel electrodes receiving image signals through the data line are formed in a pixel, and a thin film transistor having a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode connected to the pixel electrode is formed on the portion where the gate lines and the data lines intersect. A storage wire including a storage electrode line in the horizontal direction, a storage electrode connected to the storage electrode line, and at least one of the storage electrode connection portions connecting storage electrodes of neighboring pixels is formed in the same direction as the gate line.
    Type: Application
    Filed: November 4, 2003
    Publication date: May 13, 2004
    Inventors: Cheol-Soo Jung, Young-Sun Kim, Ho-Joon Lee, Yeong-Hwan Cho, Hyeon-Hwan Kim, Bung-Hyuk Min, Woon-Yong Park, Il-Gon Kim, Jang-Soo Kim, Jin-Oh Kwag, Seog-Chae Lee
  • Publication number: 20040067445
    Abstract: A gate wire including a plurality of gate lines and gate electrodes in the display area, and gate pads in the peripheral area is formed on a substrate having a display area and a peripheral area. A gate insulating layer, a semiconductor layer, an ohmic contact layer and a conductor layer are sequentially deposited, and the conductor layer and the ohmic contact are patterned to form a data wire including a plurality of data lines, a source electrode and a drain electrode of the display area and data pads of the peripheral area, and an ohmic contact layer pattern thereunder. A passivation layer is deposited and a positive photoresist layer is coated thereon. The photoresist layer is exposed to light through one or more masks having different transmittance between the display area and the peripheral area. The photoresist layer is developed to form a photoresist pattern having the thickness that varies depending on the position.
    Type: Application
    Filed: July 28, 2003
    Publication date: April 8, 2004
    Inventors: Woon-Yong Park, Bum-Ki Baek
  • Patent number: 6717634
    Abstract: A gate line is formed on a substrate in a horizontal direction and a data repair line is formed on the same layer as the gate line in a vertical direction. The repair line is divided into two portions with respect to the gate line. A gate insulating film is formed on the gate line and the data repair line, and a data line is formed on the gate insulating film along the repair line having a smaller width than the repair line, a passivation film being deposited thereon. Contact holes are formed in the passivation film, and contact holes to expose both ends of the divided repair line are formed in the passivation film and gate insulating film. A transparent connecting pattern formed on the passivation film contacts the data line and the repair line through the contact holes. Both ends of the repair line are extended from the data line. A pixel electrode is formed on the passivation film, and the pixel electrode overlaps the edges of the repair line at a predetermined width.
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: April 6, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Soo Kim, Dong-Gyu Kim, Woon-Yong Park
  • Publication number: 20040036073
    Abstract: Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched.
    Type: Application
    Filed: August 21, 2003
    Publication date: February 26, 2004
    Inventors: Mun-Pyo Hong, Woon-Yong Park, Jong-Soo Yoon
  • Publication number: 20040021801
    Abstract: A mask for fabricating a liquid crystal display with a substrate includes a first mask pattern placed at the center of the substrate with the center line to expose the center of the substrate to light. A second mask pattern is placed to the left of the first mask pattern to expose the left side of the substrate to light. The second mask pattern is spaced apart from the first mask pattern with a first distance. A third mask pattern is placed to the right of the first mask pattern to expose the right side of the substrate to light. The third mask pattern is spaced apart from the first mask pattern with a second distance.
    Type: Application
    Filed: April 22, 2003
    Publication date: February 5, 2004
    Inventors: Young-Mi Tak, Woon-Yong Park, Mun-Pyo Hong, Jung-Ho Lee
  • Publication number: 20040012727
    Abstract: The present invention relates to a liquid crystal display having repair lines and methods of repairing defect in the same. The liquid crystal display comprises a plurality of gate lines in horizontal direction, a plurality of data lines perpendicular thereto, and a plurality of repair lines repeatedly formed corresponding to a fixed number of data lines. The repair line comprises an upper portion crossing top of the data lines, a lower portion crossing bottom of the data lines, and a middle portion which is parallel to the data line connecting the upper and the lower portions. A repair line is formed repeatedly for each data-line block which consists of data lines in any multiples of three. Under the above wiring structure, a disconnected data line is repaired by shorting the crossing points of the data line and the repair line corresponding to the data-line block of the disconnected data line.
    Type: Application
    Filed: July 16, 2003
    Publication date: January 22, 2004
    Inventors: Dong-Gyu Kim, Woon-Yong Park, Jong-Woong Chang
  • Publication number: 20040007705
    Abstract: A thin film transistor array panel is provided, which includes: an insulating substrate; a gate line formed on the substrate; a plurality of storage conductors formed on the substrate, each storage conductor including a plurality of branches; a gate insulating layer formed on the gate line and the storage conductor; a semiconductor layer formed on the gate insulating layer; a data conductor formed on the semiconductor layer; a passivation layer formed on the data conductor; and a pixel electrode formed on the passivation layer, wherein at most one of the branches of each storage conductor has an isolated end.
    Type: Application
    Filed: July 10, 2003
    Publication date: January 15, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yu-Ri Song, Woon-Yong Park
  • Patent number: 6678018
    Abstract: A method for fabricating a thin film array substrate for a liquid crystal display includes steps of forming a gate line assembly and a common electrode line assembly on a first substrate. The gate line assembly includes a plurality of gate lines and gate pads, and the common electrode line assembly includes common signal lines and common electrodes. Thereafter, a gate insulating layer is formed on the first substrate, and a semiconductor pattern and an ohmic contact pattern are formed on the gate insulating layer. A data line assembly and pixel electrodes are then formed on the first substrate. The data line assembly includes a plurality of data lines, data pads, and source and drain electrodes. The pixel electrodes are connected to the drain electrodes while proceeding parallel to the common electrodes. A passivation layer is formed on the substrate. The passivation layer and the gate insulating layer are etched such that the gate pads and the data pads are exposed to the outside.
    Type: Grant
    Filed: February 9, 2001
    Date of Patent: January 13, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woon-Yong Park, Hyeon-Hwan Kim, Dong-Hyeon Ki
  • Publication number: 20040001176
    Abstract: A matrix-type display capable of being repaired by pixel unit, Two or more of signal lines such as scanning lines, image signal lines and auxiliary signal lines and a pixel electrode are overlapped via an insulating layer, so that a defect such as the disconnection of the image signal lines and scanning lines, the short of the pixel electrode and the signal line, and the loss of electrode of a switching element, and a pixel defect can be repaired. Here, the layout of the auxiliary gate line and dual gate line can be modified.
    Type: Application
    Filed: July 28, 2003
    Publication date: January 1, 2004
    Inventors: Kyung-seop Kim, Woon-yong Park, Jung-hee Lee, Shi-yual Kim, Kyung-nam Lee, Dong-gyu Kim
  • Patent number: 6657231
    Abstract: A gate line extending in a horizontal direction is formed on an insulating substrate, and a data line is formed perpendicular to the gate line defining a pixel of a matrix array. Pixel electrodes receiving image signals through the data line are formed in a pixel, and a thin film transistor having a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode connected to the pixel electrode is formed on the portion where the gate lines and the data lines intersect. A storage wire including a storage electrode line in the horizontal direction, a storage electrode connected to the storage electrode line, and at least one of the storage electrode connection portions connecting storage electrodes of neighboring pixels is formed in the same direction as the gate line.
    Type: Grant
    Filed: June 17, 2002
    Date of Patent: December 2, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Cheol-Soo Jung, Young-Sun Kim, Ho-Joon Lee, Yeong-Hwan Cho, Hyeon-Hwan Kim, Bung-Hyuk Min, Woon-Yong Park, Il-Gon Kim, Jang-Soo Kim, Jin-Oh Kwag, Seog-Chae Lee
  • Patent number: 6649934
    Abstract: A gate wire is formed on an insulating substrate by a photolithography process using the first mask, and a gate insulating layer and a semiconductor layer are sequentially deposited. Then, an ohmic contact layer made of silicide or microcrystallized and doped amorphous silicon is formed on the semiconductor layer. Then, a triple pattern including a gate insulating layer, a semiconductor layer and an ohmic contact layer are patterned at the same time by a photolithography process using the second mask. At this time, a contact hole exposing the gate pad is formed. An ITO layer and a metal layer are deposited and patterned to form a data wire, a pixel electrode, and a redundant gate pad by a photolithography process using the third mask. The ohmic contact layer, which is not covered with the ITO layer and the metal layer, is removed. A passivation layer is deposited and patterned by a photolithography process using the fourth mask.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: November 18, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-Ho Song, Woon-Yong Park
  • Publication number: 20030210359
    Abstract: A data line and an amorphous silicon pattern are formed on a substrate. The first electrode pattern is extended from the data line and overlaps an edge of the amorphous silicon pattern. The second electrode pattern is made of the same metal as the first electrode pattern and overlaps the edge of the amorphous silicon pattern at an opposite side of the first electrode pattern. Edges of the first and the second electrode patterns are sharply formed so that a tunneling effect easily occurs through the amorphous silicon pattern. An indium-tin-oxide pattern for a capacitor is formed at the end of the second electrode pattern. The capacitor is formed between the ITO pattern and a common electrode.
    Type: Application
    Filed: June 20, 2003
    Publication date: November 13, 2003
    Inventors: Joo-Hyung Lee, Dong-Gyu Kim, Woon-Yong Park
  • Patent number: 6642074
    Abstract: Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: November 4, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Mun-Pyo Hong, Woon-Yong Park, Jong-Soo Yoon
  • Publication number: 20030201438
    Abstract: A plurality of gate lines extending in a horizontal direction are formed on an insulating substrate, and a data line is formed perpendicular to the gate line thereby defining a pixel of a matrix array. Pixel electrodes receiving image signals through the data line are formed in a pixel, and a thin film transistor having a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode connected to the pixel electrode is formed on the portion where the gate lines and the data lines intersect. A storage wire including a storage electrode line is formed in the horizontal direction, and a storage electrode connected to the storage electrode line and forming a storage capacitance by overlapping the pixel electrode is formed in the pixel. A redundant repair line both ends of which overlap the storage wire of the neighboring pixel, and a storage wire connection line connecting the storage wires of a neighboring pixel are formed.
    Type: Application
    Filed: May 8, 2003
    Publication date: October 30, 2003
    Inventor: Woon-Yong Park
  • Patent number: 6621545
    Abstract: A gate wire including a plurality of gate lines and gate electrodes in the display area, and gate pads in the peripheral area is formed on a substrate having a display area and a peripheral area. A gate insulating layer, a semiconductor layer, an ohmic contact layer and a conductor layer are sequentially deposited, and the conductor layer and the ohmic contact are patterned to form a data wire including a plurality of data lines, a source electrode and a drain electrode of the display area and data pads of the peripheral area, and an ohmic contact layer pattern thereunder. A passivation layer is deposited and a positive photoresist layer is coated thereon. The photoresist layer is exposed to light through one or more masks having different transmittance between the display area and the peripheral area. The photoresist layer is developed to form a photoresist pattern having the thickness that varies depending on the position.
    Type: Grant
    Filed: October 2, 2001
    Date of Patent: September 16, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woon-Yong Park, Bum-Ki Baek
  • Patent number: 6618101
    Abstract: The present invention relates to a liquid crystal display having repair lines and methods of repairing defect in the same. The liquid crystal display comprises a plurality of gate lines in horizontal direction, a plurality of data lines perpendicular thereto, and a plurality of repair lines repeatedly formed corresponding to a fixed number of data lines. The repair line comprises an upper portion crossing top of the data lines, a lower portion crossing bottom of the data lines, and a middle portion which is parallel to the data line connecting the upper and the lower portions. A repair line is formed repeatedly for each data-line block which consists of data lines in any multiples of three. Under the above wiring structure, a disconnected data line is repaired by shorting the crossing points of the data line and the repair line corresponding to the data-line block of the disconnected data line.
    Type: Grant
    Filed: October 19, 2001
    Date of Patent: September 9, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Gyu Kim, Woon-Yong Park, Jong-Woong Chang