Abstract: The power supply device is configured on an aircraft and includes a secondary battery, a transformer, a fuel cell and a bypass switch. The transformer is electrically connected between the secondary battery and the aircraft. The fuel cell is suitable for providing a first output current to the aircraft. The bypass switch is connected in parallel with the transformer. The transformer has a first output voltage set value. When a first output terminal voltage of the fuel cell is lower than the first output voltage set value and the bypass switch is in a non-conducting state, a second output current of the secondary battery is provided to the aircraft via the transformer. When the first output terminal voltage is lower than the first output voltage set value and the bypass switch is in a conducting state, the second output current is provided to the aircraft via the bypass switch.

Abstract: A control system and a control method of fuel cell stacks are provided. The control system includes a set of fuel cell stacks, a secondary battery, a monitoring device, and a control device. Each fuel cell stack has a power output that can be independently started up or shut down. The secondary battery is connected to power output terminals of the fuel cell stacks via a power transmission path. The monitoring device is configured to monitor an electrical parameter of the power transmission path. The control device receives an electrical parameter signal from the monitoring device, and outputs a control signal to shut down or start up the power output of at least one of the fuel cell stacks if the electrical parameter's value is higher than a predetermined upper limit or lower than a predetermined lower limit.

Abstract: A method for fabricating a semiconductor device includes the steps of first forming a magnetic tunneling junction (MTJ) on a substrate, forming a top electrode on the MTJ, forming an inter-metal dielectric (IMD) layer around the top electrode and the MTJ, forming a landing layer on the IMD layer and the MTJ, and then patterning the landing layer to form a landing pad. Preferably, the landing pad is disposed on the top electrode and the IMD layer adjacent to one side of the top electrode.

Abstract: The present invention discloses a Trellis-Coded-Modulation (TCM) decoder applied in a receiver, wherein the TCM decoder includes a branch metric unit, a path metric unit, a trace-back length selection circuit and a survival path management circuit. In operations of the TCM decoder, the branch metric unit is configured to receive multiple input codes to generate multiple sets of branch information. The path metric unit is configured to calculate multiple survival paths according to the multiple sets of branch information. The trace-back length selection circuit is configured to select a trace-back length, wherein the trace-back length is determined according to a signal quality of the receiver. The survival path management circuit is configured to return the multiple survival paths for the trace-back length in order to generate an output code.

Abstract: A semiconductor device includes a substrate having a magnetic random access memory (MRAM) region and a logic region, a first metal interconnection on the MRAM region, a second metal interconnection on the logic region, a stop layer extending from the first metal interconnection to the second metal interconnection, and a magnetic tunneling junction (MTJ) on the first metal interconnection. Preferably, the stop layer on the first metal interconnection and the stop layer on the second metal interconnection have different thicknesses.

Abstract: The invention relates to methods, and an apparatus for data reads in a host performance acceleration (HPA) mode. One method is performed by a host side to include: searching an HPA buffer in a system memory for a logical-block-address to physical-block-address (L2P) mapping entry corresponding to a logical block address (LBA); issuing a switch command to a flash controller to request the flash controller to activate an HPA function, and does not activate an acquisition function for an L2P mapping table, where the host side and the flash controller communicate with each other in an embedded multi-media card (eMMC) protocol; issuing a write_multiple_block command to the flash controller to transfer a first data block to the flash controller, which includes the first L2P mapping entry; and issuing a read_multiple_block command to obtain data corresponding to the first L2P mapping entry from the flash controller.

Abstract: The invention relates to methods, and an apparatus for data reads in a host performance acceleration (HPA) mode. One method is performed in a host side to include: obtaining a value of an extended device-specific data (Ext_CSD) register in a flash controller from the flash controller, where the host side and the flash controller communicate with each other in an embedded multi-media card (eMMC) protocol; and allocating space in a system memory as an HPA buffer, and storing a plurality of first logical-block-address to physical-block-address (L2P) mapping entries obtained from the flash controller when the value of the Ext_CSD register comprises information indicating that an HPA function is supported, where each L2P mapping entry stores information indicating which physical address that user data of a corresponding logical address is physically stored in a flash device.

Abstract: The invention relates to methods, and an apparatus for data reads in a host performance acceleration (HPA) mode. One method is performed by a host side to include: issuing a switch command to a flash controller to request the flash controller to activate an HPA function, and an acquisition function for a logical-block-address to physical-block-address (L2P) mapping table; issuing a write_multiple_block command to the flash controller to transfer a data block to a flash controller, where the data block includes a region number and a sub-region number; issuing a read_multiple_block command to the flash controller to obtain a plurality of L2P mapping entries corresponding to the region number and the sub-region number from the flash controller. The host side and the flash controller communicate with each other in an embedded multi-media card (eMMC) protocol.

Abstract: A method for fabricating semiconductor device includes the steps of forming an inter-metal dielectric (IMD) layer on a substrate, forming a trench in the IMD layer, forming a synthetic antiferromagnetic (SAF) layer in the trench, forming a metal layer on the SAF layer, planarizing the metal layer and the SAF layer to form a metal interconnection, and forming a magnetic tunneling junction (MTJ) on the metal interconnection.

Abstract: A method for forming a semiconductor structure is disclosed. A substrate having a logic device region and a memory device region is provided. A first dielectric layer is formed on the substrate. Plural memory stack structures are formed on the first dielectric layer on the memory device region. An insulating layer is formed and conformally covers the memory stack structures and the first dielectric layer. An etching back process is performed to remove a portion of the insulating layer without exposing any portion of the memory stack structures. After the etching back process, a second dielectric layer is formed on the insulating layer and completely fills the spaces between the memory stack structures.

Abstract: An apparatus includes a graphics pipeline and a pixel data reordering module. The graphics pipeline is configured to generate a plurality pieces of pixel data of a frame. The plurality pieces of pixel data of the frame are associated with a first order in which the plurality pieces of pixel data of the frame are to be provided to a display panel having an array of pixels. Each piece of pixel data of the frame corresponds to one pixel of the array of pixels. The array of pixels are divided into a plurality of groups of pixels. The pixel data reordering module is configured to cause the plurality pieces of pixel data of the frame to be obtained by the display panel in a second order. The second order is determined based on at least a manner in which the array of pixels are divided into the groups of pixels.

Abstract: The present invention discloses a Trellis-Coded-Modulation (TCM) decoder applied in a receiver, wherein the TCM decoder includes a branch metric unit, a path metric unit, a trace-back length selection circuit and a survival path management circuit. In operations of the TCM decoder, the branch metric unit is configured to receive multiple input codes to generate multiple sets of branch information. The path metric unit is configured to calculate multiple survival paths according to the multiple sets of branch information. The trace-back length selection circuit is configured to select a trace-back length, wherein the trace-back length is determined according to a signal quality of the receiver. The survival path management circuit is configured to return the multiple survival paths for the trace-back length in order to generate an output code.

Abstract: A method for forming a semiconductor structure is disclosed. A substrate having a logic device region and a memory device region is provided. A first dielectric layer is formed on the substrate. Plural memory stack structures are formed on the first dielectric layer on the memory device region. An insulating layer is formed and conformally covers the memory stack structures and the first dielectric layer. An etching back process is performed to remove a portion of the insulating layer without exposing any portion of the memory stack structures. After the etching back process, a second dielectric layer is formed on the insulating layer and completely fills the spaces between the memory stack structures.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.

Abstract: A demand forecasting method and a demand forecasting apparatus are provided. A preliminary prediction amount corresponding to a part number is obtained based on historical demand data. A demand probability of the part number is calculated based on the preliminary prediction amount. A prediction demand amount corresponding to the part number is obtained based on the historical demand data, the preliminary prediction amount and the demand probability.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first liner on the MTJ; forming a second liner on the first liner; forming an inter-metal dielectric (IMD) layer on the MTJ, and forming a metal interconnection in the IMD layer, the second liner, and the first liner to electrically connect the MTJ. Preferably, the first liner and the second liner are made of different materials.

Abstract: A MRAM includes a plurality of memory cells, an operation unit, a voltage generator, and an input/output circuit. The operation unit includes multiple groups of memory cells among the plurality of memory cells. The voltage generator is configured to provide a plurality of control signals by voltage-dividing a voltage control signal and selectively output the plurality of control signals to the input/output circuit. The input/output circuit is configured to output a plurality of switching pulse signals to the multiple groups of memory cells according to the plurality of control signals, wherein each switching pulse signal differs in pulse width or level.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on a first sidewall of the MTJ, and a second spacer on a second sidewall of the MTJ. Preferably, the first spacer and the second spacer are asymmetric, the first spacer and the second spacer have different heights, and a top surface of the MTJ includes a reverse V-shape.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first liner on the MTJ; forming a second liner on the first liner; forming an inter-metal dielectric (IMD) layer on the MTJ, and forming a metal interconnection in the IMD layer, the second liner, and the first liner to electrically connect the MTJ. Preferably, the first liner and the second liner are made of different materials.

Abstract: A cooling assembly includes a primary plate, a secondary plate, and a padding layer. The primary plate includes a body, a first arm, and a second arm. The first arm and the second arm of the primary plate extend outwardly in opposite directions from the body of the primary plate. The secondary plate also includes a body, a first arm, and a second arm. The first arm and the second arm of the secondary plate extend outwardly in opposite directions from the body of the secondary plate. The padding layer is inserted between the primary plate and the secondary plate. The padding layer directly contacts a heat-generating electrical component secured between the primary plate and the secondary plate.