Patents by Inventor Yi Shao

Yi Shao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190065979
    Abstract: According to an embodiment, a method, computer system, and computer program product for managing data is provided. The present invention may include accumulating a plurality of predicted outputs according to a data accumulation rule. The plurality of predicted outputs is generated by a predictive model executed by a first system. The present invention may include evaluating, by a second system, an accuracy of the predictive model. Evaluating the accuracy of the predictive model may include determining a degree of difference between the plurality of predicted outputs and information generated during a development stage of the predictive model. The present invention may include determining whether the accuracy of the predictive model has declined by an amount which exceeds a pre-determined threshold. The present invention may include updating the predictive model.
    Type: Application
    Filed: August 31, 2017
    Publication date: February 28, 2019
    Inventors: Yi Shao, Liang Wang, Jing Xu, Jing James Xu
  • Publication number: 20190068176
    Abstract: A DC offset calibration circuit for calibrating DC offset with multi-level method includes analog DC offset cancellation unit and digital DC offset cancellation unit, wherein analog DC offset cancellation unit includes first amplifier and integrator, first amplifier receives analog signal with DC offset, and transmits to integrator, and integrator transmits first feedback signal to first amplifier to output amplified signal with fixed DC offset, and digital DC offset cancellation unit includes comparator, digital circuit, digital-to-analog converter and second amplifier, where second amplifier receives amplified signal with fixed DC offset and transmits to comparator for determining DC offset value and transmitting to digital circuit, digital circuit generates logical result according to DC offset value and transmits to digital-to-analog converter, and therefore digital-to-analog converter accordingly generates second feedback signal to second amplifier, to calibrate DC offset value on second amplifier.
    Type: Application
    Filed: July 4, 2018
    Publication date: February 28, 2019
    Inventors: Yi-Shao Chang, Ka-Un Chan
  • Publication number: 20190056348
    Abstract: A method of manufacturing an integrated circuit device includes providing a substrate comprising a semiconductor active layer, and forming source/drain regions, temperature sensors, and heating elements either in the semiconductor active layer or on the front side of the semiconductor active layer. The semiconductor active layer has channel regions between adjacent source/drain regions, and each of the heating elements is aligned over at least a portion of a corresponding temperature sensor. The method also includes forming a metal interconnect structure over the front side of the semiconductor active layer and exposing the channel regions from the back side of the semiconductor active layer substrate. A fluid gate dielectric layer is formed over the exposed channel regions.
    Type: Application
    Filed: October 19, 2018
    Publication date: February 21, 2019
    Inventors: Yi-Shao Liu, Jui-Cheng Huang, Tung-Tsun Chen
  • Patent number: 10184912
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a substrate, a transistor structure having a treated layer adjacent to the channel region, an isolation layer, and a dielectric layer in an opening of the isolation layer on the treated layer. The dielectric layer and the treated layer are disposed on opposite side of the transistor from a gate structure. The treated layer may be a lightly doped channel layer or a depleted layer.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: January 22, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Wen Cheng, Yi-Shao Liu, Fei-Lung Lai, Wei-Cheng Lin, Ta-Chuan Liao, Chien-Kuo Yang
  • Patent number: 10155244
    Abstract: The present disclosure relates to a micro-fluidic probe card that deposits a fluidic chemical onto a substrate with a minimal amount of fluidic chemical waste, and an associated method of operation. In some embodiments, the micro-fluidic probe card has a probe card body with a first side and a second side. A sealant element, which contacts a substrate, is connected to the second side of the probe card body in a manner that forms a cavity within an interior of the sealant element. A fluid inlet, which provides a fluid from a processing tool to the cavity, is a first conduit extending between the first side and the second side of the probe card body. A fluid outlet, which removes the fluid from the cavity, is a second conduit extending between the first side and the second side of the probe card body.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: December 18, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Yi-Shao Liu, Fei-Lung Lai, Shang-Ying Tsai
  • Patent number: 10145847
    Abstract: The present disclosure provides biochips and methods of fabricating biochips. The method includes combining three portions: a transparent substrate, a first substrate with microfluidic channels therein, and a second substrate. Through-holes for inlet and outlet are formed in the transparent substrate or the second substrate. Various non-organic landings with support medium for bio-materials to attach are formed on the first substrate and the second substrate before they are combined. In other embodiments, the microfluidic channel is formed of an adhesion layer between a transparent substrate and a second substrate with landings on the substrates.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: December 4, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hua Chu, Allen Timothy Chang, Ching-Ray Chen, Yi-Hsien Chang, Yi-Shao Liu, Chun-Ren Cheng, Chun-Wen Cheng
  • Patent number: 10139364
    Abstract: A device layer of an integrated circuit device includes a semiconductor active layer spanning a plurality of device regions. Each of the device regions has a heating element, a temperature sensor, and bioFETs in the device layer. The bioFETs have source/drain regions and channel regions in the semiconductor active layer and fluid gates exposed on a surface for fluid interfacing on one side of the device layer. A multilayer metal interconnect structure is disposed on the opposite side of the device layer. This structure places the heating elements in proximity to the fluid gates enabling localized heating, precision heating, and multiplexed temperature control for multiplexed bio-sensing applications.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: November 27, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Shao Liu, Jui-Cheng Huang, Tung-Tsun Chen
  • Patent number: 10124335
    Abstract: An integrated fluidic module includes a fluid manifold, a valve stator, a valve rotor and a valve housing. The fluid manifold includes microchannels connected to a sample reaction unit, and fluid input channels connected to fluid sources. The valve stator includes at least one groove and plural through holes, at least one groove is connected with at least one of the plural through holes, and parts of the groove and through holes are communicated with the microchannels and the fluid input channels. The valve rotor includes at least one groove. The valve housing accommodates the valve rotor and the valve stator. When the valve rotor is rotated to different positions, at least one groove of the valve rotor is connected with at least one through hole or groove of the valve stator to provide at least one fluid path and enable fluids provided by the fluid sources to be directed to corresponding chambers of the sample reaction unit through the fluid path.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: November 13, 2018
    Assignee: DELTA ELECTRONICS INT'L (SINGAPORE) PTE LTD
    Inventors: Qian Liang, Revata Utama, Yi-shao Liu
  • Publication number: 20180313783
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a substrate, a transistor structure, an isolation layer, an interface layer in an opening of the isolation layer, and a metal crown structure over the interface layer. The interface layer and the metal crown structure are disposed on opposite side of the transistor from a gate structure.
    Type: Application
    Filed: June 28, 2018
    Publication date: November 1, 2018
    Inventors: Chun-Wen CHENG, Yi-Shao LIU, Fei-Lung LAI
  • Patent number: 10094801
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity. An amplification factor of the BioFET device may be provided by a difference in capacitances associated with the gate structure on the first surface and with the interface layer formed on the second surface.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: October 9, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, LTD.
    Inventors: Yi-Shao Liu, Rashid Bashir, Fei-Lung Lai, Chun-wen Cheng
  • Publication number: 20180238827
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a substrate, a transistor structure having a treated layer adjacent to the channel region, an isolation layer, and a dielectric layer in an opening of the isolation layer on the treated layer. The dielectric layer and the treated layer are disposed on opposite side of the transistor from a gate structure. The treated layer may be a lightly doped channel layer or a depleted layer.
    Type: Application
    Filed: April 20, 2018
    Publication date: August 23, 2018
    Inventors: Chun-Wen CHENG, Yi-Shao Liu, Fei-Lung Lai, Wei-Cheng Lin, Ta-Chuan Liao, Chien-Kuo Yang
  • Patent number: 10056325
    Abstract: The present disclosure relates to a semiconductor package and a manufacturing method thereof. The semiconductor package includes a semiconductor element including a main body, a plurality of conductive vias, and at least one filler. The conductive vias penetrate through the main body. The filler is located in the main body, and a coefficient of thermal expansion (CTE) of the filler is different from that of the main body and the conductive vias. Thus, the CTE of the overall semiconductor element can be adjusted, so as to reduce warpage.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: August 21, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chin-Li Kao, Chang-Chi Lee, Yi-Shao Lai
  • Patent number: 10032520
    Abstract: A power system with detecting function includes a power source, a power level detector, and a power floating detector. The power source includes multiple voltage sources for operations in multiple voltage domains, respectively. The power level detector is configured to constantly monitor the voltage level of each voltage domain. The power floating detector is configured to detect the presence of floating voltages in each voltage domain. Therefore, the present power system with detection function can guarantee stable operations and detect glitch attacks.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: July 24, 2018
    Assignee: eMemory Technology Inc.
    Inventors: Chi-Yi Shao, Po-Hao Huang
  • Publication number: 20180195999
    Abstract: A method of sensing a biological sample includes introducing a fluid containing the biological sample through a first opening in a substrate. The method further includes passing the fluid from the first opening to a first cavity through at least one microfluidic channel. The method further includes repelling the biological sample from a first surface of the first cavity using a first surface modification layer. The method further includes attracting the biological sample to a sensing device using a plurality of modified surface patterns, wherein a first modified surface pattern of the plurality of modified surface patterns has different surface properties from a second modified surface pattern of the plurality of modified surface patterns. The method further includes outputting the fluid through a second opening in the substrate.
    Type: Application
    Filed: March 6, 2018
    Publication date: July 12, 2018
    Inventors: Yi-Shao LIU, Chun-Wen CHENG, Chun-Ren CHENG
  • Publication number: 20180195998
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity.
    Type: Application
    Filed: March 5, 2018
    Publication date: July 12, 2018
    Inventors: Alexander Kalnitsky, Yi-Shao Liu, Kai-Chih Liang, Chia-Hua Chu, Chun-Ren Cheng, Chun-Wen Cheng
  • Publication number: 20180141021
    Abstract: An integrated circuit includes two or more rows of heating elements, two or more columns of heating elements, and a plurality of sensing areas. Each sensing area is between two adjacent rows of the rows of heating elements, between two adjacent columns of the columns of heating elements, and includes a bio-sensing device and a temperature-sensing device.
    Type: Application
    Filed: January 9, 2018
    Publication date: May 24, 2018
    Inventors: Tung-Tsun CHEN, Yi-Shao LIU, Jui-Cheng HUANG, Chin-Hua WEN, Felix Ying-Kit TSUI, Yung-Chow PENG
  • Patent number: 9976982
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a substrate, a transistor structure having a treated layer adjacent to the channel region, an isolation layer, and a dielectric layer in an opening of the isolation layer on the treated layer. The dielectric layer and the treated layer are disposed on opposite side of the transistor from a gate structure. The treated layer may be a lightly doped channel layer or a depleted layer.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: May 22, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Yi-Shao Liu, Fei-Lung Lai, Wei-Cheng Lin, Ta-Chuan Liao, Chien-Kuo Yang
  • Publication number: 20180137423
    Abstract: An approach to optimizing predictive model analysis, comprising creating one or more model templates, decomposing a predictive model, wherein model information is extracted from the predictive model, storing the model information in the one or more model templates, creating a plurality of sub-models, associated with the predictive model, using the stored model information, sending the plurality of sub-models to a scoring engine, receiving results based on the plurality of sub-models from the scoring engine and generating predictions based on combining the results received from the scoring engine. The generated predictions can be sent to one or more analytic applications for further processing.
    Type: Application
    Filed: January 12, 2018
    Publication date: May 17, 2018
    Inventors: Yi Shao, Lei Tian, Jing Xu, Peng Xue
  • Patent number: 9968927
    Abstract: The present disclosure relates to an integrated chip having an integrated optical bio-sensor, and an associated method of fabrication. In some embodiments, the integrated optical bio-sensor has a sensing device arranged within a semiconductor substrate. An optical waveguide structure is located over a first side of the semiconductor substrate at a position over the sensing device. A dielectric structure is disposed onto the optical waveguide structure at a position that separates the optical waveguide structure from a sample retention area configured to receive a sample solution.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: May 15, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Shao Liu, Emerson Cheng, Yi-Hsien Chang, Chun-Ren Cheng, Ching-Ray Chen, Alex Kalnitsky, Allen Timothy Chang
  • Publication number: 20180114122
    Abstract: An approach to optimizing predictive model analysis, comprising creating one or more model templates, decomposing a predictive model, wherein model information is extracted from the predictive model, storing the model information in the one or more model templates, creating a plurality of sub-models, associated with the predictive model, using the stored model information, sending the plurality of sub-models to a scoring engine, receiving results based on the plurality of sub-models from the scoring engine and generating predictions based on combining the results received from the scoring engine. The generated predictions can be sent to one or more analytic applications for further processing.
    Type: Application
    Filed: December 28, 2017
    Publication date: April 26, 2018
    Inventors: Yi Shao, Lei Tian, Jing Xu, Peng Xue