Patents by Inventor Yi Su

Yi Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210050822
    Abstract: A filter includes M filter circuits. The M filter circuits are sequentially cascaded from an input terminal to an output terminal, in order to generate an output signal according to an input signal, in which M is a positive integer greater than or equal to 2. The M filter circuits include at least one first filter circuit and at least one second filter circuit. Each of the at least one first filter circuit is set to be an active filter circuit, and each of the at least one second filter circuit is set to be a passive filter circuit.
    Type: Application
    Filed: February 11, 2020
    Publication date: February 18, 2021
    Inventors: Wei-Chen LIN, Hsuan-Yi SU, Chih-Lung CHEN
  • Publication number: 20210020773
    Abstract: A trench metal-oxide-semiconductor field-effect transistor (MOSFET) device comprises an active cell area including a plurality of superjunction trench power MOSFETs, and a Schottky diode area including a plurality of Schottky diodes formed in the drift region having the superjunction structure.
    Type: Application
    Filed: September 30, 2020
    Publication date: January 21, 2021
    Inventors: Yi Su, Madhur Bobde
  • Publication number: 20200394473
    Abstract: Off-policy evaluation of a new “target” policy is performed using historical data gathered based on a previous “logging” policy to estimate the performance of the target policy. An estimator may be used, wherein either a quality-based estimator or a quality-agnostic estimator is used to weight the difference between an observed reward in the historical data and an estimated reward generated by the target policy. A quality-agnostic estimator may be used to evaluate an importance weight according to a threshold. In such examples, when the importance weight exceeds the threshold, the quality-agnostic estimator clips the importance weight at the threshold, thereby providing an fixed upper bound irrespective of the quality of the reward predictor. In other examples, a quality-based estimator is used, in which an upper bound incorporates the quality of the reward predictor in order to modify an importance weight used by the estimator.
    Type: Application
    Filed: October 18, 2019
    Publication date: December 17, 2020
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Miroslav DUDIK, Akshay KRISHNAMURTHY, Maria DIMAKOPOULOU, Yi SU
  • Patent number: 10868134
    Abstract: A channel layer is grown over a substrate, and an active layer is grown over the channel layer, wherein the active layer has a band gap discontinuity with the channel layer. A dielectric layer is deposited over the active layer, and the dielectric layer is patterned to expose a portion of the active layer. A metal diffusion barrier is formed over the exposed portion of the active layer, and a gate is deposited over the metal diffusion barrier.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: King-Yuen Wong, Po-Chih Chen, Chen-Ju Yu, Fu-Chih Yang, Jiun-Lei Jerry Yu, Fu-Wei Yao, Ru-Yi Su, Yu-Syuan Lin
  • Patent number: 10863389
    Abstract: This disclosure relates to techniques for a wireless device to indicate a preferred bandwidth part and duty cycle in a cellular communication system. A wireless device and a cellular base station may establish a radio resource control connection. The wireless device may transmit an indication of a preferred bandwidth part, or a preferred communication duty cycle, or both, to the cellular base station. The cellular base station may select a bandwidth part, or communication duty cycle, or both, based at least in part on the indication provided by the wireless device, and may transmit an indication of the selected bandwidth part, communication duty cycle, or both, to the wireless device. The cellular base station and the wireless device may perform cellular communication using the selected bandwidth part, communication duty cycle, or both.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: December 8, 2020
    Assignee: Apple Inc.
    Inventors: Yi Su, Yuchul Kim, Pengkai Zhao, Wei Zhang, Sami M. Almalfouh, Wei Zeng, Haitong Sun, Dawei Zhang, Yu Zhang, Tianyan Pu, Zhu Ji, Johnson O. Sebeni, Yang Li
  • Publication number: 20200382930
    Abstract: Devices, systems and methods are provided to improve pairing between first and second devices to mitigate risk that either device pairs with an unintended device by reducing transmit power to limit communication range between devices to be paired, using minimum and maximum received signal strength thresholds to reject unintended devices, and instructing user to move to another location when multiple devices are detected for pairing. The second device scanning time for detecting advertising signals from the first device is adjusted to detect multiple device co-existence. Pairing is controlled to occur when the second device is the only device that the first device detects.
    Type: Application
    Filed: March 20, 2018
    Publication date: December 3, 2020
    Applicant: Becton, Dickinson and Company
    Inventors: Ping ZHENG, Marc Clifford VOGT, Mojtaba KASHEF, Tony Hai NGUYEN, Yi SU
  • Publication number: 20200341390
    Abstract: A method includes transferring a wafer into a first processing chamber by using a robot arm mechanism, and applying a photoresist on the wafer in a first processing chamber. The wafer is transferred from the first processing chamber into a second processing chamber by using the robot arm mechanism, and the photoresist is exposed to a pattern of light in the second processing chamber. The method includes transferring the wafer from the second processing chamber into a third processing chamber by using the robot arm mechanism, and developing the exposed wafer in the third processing chamber. The method includes cleaning the robot arm mechanism in a dummy chamber.
    Type: Application
    Filed: April 29, 2019
    Publication date: October 29, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Fu-Chun HSIEH, Pei-Yi SU, Chih-Che LIN
  • Patent number: 10818788
    Abstract: A trench metal-oxide-semiconductor field-effect transistor (MOSFET) device comprises an active cell area including a plurality of superjunction trench power MOSFETs, and a Schottky diode area including a plurality of Schottky diodes formed in the drift region having the superjunction structure. Each of the integrated Schottky diodes includes a Schottky contact between a lightly doped semiconductor layer and a metallic layer.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: October 27, 2020
    Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN) LTD.
    Inventors: Yi Su, Madhur Bobde
  • Patent number: 10800711
    Abstract: A ceramic and plastic composite and a method for fabricating the same are disclosed. A chemical cleaning treatment, a microetching treatment, a hole reaming treatment, and a surface activating treatment are performed on the surface of a ceramic matrix to form nanoholes with an average diameter ranging between 150 nm and 450 nm. Plastics are injected onto the surface of the baked ceramic matrix to form a plastic layer. The plastic layer more deeply fills the nanoholes to have higher adhesion. Thus, the higher combined strength and air tightness exist between the ceramic matrix and the plastic layer to improve the reliability and the using performance of the ceramic and plastic composite.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: October 13, 2020
    Assignees: COXON PRECISE INDUSTRIAL CO., LTD, SINXON PLASTIC (DONG GUAN) CO., LTD, DONG GUAN CHENG DA METAL PRODUCT CO., LTD, DONG GUAN CHENSONG PLASTIC CO., LTD
    Inventors: Wen-Tung Chang, Jong-Yi Su
  • Publication number: 20200303496
    Abstract: High voltage semiconductor devices are described herein. An exemplary semiconductor device includes a first doped region and a second doped region disposed in a substrate. The first doped region and the second doped region are oppositely doped and adjacently disposed in the substrate. A first isolation structure and a second isolation structure are disposed over the substrate, such that each are disposed at least partially over the first doped region. The first isolation structure is spaced apart from the second isolation structure. A resistor is disposed over a portion of the first isolation structure and electrically coupled to the first doped region. A field plate disposed over a portion of the second doped region and electrically coupled to the second doped region.
    Type: Application
    Filed: June 12, 2020
    Publication date: September 24, 2020
    Inventors: Ru-Yi SU, Fu-Chih YANG, Chun Lin TSAI, Chih-Chang CHENG, Ruey-Hsin LIU
  • Publication number: 20200295854
    Abstract: A method performed by a user equipment (UE) configured with a plurality of antenna panels. Each antenna panel is configured to beamform over a millimeter wave (mmWave) frequency band. The method includes identifying a predetermined condition corresponding to a first antenna panel of the plurality of antenna panels, selecting a second antenna panel of the plurality of antenna panels based on identifying the predetermined condition corresponding to the first antenna panel and transmitting a beam via the second antenna panel based on the selection.
    Type: Application
    Filed: March 9, 2020
    Publication date: September 17, 2020
    Inventors: Shiva Krishna NARRA, Madhukar K. Shanbhag, Pengkai Zhao, Sami M. Almalfouh, Sanjeevi Balasubramanian, Sriram Subramanian, Wei Zhang, Yi Su
  • Patent number: 10752657
    Abstract: A pharmaceutical composition comprising: (a) an isolated peptide, wherein the peptide includes three or four arginine-rich domains (ARDs) from the carboxy-terminal region of hepatitis B virus core protein (HBc) and exhibits an anti-microbial activity; and (b) a pharmaceutically acceptable carrier.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: August 25, 2020
    Assignee: Academia Sinica
    Inventors: Chiaho Shih, Heng-Li Chen, Pei-Yi Su
  • Publication number: 20200226831
    Abstract: There is provided a method for geometrical reconstruction of an internal anatomical structure using at least one processor based on a set of contours derived from the internal anatomical structure, the set of contours including a first subset of long-axis contours obtained based on a first set of long-axis images of the internal anatomical structure. The method includes: adjusting the set of contours, comprising adjusting the first subset of long-axis contours to correct for motion artefacts in the first set of long-axis images; and deforming a template three-dimensional (3D) surface mesh preconfigured for the internal anatomical structure's type into a deformed 3D surface mesh based on the adjusted set of contours to obtain the geometrical reconstruction of the internal anatomical structure. In particular, the internal anatomical structure is a heart. There is also provided a corresponding system for geometrical reconstruction of an internal anatomical structure.
    Type: Application
    Filed: October 5, 2018
    Publication date: July 16, 2020
    Inventors: Yi Su, Soo Kng Teo, Xiaodan Zhao, Liang Zhong, Ru San Tan
  • Patent number: 10693997
    Abstract: Embodiments of the present disclosure pertain to network based machine learning generated simulations. In one embodiment, the present disclosure includes a computer implemented method comprising sending first code comprising a programmable calculator from a server system to a client system across a network. A data request is sent to a database, the data request configured to retrieve data from the database comprising a plurality of fields and a target field. The retrieved data is processed using a machine learning algorithm to produce a weight for each field of the plurality of fields and a scoring data structure. The fields and the scoring data structure are sent to the client system across the network. A user selects values for the plurality of fields and the programmable calculator is configured based on the scoring data structure to generate a simulated value for the target field based on the user selected values.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: June 23, 2020
    Assignee: SAP SE
    Inventors: Katherine Wright, Sepideh Hashtroodi, Teresa Hsin Yi Su, Flavia Moser, Sajjad Gholami, Zeyu Ni, Geoffrey Neil Peters
  • Patent number: 10686032
    Abstract: High voltage semiconductor devices are described herein. An exemplary semiconductor device includes a first doped region and a second doped region disposed in a substrate. The first doped region and the second doped region are oppositely doped and adjacently disposed in the substrate. A first isolation structure and a second isolation structure are disposed over the substrate, such that each are disposed at least partially over the first doped region. The first isolation structure is spaced apart from the second isolation structure. A resistor is disposed over a portion of the first isolation structure and electrically coupled to the first doped region. A field plate disposed over a portion of the second doped region and electrically coupled to the second doped region.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: June 16, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ru-Yi Su, Fu-Chih Yang, Chun Lin Tsai, Chih-Chang Cheng, Ruey-Hsin Liu
  • Publication number: 20200168450
    Abstract: A method for fabricating interconnect of semiconductor device. The method includes providing a base substrate, having an inter-layer dielectric layer on top. A copper interconnect structure is formed in the inter-layer dielectric layer. A pre-sputter clean process is performed with hydrogen radicals on the copper interconnect structure. A degas process is sequentially performed on the copper interconnect structure. A cobalt cap layer is formed on the copper interconnect structure.
    Type: Application
    Filed: November 28, 2018
    Publication date: May 28, 2020
    Applicant: United Microelectronics Corp.
    Inventors: Ko-Wei Lin, Kuan-Hsiang Chen, Hsin-Fu Huang, Chun-Ling Lin, Sheng-Yi Su, Pei-Hsun Kao
  • Publication number: 20200162896
    Abstract: Devices, systems and methods are provided to implement key generation for secure pairing between first and second devices using embedded out-of-band (OOB) key generation and without requiring the devices to have input/output (IO) capability to enter authentication information. Bluetooth Smart or Low Energy (BLE) OOB pairing option can be used for pairing medical devices with added security of OOB key generation. The OOB key generation comprises providing first and second devices with the same predefined credential and secure hashing algorithm, and making input of the hashing algorithm of the first and second devices the same. The first device transmits unique data to second device (e.g., via BLE advertising) to share and compute a similar input. The first and second devices use the credential and shared data with the hashing function to generate a key that is the same at each of first and second devices.
    Type: Application
    Filed: May 21, 2018
    Publication date: May 21, 2020
    Applicant: Becton, Dickinson and Company
    Inventors: Yi SU, Ping ZHENG, Mojtaba KASHEF
  • Publication number: 20200148602
    Abstract: A ceramic and plastic composite includes a ceramic matrix and a plastic layer. Plastics are injected onto the surface of the baked ceramic matrix to form a plastic layer. The plastic layer more deeply fills nanoholes distributed on the surface of the ceramic matrix to have higher adhesion. Thus, the higher combined strength and air tightness exist between the ceramic matrix and the plastic layer to improve the reliability and the using performance of the ceramic and plastic composite.
    Type: Application
    Filed: January 15, 2020
    Publication date: May 14, 2020
    Inventors: Wen-Tung CHANG, Jong-Yi SU
  • Publication number: 20200111909
    Abstract: A device includes a buried well region and a first HVW region of the first conductivity, and an insulation region over the first HVW region. A drain region of the first conductivity type is disposed on a first side of the insulation region and in a top surface region of the first HVW region. A first well region and a second well region of a second conductivity type opposite the first conductivity type are on the second side of the insulation region. A second HVW region of the first conductivity type is disposed between the first and the second well regions, wherein the second HVW region is connected to the buried well region. A source region of the first conductivity type is in a top surface region of the second HVW region, wherein the source region, the drain region, and the buried well region form a JFET.
    Type: Application
    Filed: December 5, 2019
    Publication date: April 9, 2020
    Inventors: Jen-Hao Yeh, Chih-Chang Cheng, Ru-Yi Su, Ker Hsiao Huo, Po-Chih Chen, Fu-Chih Yang, Chun-Lin Tsai
  • Publication number: 20200103768
    Abstract: The present disclosure describes a semiconductor apparatus and a method for handling contamination from a semiconductor manufacturing process. The semiconductor apparatus can include a chuck configured to hold a substrate, a drain cup configured to surround the chuck and to capture a chemical sprayed from the substrate, and a detection module disposed in a space between the drain cup and the chuck and configured to monitor sidewalls of the drain cup.
    Type: Application
    Filed: June 28, 2019
    Publication date: April 2, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Chun HSIEH, Chih-Che Lin, Pei-Yi Su