Abstract: The invention provides a delivery system comprising a cell penetrating peptide, 10 histidines, and an interfering RNA molecule. The system can be used for delivering interfering RNA molecules into a cell in vivo or in vitro. Therapeutic uses for the delivery system are also provided.

Abstract: A semiconductor device for simultaneous operation at two temperature ranges includes a substrate, a first transistor, and a second transistor. The substrate has a first active region and a second active region. The first transistor includes a plurality of gate stacks disposed in the first active region. The second transistor includes a plurality of gate stacks disposed in the second active region. A ratio of the number of the gate stacks of the second transistor to an area size of the second active region is less than a ratio of the number of the gate stacks of the first transistor to an area size of the first active region.

Abstract: A quasi-cyclic low-density parity-check (QC-LDPC) encoder includes a Fourier transform circuit configured to receive an input message and to generate a transformed message based on the input message. The transformed message includes leading symbols with indices corresponding to leading elements of cyclotomic cosets of a finite field with respect to a subfield. The QC-LDPC encoder further includes a matrix multiplier circuit configured to multiply the leading symbols of the transformed message by leading symbols of a transformed LDPC generator matrix to generate leading symbols of transformed parity symbols associated with an LDPC codeword. The QC-LDPC encoder is configured to provide the leading symbols of the transformed parity symbols to an inverse Fourier transform circuit to generate parity information of the LDPC codeword.

Abstract: A circuit comprises a voltage supply node, a reference voltage node, and a plurality of transistors coupled with the voltage supply node and the reference voltage node. The circuit also comprises a circuit input, a first delay element and a second delay element. The first delay element is coupled with the circuit input and one transistor of the plurality of transistors. The second delay element is coupled with the circuit input and a second transistor of the plurality of transistors. The circuit further comprises a circuit output coupled with the first transistor of the plurality of transistors and the second transistor of the plurality of transistors. The circuit additionally comprises a bias generator coupled with the circuit output, the first transistor of the plurality of transistors and the second transistor of the plurality of transistors.

Abstract: A circuit comprises a voltage supply node, a reference voltage node, and a plurality of transistors coupled with the voltage supply node and the reference voltage node. The circuit also comprises a circuit input, a first delay element and a second delay element. The first delay element is coupled with the circuit input and one transistor of the plurality of transistors. The second delay element is coupled with the circuit input and a second transistor of the plurality of transistors. The circuit further comprises a circuit output coupled with the first transistor of the plurality of transistors and the second transistor of the plurality of transistors. The circuit additionally comprises a bias generator coupled with the circuit output, the first transistor of the plurality of transistors and the second transistor of the plurality of transistors.

Abstract: In a method for filtering messages being executed by at least one processor of electronic devices, the method includes detecting a message filtering template set by the first electronic device when the first electronic logs into the server successfully; sends a content of the message filtering template and a communication request from the first electronic device to the server; sends the content to the second electronic device by the server, the content of the message filtering template including functions of stop receiving messages from group members within a first certain period of time or refusing to send messages to one or more group members within a second certain period of time; and receiving a selection from the second electronic device through the server.

Abstract: A microfluidic electrochemical device and process are detailed that provide chemical imaging and electrochemical analysis under vacuum at the surface of the electrode-sample or electrode-liquid interface in-situ. The electrochemical device allows investigation of various surface layers including diffuse layers at selected depths populated with, e.g., adsorbed molecules in which chemical transformation in electrolyte solutions occurs.

Abstract: A method of producing a high-purity carbide mold includes the steps of (A) providing a template; (B) putting the template at a deposition region in a growth chamber; (C) putting a carbide raw material in the growth chamber; (D) providing a heating field; (E) introducing a gas; (F) depositing the carbide raw material; and (G) removing the template. The method is able to produce a mold from a high-purity carbide with a purity of 93% or above and therefore is effective in solving known problems with carbide molds, that is, low hardness and low purity.

Abstract: Systems and methods are disclosed for aligning multiple data bits by adjusting the timing of input lines for those data bits. Embodiments include a hierarchical structure for comparing the timing of multiple sets of bits. Other embodiments include aligning data bits from multiple chips in a 3D die stacking architecture.

Abstract: The invention provides a delivery system comprising a cell penetrating peptide, 10 histidines, and an interfering RNA molecule. The system can be used for delivering interfering RNA molecules into a cell in vivo or in vitro. Therapeutic uses for the delivery system are also provided.

Abstract: A system for capturing an eye diagram is disclosed.

Abstract: A system and method is disclosed for adaptively adjusting a duty cycle of a signal between a first and second chip in a 3D architecture/stack for adaptively calibrating a chip in a 3D architecture/stack. In one embodiment, the system includes a first chip and a second chip located within the 3D chip stack, wherein the first chip generates a calibration signal, the second chip receives the calibration signal and compares it to a reference signal to generate a comparison signal that further compared to a reference duty signal to generate a reference duty comparison signal, that is then provided to the first chip to generate a drive signal that adjusts a duty cycle of the calibration signal.

Abstract: Among other things, one or more techniques and systems for performing design layout are provided. An initial design layout is associated with an electrical component, such as a standard cell. A conflict graph is generated based upon the initial design layout. The conflict graph comprises one or more nodes, representing polygons within the initial design layout, connected by one or more edges. A same-process edge specifies that two nodes are to be generated by the same pattern process, while a different-process edge specified that two nodes are to be generated by different pattern processes, such as a mandrel pattern process and a passive fill pattern process. The conflict graph is evaluated to identify a conflict, such as a self-aligned multiple pattering (SAMP) conflict, associated with the initial design layout. The conflict is visually displayed so that the initial design layout can be modified to resolve the conflict.

Abstract: Method and system to determine a company rank utilizing on-line social network data is described. A company ranking system may examine member profiles representing respective members of an on-line social network system and extract transition data. From the transition data, the company ranking system may construct a company transition graph having nodes that represent respective companies and edges that represent transitions of employees from one company to another. A rank or a node score for each node of the company transition graph may be determined by applying a ranking algorithm to the graph. The scores generated for respective nodes in the company transition graph may be stored for future use in a database.

Abstract: Method and system to determine a school rank utilizing on-line social network data is described. A school ranking system may be configured to determine a ranking of a school based on career outcomes data which may be Obtained from member profile data stored by an on-line social network system. The school ranking system may examine the member profiles and determine how many of the target school alumni can be considered successful alumni and then calculate a success score for a school as a number of successful alumni divided by the total number of the school's alumni.

Abstract: A microfluidic electrochemical device and process are detailed that provide chemical imaging and electrochemical analysis under vacuum at the surface of the electrode-sample or electrode-liquid interface in-situ. The electrochemical device allows investigation of various surface layers including diffuse layers at selected depths populated with, e.g., adsorbed molecules in which chemical transformation in electrolyte solutions occurs.

Abstract: An eye diagram capture device includes a delay line arranged to receive a digital signal and output time delayed version of the digital signal. An edge detection circuit is arranged to receive the digital signal and the time delayed version of the digital signal, the edge detection circuit operating to output a signal corresponding to a logical value of the digital signal received coincident with an edge of the time delay version of the digital signal. A voltage comparator is arranged to receive the digital signal and a reference voltage. The voltage comparator operates to output a first signal when the a voltage of the digital signal and the reference voltage are equal to each other.

Abstract: Methods and apparatuses pertaining to flexible information mapping and modification of data packets are described. A method may involve receiving a data packet, modifying one or more attributes of the data packet, and outputting the modified data packet. In modifying the one or more attributes of the data packet, the method may involve extracting information from the data packet, the information including one or more user-defined fields (UDFs) in a header of the data packet. The method may also involve defining one or more source user-defined fields (SUDFs) according to at least one UDF of the one or more UDFs. The method may further involve performing one or more actions with respect to at least one SUDF of the one or more SUDFs.

Abstract: A machine may be configured to identify skills for a projected next job position. For example, the machine performs an analysis of profile data associated with a plurality of members of a social network service. Based on the analysis of the profile data and a present job position of a particular member of the social network service, the machine identifies a projected next position in a career path model. The machine identifies a cohort of other members of the social network service. The identifying of the cohort may be based on each cohort member holding the projected next position in a respective career. Each cohort member may be associated with one or more skills. The machine identifies one or more over-indexed skills for the cohort based on the one or more skills of the cohort members. The machine generates a recommendation that includes the one or more over-indexed skills.

Abstract: Methods of manufacturing a semiconductor device are described. In an embodiment, the method may include providing a substrate having a metal layer disposed thereon, the metal layer having a conductive trace pattern formed therein; depositing a dielectric material over the conductive trace pattern of the metal layer; determining a layout of a plurality of air gaps that will be formed in the dielectric material based on a design rule checking (DRC) procedure and the conductive trace pattern; and forming the plurality of air gaps in the dielectric material based on the layout of the plurality of air gaps.