Patents by Inventor Yu Pan

Yu Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Operational envelope detection with situational assessment
    Patent number: 11845454
    Abstract: Embodiments for operational envelope detection (OED) with situational assessment are disclosed. Embodiments herein relate to an operational envelope detector that is configured to receive, as inputs, information related to sensors of the system and information related to operational design domain (ODD) requirements. The OED then compares the information related to sensors of the system to the information related to the ODD requirements, and identifies whether the system is operating within its ODD or whether a remedial action is appropriate to adjust the ODD requirements based on the current sensor information. Other embodiments are described and/or claimed.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: December 19, 2023
    Assignee: Motional AD LLC
    Inventors: You Hong Eng, James Guo Ming Fu, Scott D. Pendleton, Yu Pan
  • METHOD AND APPARATUS PERFORMED BY NODE IN WIRELESS COMMUNICATION SYSTEM
    Publication number: 20230397082
    Abstract: The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. The disclosure provides a method performed by a first node in a wireless communication system is provided. The method includes transmitting, by the first node, a first message to a second node, the first message including first indication information, and transmitting, by the first node, a second message to a third node, the second message including second indication information, wherein the third node is a candidate node configured by network for the second node.
    Type: Application
    Filed: June 1, 2023
    Publication date: December 7, 2023
    Inventors: Yu PAN, Fuyuan LI, Weiwei WANG, Lixiang XU, Hong WANG
  • METHODS, DEVICES AND SYSTEMS FOR DETERMINING SFN USING QCL INFORMATION
    Publication number: 20230396308
    Abstract: A system and method for determining SFN using QCL information is disclosed. In one aspect, a method receiving, by a wireless communication device, a first set of quasi-co-location (QCL) information; receiving, by the wireless communication device, a transmission; and applying, by the wireless communication device, a second set of QCL information based on the first set of QCL information, wherein the second set of QCL information is different from the first set of QCL information.
    Type: Application
    Filed: June 7, 2023
    Publication date: December 7, 2023
    Applicant: ZTE CORPORATION
    Inventors: Meng MEI, Chuangxin JIANG, Zhaohua LU, Shujuan ZHANG, Yu PAN
  • Semiconductor package with thermal relaxation block and manufacturing method thereof
    Patent number: 11830866
    Abstract: Manufacturing method of semiconductor package includes following steps. Bottom package is provided. The bottom package includes a die and a redistribution structure electrically connected to die. A first top package and a second top package are disposed on a surface of the redistribution structure further away from the die. An underfill is formed into the space between the first and second top packages and between the first and second top packages and the bottom package. The underfill covers at least a side surface of the first top package and a side surface of the second top package. A hole is opened in the underfill within an area overlapping with the die between the side surface of the first top package and the side surface of the second top package. A thermally conductive block is formed in the hole by filling the hole with a thermally conductive material.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: November 28, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Wei Chen, Chih-Hua Chen, Hsin-Yu Pan, Hao-Yi Tsai, Lipu Kris Chuang, Tin-Hao Kuo
  • PACKAGE STRUCTURE
    Publication number: 20230378152
    Abstract: A package structure includes an insulating encapsulation, a semiconductor die, and a filter structure. The semiconductor die is encapsulated in the insulating encapsulation. The filter structure is electrically coupled to the semiconductor die, wherein the filter structure includes a patterned metallization layer with a pattern having a double-spiral having aligned centroids thereof.
    Type: Application
    Filed: August 2, 2023
    Publication date: November 23, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sen-Kuei Hsu, Hsin-Yu Pan, Ming-Hsien Tsai
  • SEMICONDUCTOR PACKAGE WITH THERMAL RELAXATION BLOCK AND MANUFACTURING METHOD THEREOF
    Publication number: 20230378151
    Abstract: Manufacturing method of semiconductor package includes following steps. Bottom package is provided. The bottom package includes a die and a redistribution structure electrically connected to die. A first top package and a second top package are disposed on a surface of the redistribution structure further away from the die. An underfill is formed into the space between the first and second top packages and between the first and second top packages and the bottom package. The underfill covers at least a side surface of the first top package and a side surface of the second top package. A hole is opened in the underfill within an area overlapping with the die between the side surface of the first top package and the side surface of the second top package. A thermally conductive block is formed in the hole by filling the hole with a thermally conductive material.
    Type: Application
    Filed: July 31, 2023
    Publication date: November 23, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Wei Chen, Chih-Hua Chen, Hsin-Yu Pan, Hao-Yi Tsai, Lipu Kris Chuang, Tin-Hao Kuo
  • METHOD AND SYSTEM TO BALANCE GROUND BOUNCE
    Publication number: 20230377640
    Abstract: A memory cell includes a write port and a read port. The write port includes two cross-coupled inverters that form a storage unit. The cross-coupled inverters are connected between a first power source signal line and a second power source signal line. The write port also includes a first local interconnect line in an interconnect layer that is connected to the second power source signal line. The read port includes a transistor that is connected to the storage unit in the write port and to the second power source signal line, and a second local interconnect line in the interconnect layer that is connected to the second power source signal line. The second local interconnect line in the read port is separate from the first local interconnect line in the write port.
    Type: Application
    Filed: May 22, 2023
    Publication date: November 23, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hidehiro Fujiwara, Hsien-Yu Pan, Chih-Yu Lin, Yen-Huei Chen, Wei-Chang Zhao
  • Package structure
    Patent number: 11824054
    Abstract: A package structure includes an insulating encapsulation, a semiconductor die, and a filter structure. The semiconductor die is encapsulated in the insulating encapsulation. The filter structure is electrically coupled to the semiconductor die, wherein the filter structure includes a patterned metallization layer with a pattern having a double-spiral having aligned centroids thereof.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: November 21, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sen-Kuei Hsu, Hsin-Yu Pan, Ming-Hsien Tsai
  • SYSTEMS AND METHODS FOR INDICATION OF PHASE TRACKING REFERENCE SIGNAL-DEMODULATION REFERENCE SIGNAL ASSOCIATION
    Publication number: 20230371042
    Abstract: Presented are systems and methods for indicating phase tracking reference signal-demodulation reference signal (PTRS-DMRS) association. A wireless communication device may receive a scheduling grant to trigger a first group of physical uplink shared channel (PUSCH) transmission occasions and a second group of PUSCH transmission occasions from a wireless communication node. The scheduling information carried by the scheduling grant may at least include port association information of PTRS-DMRS. The port association information may comprise a first port association for the first group of PUSCH transmission occasions and a second port association for the second group of PUSCH transmission occasions. The second port association may be at least associated with a portion of the scheduling information which is at least for the first group of PUSCH transmission occasions.
    Type: Application
    Filed: May 19, 2023
    Publication date: November 16, 2023
    Inventors: Meng MEI, Chuangxin JIANG, Zhaohua LU, Yu PAN, Yang ZHANG
  • SYSTEM AND METHOD FOR BLIND DETECTION
    Publication number: 20230371043
    Abstract: A system and method for wireless communication are disclosed herein. Example implementations includes a wireless communication device determining one or more counters for a plurality of linked PDCCH (Physic Downlink Control Channel) candidates, wherein the plurality of linked PDCCH candidates are linked. The one or more counters are numbers of linked PDCCH candidates to be monitored, where each counter is an integer or a decimal. The counters may count individual candidates and/or combined candidates. The counters counting the PDCCH candidates may be the same number of different numbers. The wireless communication device may blindly determine downlink information using the counters and the linked PDCCH candidates.
    Type: Application
    Filed: June 13, 2023
    Publication date: November 16, 2023
    Applicant: ZTE CORPORATION
    Inventors: Yu PAN, Chuangxin JIANG, Shujuan ZHANG, Zhaohua LU
  • SEMICONDUCTOR PACKAGE
    Publication number: 20230369263
    Abstract: A semiconductor package includes a substrate, a redistribution circuit layer, and a protective layer. The redistribution circuit layer is over the substrate and includes a plurality of functional pads electrically connected to the substrate, and a dummy pad pattern electrically disconnected from the plurality of functional pads, wherein the dummy pad pattern includes a plurality of pad portions connected to one another. The protective layer is disposed over the redistribution circuit layer and comprising a plurality of first openings spaced apart from one another and respectively revealing the plurality of pad portions.
    Type: Application
    Filed: May 11, 2022
    Publication date: November 16, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kris Lipu Chuang, Hsiu-Jen Lin, Tzu-Sung Huang, Hsin-Yu Pan
  • PREDICTION TOOL FOR JUDGING DRUG SENSITIVITY AND LONG-TERM PROGNOSIS OF LIVER CANCER BASED ON GENE DETECTION AND USE THEREOF
    Publication number: 20230366037
    Abstract: A prediction tool for judging drug sensitivity and long-term prognosis of liver cancer based on gene detection provided. The present application statistically analyzes an aerobic glycolysis pathway gene related to liver cancer prognosis in TCGA data, and adopts LASSO regression analysis to simplify a prognosis-related gene on this basis, so as to establish a prediction tool based on the aerobic glycolysis pathway gene, referred to as an aerobic glycolysis index. The index is validated in a plurality of public databases and clinical samples from a Sir Run Run Shaw Hospital, and it is found that the index can accurately predict sensitivity and long-term prognosis of liver cancer patients to sorafenib therapy. The present application can effectively screen liver cancer patients sensitive to the sorafenib therapy, and provides a new idea for precise and comprehensive treatment of the liver cancer patients.
    Type: Application
    Filed: July 21, 2023
    Publication date: November 16, 2023
    Inventors: Junjie XU, Xiujun CAI, Yu PAN, Xiao LIANG, Shunjie XIA
  • SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20230361078
    Abstract: A semiconductor package includes a redistribution structure, at least one semiconductor device, a heat dissipation component, and an encapsulating material. The at least one semiconductor device is disposed on and electrically connected to the redistribution structure. The heat dissipation component is disposed on the redistribution structure and includes a concave portion for receiving the at least one semiconductor device and an extending portion connected to the concave portion and contacting the redistribution structure, wherein the concave portion contacts the at least one semiconductor device. The encapsulating material is disposed over the redistribution structure, wherein the encapsulating material fills the concave portion and encapsulates the at least one semiconductor device.
    Type: Application
    Filed: July 18, 2023
    Publication date: November 9, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Wei Chen, Chih-Hua Chen, Hsin-Yu Pan, Hao-Yi Tsai, Lipu Kris Chuang, Tin-Hao Kuo
  • MOBILE RESPIRATOR
    Publication number: 20230347092
    Abstract: A mobile respirator has a respiratory device, a pipe, a breathing component, and a power bank. The pipe has two opposite ends respectively connected to the respiratory device and the breathing component, and the power bank is electrically connected to the respiratory device. A user can place the power bank and the respiratory device inside a backpack, and the pipe can be outstretched from the backpack. Thereby, the user can carry the backpack and wear the breathing component, so the user may breathe with assistance of the mobile respirator. By the power bank supplying electricity for the respiratory device, the mobile respirator is mobile outdoors and solves the trouble of dyspnea while exercising or staying outdoors.
    Type: Application
    Filed: April 17, 2023
    Publication date: November 2, 2023
    Applicant: GrowTrend Biomedical Co., Ltd.
    Inventors: Pei-Yin OU, Ching-Liang YU, Yun-Yueh LIU, Neng Yu PAN
  • CONTINUOUS POSITIVE AIRWAY PRESSURE DEVICE
    Publication number: 20230338678
    Abstract: A continuous positive airway pressure device has a shell, a diversion sound-absorbing foam pad, a blower, and a partition. The shell has an inlet and an outlet. The diversion sound-absorbing foam pad is disposed inside the shell and forms an airflow passage extending tortuously inside the shell. The blower is disposed on the diversion sound-absorbing foam pad and fluidly communicates with the airflow passage and the outlet of the shell. The partition covers the blower and the diversion sound-absorbing foam pad and has a leading hole fluidly communicating with the airflow passage and the inlet of the shell. After air flows into an interior space of the shell, the air flows through the airflow passage being tortuous and then flows out from the shell, which lengthens flow path of the air, reduces noises generated during the air flowing, and helps the air to flow more fluently.
    Type: Application
    Filed: April 14, 2023
    Publication date: October 26, 2023
    Applicant: GrowTrend Biomedical Co., Ltd.
    Inventors: Chin-Ni LEE, Pei-Yin OU, Neng Yu PAN, Ching-Liang YU
  • PACKAGE STRUCTURE
    Publication number: 20230343764
    Abstract: A package structure including a chip stacking structure, a thermal enhance component and a first insulating encapsulant is provided. The thermal enhance component is stacked over and thermally coupled to the chip stacking structure, wherein a first lateral dimension of the thermal enhance component is greater than a second lateral dimension of the chip stacking structure. The first insulating encapsulant laterally encapsulates the thermal enhance component and the chip stacking structure.
    Type: Application
    Filed: April 25, 2022
    Publication date: October 26, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Lipu Kris Chuang, Hsin-Yu Pan, Tzu-Sung Huang
  • Spiky metal organic framework, method for fabricating thereof, and kit for treating cancer
    Patent number: 11786594
    Abstract: A spiky metal organic framework is provided in the present disclosure. The spiky metal organic framework is formed by a coordination reaction between at least one metal ion and an organic ligand, and includes a body and a plurality of spike-like structures. The body is a spherical shape, and a particle size of the body is 1 ?m to 3 ?m. The spike-like structures are distributed on a surface of the body, a diameter of each spike-like structure is 15 nm to 35 nm, and a length of each spike-like structure is 250 nm to 400 nm.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: October 17, 2023
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Hsing-Wen Sung, Po-Ming Chen, Wen-Yu Pan, Yang-Bao Miao, Po-Kai Luo
  • BIT LINE AND WORD LINE CONNECTION FOR MEMORY ARRAY
    Publication number: 20230326522
    Abstract: Various embodiments of the present application are directed towards an integrated chip including a first conductive interconnect structure overlying a substrate. A first memory stack is disposed on the first conductive interconnect structure. A second conductive interconnect structure overlies the first memory stack. The second conductive interconnect structure is spaced laterally between opposing sidewalls of the first conductive interconnect structure. A third conductive interconnect structure is disposed on the first conductive interconnect structure. A top surface of the third conductive interconnect structure is vertically above the second conductive interconnect structure.
    Type: Application
    Filed: June 9, 2023
    Publication date: October 12, 2023
    Inventors: Chang-Chih Huang, Jui-Yu Pan, Kuo-Chyuan Tzeng
  • SEMICONDUCTOR PACKAGES AND METHODS OF FORMING THE SAME
    Publication number: 20230307305
    Abstract: A semiconductor package includes a circuit board structure, a first redistribution layer structure and first bonding elements. The circuit board structure includes outermost first conductive patterns and a first mask layer adjacent to the outermost first conductive patterns. The first redistribution layer structure is disposed over the circuit board structure. The first bonding elements are disposed between and electrically connected to the first redistribution layer structure and the outermost first conductive patterns of the circuit board structure. In some embodiments, at least one of the first bonding elements covers a top and a sidewall of the corresponding outermost first conductive pattern.
    Type: Application
    Filed: May 31, 2023
    Publication date: September 28, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Wei Cheng, Jiun-Yi Wu, Hsin-Yu Pan, Tsung-Ding Wang, Yu-Min Liang, Wei-Yu Chen
  • SEMICONDUCTOR PACKAGE
    Publication number: 20230307385
    Abstract: A semiconductor package includes a substrate, a semiconductor device, and a ring structure. The semiconductor device disposed on the substrate. The ring structure disposed on the substrate and surrounds the semiconductor device. The ring structure includes a first portion and a second portion. The first portion bonded to the substrate. The second portion connects to the first portion. A cavity is between the second portion and the substrate.
    Type: Application
    Filed: May 30, 2023
    Publication date: September 28, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yang Yu, Jung-Wei Cheng, Yu-Min Liang, Jiun-Yi Wu, Yen-Fu Su, Chien-Chang Lin, Hsin-Yu Pan