Patents by Inventor Yu Pan

Yu Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240181138
    Abstract: The present invention relates to a silk fibroin/hydroxyapatite composite material, and a preparation method therefor and an application thereof. A uniform mixture of hydroxyapatite nanoparticles, silk fibroin, and hexafluoroisopropanol is maintained at a temperature range from 50° C. to 60° C. for at least 1 hour to obtain a silk fibroin/hydroxyapatite solution; the silk fibroin/hydroxyapatite solution is poured into a long cylindrical mold, two ends of the long cylindrical mold being respectively an end A and an end B; at room temperature, the end A is opened and the end B is closed, and the mold is vertically immersed in methanol with the opening facing up and let stand for at least 2 days; the mold is turned upside down, the end A is closed and the end B is opened, and the mold is vertically immersed in the methanol with the opening facing up and let stand for at least 2 days; the mold is removed, and ventilation and drying are performed to obtain a silk fibroin/hydroxyapatite composite material.
    Type: Application
    Filed: March 9, 2022
    Publication date: June 6, 2024
    Inventors: Chunyu Chang, Lin Wu, Yu Pan, Jiehan Lin
  • Patent number: 11995400
    Abstract: A computer-implemented method, according to one embodiment, includes: receiving an image having characters that correspond to a language, and using a text recognition algorithm to determine a first language believed to correspond to the characters. A first confidence level associated with the first language is also computed, and a determination is made as to whether the first confidence level associated with the first language is outside a predetermined range. In response to determining that the first confidence level associated with the first language is not outside the predetermined range, the first language is output as the given language. The text recognition algorithm is trained using a simple shallow neural network and a generated mixed language corpus. The generated mixed language corpus is formed by: randomly sampling libraries having vocabulary and/or characters therein, and combining the randomly sampled vocabulary and/or characters to form the generated mixed language corpus.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: May 28, 2024
    Assignee: International Business Machines Corporation
    Inventors: Zhong Fang Yuan, Tong Liu, Li Juan Gao, Xiang Yu Yang, Qiang He, Yu Pan
  • Publication number: 20240172022
    Abstract: A wireless communication method includes requesting, by a wireless communication entity, user equipment (UE) to provide location information; and providing, by the wireless communication entity, a measurement gap to a wireless communication node or the UE.
    Type: Application
    Filed: July 6, 2023
    Publication date: May 23, 2024
    Applicant: ZTE Corporation
    Inventors: Guozeng ZHENG, Chuangxin JIANG, Yansheng LIU, Yu PAN, Zhaohua LU, Hao WU
  • Patent number: 11987249
    Abstract: Among other things, techniques are described for determining precedence order at a multiway stop. In embodiments, identifications are assigned to tracks, and young tracks are compared to stale tracks. A young track matches a stale track based on one or more factors. An identification of the young track is reassigned to an identification of the stale track, wherein the young track is determined to match the stale track based on the one or more factors. An earliest time of appearance of agents is determined based on identifications and in view of perception obscured areas. A precedence order for navigating through the intersection is determined based on local rules, the identifications, and the earliest time of appearance of agents, and the vehicle proceeds through the multiway stop intersection in accordance with the precedence order.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: May 21, 2024
    Assignee: Motional AD LLC
    Inventors: Scott D. Pendleton, Xiaojun Sun, Shu-Kai Lin, Puneet Singhal, Yu Pan, Lubing Zhou, Laith Sahawneh, Guchan Ozbilgin, Giancarlo Baldan
  • Publication number: 20240163820
    Abstract: Presented are systems, methods, apparatuses, or computer-readable media for configuring reference signaling. A wireless communication device may determine a set of resources. A number of resources in the set may be equal to or more than one and the set satisfies a character. Each of the resources may be associated with a respective value of information.
    Type: Application
    Filed: November 27, 2023
    Publication date: May 16, 2024
    Applicant: ZTE CORPORATION
    Inventors: Shujuan ZHANG, Hao WU, Yang ZHANG, Chuangxin JIANG, Yu PAN, Zhaohua LU
  • Patent number: 11984372
    Abstract: A package structure and a method of forming the same are provided. A method includes forming first electrical connectors and second electrical connectors on a first side of an interposer wafer. An integrated circuit die is bonded to the first side of the interposer wafer using the first electrical connectors. A stiffener structure is attached to the first side of the interposer wafer adjacent the integrated circuit die. The stiffener structure covers the second electrical connectors in a plan view. The integrated circuit die and the stiffener structure are encapsulated with a first encapsulant. The interposer wafer and the stiffener structure are singulated to form a stacked structure.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Teng-Yuan Lo, Lipu Kris Chuang, Hsin-Yu Pan
  • Patent number: 11972952
    Abstract: Methods and apparatuses are described that provide tungsten deposition with low roughness. In some embodiments, the methods involve co-flowing nitrogen with hydrogen during an atomic layer deposition process of depositing tungsten that uses hydrogen as a reducing agent. In some embodiments, the methods involve depositing a cap layer, such as tungsten oxide or amorphous tungsten layer, on a sidewall surface of a 3D NAND structure. The disclosed embodiments have a wide variety of applications including depositing tungsten into 3D NAND structures.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: April 30, 2024
    Assignee: Lam Research Corporation
    Inventors: Ruopeng Deng, Xiaolan Ba, Tianhua Yu, Yu Pan, Juwen Gao
  • Publication number: 20240136280
    Abstract: A method includes forming a dielectric layer over a contact pad of a device, forming a first polymer layer over the dielectric layer, forming a first conductive line and a first portion of a second conductive line over the first polymer layer, patterning a photoresist to form an opening over the first portion of the second conductive feature, wherein after patterning the photoresist the first conductive line remains covered by photoresist, forming a second portion of the second conductive line in the opening, wherein the second portion of the second conductive line physically contacts the first portion of the second conductive line, and forming a second polymer layer extending completely over the first conductive line and the second portion of the second conductive line.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventors: Chao-Wen Shih, Chen-Hua Yu, Han-Ping Pu, Hsin-Yu Pan, Hao-Yi Tsai, Sen-Kuei Hsu
  • Publication number: 20240128232
    Abstract: A semiconductor package includes a first semiconductor die, an encapsulant, a high-modulus dielectric layer and a redistribution structure. The first semiconductor die includes a conductive post in a protective layer. The encapsulant encapsulates the first semiconductor die, wherein the encapsulant is made of a first material. The high-modulus dielectric layer extends on the encapsulant and the protective layer, wherein the high-modulus dielectric layer is made of a second material. The redistribution structure extends on the high-modulus dielectric layer, wherein the redistribution structure includes a redistribution dielectric layer, and the redistribution dielectric layer is made of a third material. The protective layer is made of a fourth material, and a ratio of a Young's modulus of the second material to a Young's modulus of the fourth material is at least 1.5.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Ding Wang, Yen-Fu Su, Hao-Cheng Hou, Jung-Wei Cheng, Chien-Hsun Lee, Hsin-Yu Pan
  • Patent number: 11948627
    Abstract: A write assist circuit can include a control circuit and a voltage generator. The control circuit can be configured to receive memory address information associated with a memory write operation for memory cells. The voltage generator can be configured to provide a reference voltage to one or more bitlines coupled to the memory cells. The voltage generator can include two capacitive elements, where during the memory write operation, (i) one of the capacitive elements can be configured to couple the reference voltage to a first negative voltage, and (ii) based on the memory address information, both capacitive elements can be configured to cumulatively couple the reference voltage to a second negative voltage that is lower than the first negative voltage.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hidehiro Fujiwara, Chih-Yu Lin, Sahil Preet Singh, Hsien-Yu Pan, Yen-Huei Chen, Hung-Jen Liao
  • Patent number: 11942442
    Abstract: A package structure includes a first redistribution circuit structure, a second redistribution circuit structure, a semiconductor die, a waveguide structure, and an antenna. The semiconductor die is sandwiched between and electrically coupled to the first redistribution circuit structure and the second redistribution circuit structure. The waveguide structure is located aside and electrically coupled to the semiconductor die, wherein the waveguide structure includes a part of the first redistribution circuit structure, a part of the second redistribution circuit structure and a plurality of first through vias each connecting to the part of the first redistribution circuit structure and the part of the second redistribution circuit structure. The antenna is located on the semiconductor die, wherein the second redistribution circuit structure is sandwiched between the antenna and the semiconductor die, and the antenna is electrically communicated with the semiconductor die through the waveguide structure.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sen-Kuei Hsu, Hsin-Yu Pan
  • Publication number: 20240098544
    Abstract: Systems and methods for indicating positioning information in wireless communication systems are disclosed. In one aspect, a method includes receiving, by a wireless communication device from a network, network timing error information; and reporting, by the wireless communication device to the network, downlink measurement results and User Equipment (UE) timing error information, wherein, the network timing error information comprises at least one of Transmission and Reception Point (TRP) transmission Timing Error Group (TEG) information and TRP reception TEG information; the UE timing error information comprises at least one of UE transmission TEG information and UE reception TEG information.
    Type: Application
    Filed: August 30, 2023
    Publication date: March 21, 2024
    Applicant: ZTE CORPORATION
    Inventors: Yu PAN, Guozeng ZHENG, Chuangxin JIANG, Shujuan ZHANG, Zhaohua LU
  • Publication number: 20240071888
    Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.
    Type: Application
    Filed: August 28, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Chang Lin, Yen-Fu Su, Chin-Liang Chen, Wei-Yu Chen, Hsin-Yu Pan, Yu-Min Liang, Hao-Cheng Hou, Chi-Yang Yu
  • Publication number: 20240047436
    Abstract: A semiconductor package and a manufacturing method are provided. The semiconductor package includes a first die disposed on and electrically coupled to a first redistribution structure and laterally covered by a first insulating encapsulation, a second die disposed over the first die and laterally covered by a second insulating encapsulation, a second redistribution structure interposed between and electrically coupled to the first and second dies, a third redistribution structure disposed on the second die and opposite to the second redistribution structure, and at least one thermal-dissipating feature embedded in a dielectric layer of the third redistribution structure and electrically isolated from a patterned conductive layer of the third redistribution structure through the dielectric layer. Through substrate vias of the first die are physically connected to the second redistribution structure or the first redistribution structure.
    Type: Application
    Filed: August 4, 2022
    Publication date: February 8, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzuan-Horng Liu, Hao-Yi Tsai, Kris Lipu Chuang, Hsin-Yu Pan
  • Patent number: 11894341
    Abstract: A semiconductor package includes a semiconductor die, an encapsulant, a first and second dielectric layer, a through via, an extension pad, and a routing via. The semiconductor die includes a contact post. The first dielectric layer extends on the encapsulant. The through via extends through the first dielectric layer and has one end contacting the contact post. The extension pad is disposed on the first dielectric layer, contacting an opposite end of the through via with respect to the contact post. The extension pad has an elongated shape, a first end of the extension pad overlaps with the contact post and the through via, and a second end of the extension pad overlaps with the encapsulant. The second dielectric layer is disposed on the first dielectric layer and the extension pad. The routing via extends through the second dielectric layer to contact the second end of the extension pad.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: February 6, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Ding Wang, Yen-Fu Su, Hao-Cheng Hou, Jung-Wei Cheng, Chien-Hsun Lee, Hsin-Yu Pan
  • Patent number: 11894299
    Abstract: A method includes forming a dielectric layer over a contact pad of a device, forming a first polymer layer over the dielectric layer, forming a first conductive line and a first portion of a second conductive line over the first polymer layer, patterning a photoresist to form an opening over the first portion of the second conductive feature, wherein after patterning the photoresist the first conductive line remains covered by photoresist, forming a second portion of the second conductive line in the opening, wherein the second portion of the second conductive line physically contacts the first portion of the second conductive line, and forming a second polymer layer extending completely over the first conductive line and the second portion of the second conductive line.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: February 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR LTD
    Inventors: Chao-Wen Shih, Chen-Hua Yu, Han-Ping Pu, Hsin-Yu Pan, Hao-Yi Tsai, Sen-Kuei Hsu
  • Publication number: 20240017151
    Abstract: A team sports vision training system based on extended reality, voice interaction and action recognition is configured to train vision and an action of a user. A head-mounted display device includes a task scenario player and a speech sensing module. An action capture device generates an action message. A computing server stores a scenario setting parameter group and includes a task scenario generating module, a speech recognition module and an action recognition module. The task scenario generating module generates a virtual task scenario image and a task parameter group according to the scenario setting parameter group. The speech recognition module generates a speech recognition result and a vision training result. Then action recognition module generates an action recognition result and a sport training result. The vision training result and the sport training result are configured to judge whether the user meets a training requirement.
    Type: Application
    Filed: May 11, 2023
    Publication date: January 18, 2024
    Inventors: Min-Chun HU, Hung-Kuo CHU, Pin-Xuan LIU, Tse-Yu PAN, Hsin-Shih LIN
  • Patent number: 11866704
    Abstract: A method of treating a subject suffering from cancer comprising a step of administering an effective amount of a group of double-stranded RNA molecules to the subject, wherein the RNA molecule is isolated or derived from a bacteria of the genus Escherichia. A method of inhibiting growth or proliferation of cancer cells comprising a step of contacting said cells with said RNA molecule; and a pharmaceutical composition for treating cancer comprising said RNA molecule and a pharmaceutically tolerable excipient. Also a double-stranded RNA molecule and a recombinant vector comprising the double-stranded RNA molecule.
    Type: Grant
    Filed: December 6, 2020
    Date of Patent: January 9, 2024
    Assignee: Macau University of Science and Technology
    Inventors: Zhi-Hong Jiang, Kai-Yue Cao, Yu Pan, Tong-Meng Yan
  • Publication number: 20240006180
    Abstract: Provided herein are methods of depositing tungsten (W) films without depositing a nucleation layer. In certain embodiments, the methods involve depositing a conformal layer of boron (B) on a substrate. The substrate generally includes a feature to be filled with tungsten with the boron layer conformal to the topography of the substrate including the feature. The reducing agent layer is then exposed to a continuous flow of hydrogen and pulses of fluorine-containing tungsten precursor in a pulsed CVD process. The conformal boron layer is converted to a conformal tungsten layer.
    Type: Application
    Filed: November 16, 2021
    Publication date: January 4, 2024
    Inventors: Yu PAN, Yao-Tsung HSIEH, Xiaolan BA, Juwen GAO
  • Patent number: D1022669
    Type: Grant
    Filed: May 12, 2023
    Date of Patent: April 16, 2024
    Assignee: Hangzhou Jeep tower Clothing Enterprises Co., Ltd.
    Inventors: Yu Pan, Michael Alexander Mayer